#!/bin/bash

set -x
# Wt
cd /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets
#rm -f /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_basesoc_versa_ecp5/gateware/top.svf
rm -fr /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_basesoc_versa_ecp5/
rm -rf /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_ethernetsoc_versa_ecp5/gateware/

echo
echo "NOW BUILDING"
echo

# Build .svf
./versa_ecp5.py						\
	--sys-clk-freq=60e6				\
	--gateware-toolchain=trellis			\
	--gateware-toolchain-path=/usr/local		\
	--cpu-type=vexriscv				\
	--csr-csv=./csr_ecp5versa.csv			\
	|| exit

#	--cpu-type=rocket
#	--sys-clk-freq=60e6				\
#	--with-ethernet					\
#	--cpu-variant=linux				\


echo
echo "NOW FLASHING"
echo

openocd											\
	-f /home/jebba/devel/FPGA/muh/ecp5-versa5g.cfg					\
	-c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_basesoc_versa_ecp5/gateware/top.svf; exit"						\
	|| exit
# No ethernet
#	-c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_basesoc_versa_ecp5/gateware/top.svf; exit"	\
# With ethernet
#	-c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_ethernetsoc_versa_ecp5/gateware/top.svf; exit" \




echo "Running:"
echo "lxterm /dev/ttyUSB1"
echo "Hit ctrl-c twice to bail"
echo
echo "If that lxterm doesn't connect try like this:"
echo "lxterm /dev/ttyUSB1 --speed=2e6"

echo
echo "NOW CONNECTING"
echo

lxterm /dev/ttyUSB1