#/bin/bash

set -x

cd ~/devel/FPGA/litex/litex/litex/boards/targets

./versa_ecp5.py
	--gateware-toolchain trellis
	--csr-csv ./csr_ecp5versa.csv
	--with-ethernet
	--sys-clk-freq=60e6
	--cpu-type vexriscv
	--cpu-variant linux

exit 0

	--cpu-type rocket