#!/bin/bash

set -x

cd ~/devel/FPGA/litex/litex-boards/litex_boards/partner/targets

./trellisboard.py							\
	--with-ethernet							\
	--sys-clk-freq=75e6						\
	--gateware-toolchain=trellis					\
	--gateware-toolchain-path=/usr/local				\
	--cpu-type=vexriscv						\
	--cpu-variant=linux+no-dsp					\
	--csr-csv=./csr_trellisboard.csv

exit 0
openocd									\
	-f ~/devel/FPGA/muh/trellisboard.cfg				\
	-c  "init; svf soc_ethernetsoc_trellisboard/gateware/top.svf ; exit"

#lxterm /dev/ttyUSB1 --speed=2e6
#lxterm /dev/ttyUSB1 --speed=1e6
lxterm /dev/ttyUSB1

exit 0

TypeError: __init__() got multiple values for keyword argument 'integrated_rom_size'
	--integrated-rom-size=32768					\
	--integrated-rom-size=1						\
	--integrated-rom-size=0						\

ValueError: Memory region conflict between main_ram and main_ram
	--integrated-main-ram-size=131072				\
	--integrated-main-ram-size=32768				\
	--integrated-main-ram-size=536870912				\
	--integrated-main-ram-size=10					\
	--integrated-main-ram-size=9					\
	--integrated-main-ram-size=8					\

    assert(min < max)
	--integrated-main-ram-size=1					\
	--integrated-main-ram-size=2					\
	--integrated-main-ram-size=3					\
	--integrated-main-ram-size=4					\
	--integrated-main-ram-size=7					\

BUILDS:
	--integrated-main-ram-size=0					\