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fpga-cruft/scripts/forksand-trellis-kernel-root

172 lines
5.6 KiB

#!/bin/bash
#
# Creates:
# RISC-V 32-bit core running Linux with root filesystem for ECP5 FPGA.
# Directory where everything is stored
FPGADIR=/home/jebba/devel/FPGA
# Directory of scripts
FPGASCRIPTS=$FPGADIR/muh
# Timestamp
FPGANOW=`date +%Y%m%d-%H%M%S`
# Log script
exec > >(tee $FPGADIR/log/trellis-vex-kernel-root-$FPGANOW) 2>>$FPGADIR/log/trellis-vex-kernel-root-$FPGANOW
set -x
cd $FPGASCRIPTS || exit
###############
# Build LiteX #
###############
cd $FPGADIR/litex
# Update Buildroot
echo "===================================== Update buildroot"
cd buildroot && \
git branch -a && \
git checkout master && \
git reset --hard HEAD && \
git status && \
git log | head -1 | cut -f 2 -d " "
#git pull && \
#git submodule update && \
make clean && \
# XXX Use custom linux.config
cp -p $FPGADIR/PATCH/linux-fstrellis.config \
$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config
# XXX Set up rootfs overlay files defined here:
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
cp -a $FPGADIR/PATCH/rootfs_overlay \
$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
# XXX Use custom defconfig
cp -p $FPGADIR/PATCH/litex_vexriscv_fstrellis_defconfig \
$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig
make BR2_EXTERNAL=../linux-on-litex-vexriscv/buildroot/ litex_vexriscv_fstrellis_defconfig \
# 5m16s:
make && \
# XXX COPY OUTPUT
# XXX *output/images/*
# Since tftp server is remote, mount it locally for convenience:
sshfs -o reconnect sparkle:/srv/tftp/ /srv/tftp/
cp -p output/images/Image /srv/tftp/Image && \
cp -p output/images/rootfs.cpio /srv/tftp/rootfs.cpio && \
cp -p output/images/rootfs.tar /srv/tftp/rootfs.tar && \
# Where dtb dts ? ./linux-on-litex-vexriscv/buildroot/rv32.dtb
cd ..
# Update litex
echo "===================================== Update litex"
# XXX BUILD
cd litex && \
git branch -a && \
git checkout master && \
git reset --hard HEAD && \
git status && \
git log | head -1 | cut -f 2 -d " "
#git pull && \
#git submodule update && \
# BUILD VexRiscv.v HERE XXX
cd litex/soc/cores/cpu/vexriscv/verilog && \
# Remove older builds
rm -f *.v && \
# BUILD VEXRISCV
# 1m8s:
make && \
cd ../../../../../.. && \
# Build LiteX
# 7 seconds:
./setup.py clean && ./setup.py build && ./setup.py install --user && \
cd .. && \
#####################
# Build RISC-V Core #
#####################
# XXX This build is done in above LiteX subdir
# XXX So this is unused duplicate
# XXX Should this really be built here earlier???
# $FPGADIR/litex/litex/litex/soc/cores/cpu/vexriscv/verilog
#
# Update Vexrisc-verilog
echo "===================================== Update vexrisc-verilog"
# XXX BUILD
cd Vexriscv-verilog && \
git branch -a && \
git checkout master && \
git reset --hard HEAD && \
git status && \
git log | head -1 | cut -f 2 -d " "
#git pull && \
#git submodule update && \
# XXX clean thusly?
# 5 seconds:
sbt clean reload && \
# XXX Just checkout VexRiscv_LinuxNoDspFmax ?
# sbt "runMain vexriscv.GenCoreDefault"
# 10 seconds:
sbt "runMain vexriscv.GenCoreDefault --externalInterruptArray=true --csrPluginConfig=linux-minimal" && \
# XXX OUTPUT FILES:
# VexRiscv.v VexRiscv.yaml
cd ..
########################
# Build Linux on LiteX #
########################
# Update Linux on LiteX Vexriscv
echo "===================================== Update linux-on-litex-vexriscv"
# XXX BUILD
cd linux-on-litex-vexriscv && \
git branch -a && \
git checkout master && \
git reset --hard HEAD && \
git status && \
git log | head -1 | cut -f 2 -d " "
#git pull && \
#git submodule update && \
# Clean
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/__pycache__/ && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/build && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/rv32.dtb && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.d && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.o && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.bin && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.elf && \
rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/prog/trellisboard.cfg && \
# Custom config, set kernel boot line in this script
cp -p $FPGADIR/PATCH/json2dts.py $FPGADIR/litex/linux-on-litex-vexriscv
# TrellisBoard Patch to make.py
patch -p0 < $FPGADIR/PATCH/0001-linuxonlitex-make.diff && \
# TrellisBoard config
cp -p $FPGADIR/PATCH/0000-trellisboard.cfg prog/trellisboard.cfg && \
# motd :)
cp -p $FPGADIR/PATCH/linux-on-litex-motd \
buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd && \
# motd date
echo "motd date `date`" >> buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd
# XXX BUILD
# XXX Add output of Vexrisc.v and buildroot etc from above
#
#
# 2m1s:
./make.py --board=trellisboard --build
# XXX Copy to tftp server 1 file needed ?
cp -p buildroot/rv32.dtb /srv/tftp/rv32.dtb && \
# XXX copy to tftp server emulator.bin
cp -p emulator/emulator.bin /srv/tftp/emulator.bin && \
#
#
# Load image on FPGA
# XXX busted:
./make.py --board=trellisboard --load && \
cd ..
echo "Connect to FPGA thusly:" && \
echo "lxterm /dev/ttyUSB1 --speed=1e6" && \
exit 0