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510 lines
16 KiB
510 lines
16 KiB
#!/bin/bash
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#
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# This updates every repo, rebuilds everything.
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# Creates:
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# RISC-V 32-bit core running Linux with root filesystem for ECP5 FPGA.
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# Directory where everything is stored
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FPGADIR=/home/jebba/devel/FPGA
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# Directory of scripts
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FPGASCRIPTS=$FPGADIR/muh
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# Timestamp
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FPGANOW=`date +%Y%m%d-%H%M%S`
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# Log script
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exec > >(tee $FPGADIR/log/trellis-$FPGANOW) 2>>$FPGADIR/log/trellis-$FPGANOW
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set -x
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cd $FPGASCRIPTS || exit
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# Write log of current git commits
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./forksand-fpga-git-commits-log
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###################################
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# Update and build icestorm tools #
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###################################
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cd $FPGADIR || exit
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# Update Icestorm
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echo "===================================== Update icestorm"
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cd icestorm && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " " && \
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git pull && \
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git submodule update && \
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make clean && \
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# 18 seconds:
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make -j$(nproc) && \
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sudo make install || exit
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cd ..
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# Update Pjtrellis
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echo "===================================== Update pjtrellis"
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cd prjtrellis && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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cd libtrellis && \
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make clean && \
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cmake -DCMAKE_INSTALL_PREFIX=/usr/local . && \
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# 1 second:
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make -j$(nproc) && \
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sudo make install || exit
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cd ../..
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# Update Nextpnr
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echo "===================================== Update nextpnr"
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cd nextpnr && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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make clean && \
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cmake -DARCH=ecp5 -DCMAKE_INSTALL_PREFIX=/usr/local . && \
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# 4m40s:
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make -j$(nproc) && \
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sudo make install || exit
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cd ..
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# Update Yosys
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echo "===================================== Update yosys"
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cd yosys && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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make clean && \
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YOABCREV=`grep ^ABCREV Makefile |cut -f 2 -d "=" | sed -e 's/ //g'` && \
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cd abc && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git pull && \
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git submodule update && \
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git checkout $YOABCREV && \
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# 4 seconds:
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# XXX which file XXX
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#make -j$(nproc) && \
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cd ..
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make -j$(nproc) && \
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sudo make install || exit
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cd ..
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# Update OpenOCD
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echo "===================================== Update openocd"
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cd openocd && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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make clean && \
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# 13 seconds:
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make && \
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sudo make install || exit
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cd ..
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###############
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# Build LiteX #
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###############
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cd $FPGADIR/litex
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# Update Buildroot
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echo "===================================== Update buildroot"
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cd buildroot && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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make clean && \
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# XXX Use custom linux.config
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cp -p $FPGADIR/PATCH/linux-fstrellis.config \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config
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# XXX Set up rootfs overlay files defined here:
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
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cp -a $FPGADIR/PATCH/rootfs_overlay \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
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# XXX Use custom defconfig
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cp -p $FPGADIR/PATCH/litex_vexriscv_fstrellis_defconfig \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig
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make BR2_EXTERNAL=../linux-on-litex-vexriscv/buildroot/ litex_vexriscv_fstrellis_defconfig \
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# 5m16s:
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make && \
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# XXX COPY OUTPUT
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# XXX *output/images/*
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# Since tftp server is remote, mount it locally for convenience:
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sshfs -o reconnect sparkle:/srv/tftp/ /srv/tftp/
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cp -p output/images/Image /srv/tftp/Image && \
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cp -p output/images/rootfs.cpio /srv/tftp/rootfs.cpio && \
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cp -p output/images/rootfs.tar /srv/tftp/rootfs.tar && \
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# Where dtb dts ? ./linux-on-litex-vexriscv/buildroot/rv32.dtb
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cd ..
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# Update migen
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echo "===================================== Update migen"
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cd migen && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litedram
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echo "===================================== Update litedram"
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cd litedram && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update liteeth
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echo "===================================== Update liteeth"
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cd liteeth && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litepcie
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echo "===================================== Update litepcie"
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cd litepcie && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litesdcard
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echo "===================================== Update litesdcard"
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cd litesdcard && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litespi
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echo "===================================== Update litespi"
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cd litespi && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litevideo
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echo "===================================== Update litevideo"
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cd litevideo && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update liteiclink
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echo "===================================== Update liteiclink"
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# XXX needed?
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cd liteiclink && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litejesd204b
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echo "===================================== Update litejesd204b"
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# XXX needed?
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cd litejesd204b && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litesata
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echo "===================================== Update litesata"
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# XXX needed?
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cd litesata && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litex-boards
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echo "===================================== Update litex-boards"
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# XXX BUILD
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cd litex-boards && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# 1 second:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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cd ..
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# Update litex
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echo "===================================== Update litex"
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# XXX BUILD
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cd litex && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# XXX need to patch:
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# XXX MEMORY PATCH AND MORE HERE
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#cp -p $FPGADIR/PATCH/litex-soc_core.py \
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# ./litex/soc/integration/soc_core.py && \
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# XXX
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# Set memory in crufty way: XXX
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#sed -i -e 's/main_ram_size = min(main_ram_size, 0x20000000) # FIXME: limit to 512MB for now/main_ram_size = min(main_ram_size, 0x40000000) # FIXME: limit to 1G for now/g' $FPGADIR/litex/litex/litex/soc/integration/soc_sdram.py && \
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#sed -i -e 's/main_ram_size = min(main_ram_size, 0x20000000) # FIXME: limit to 512MB for now/main_ram_size = min(main_ram_size, 0x30000000) # FIXME: limit to 768MB for now/g' $FPGADIR/litex/litex/litex/soc/integration/soc_sdram.py && \
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#sed -i -e 's///g' $FPGADIR/litex/litex/litex/soc/integration/soc_core.py
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# BUILD VexRiscv.v HERE XXX
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cd litex/soc/cores/cpu/vexriscv/verilog && \
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# Remove older builds
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rm -f *.v && \
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# BUILD VEXRISCV
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# 1m8s:
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make && \
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cd ../../../../../.. && \
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# Build LiteX
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# 7 seconds:
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python3 ./setup.py clean && python3 ./setup.py build && python3 ./setup.py install --user || exit
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# REVERT memory in crufty way: XXX
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#sed -i -e 's/main_ram_size = min(main_ram_size, 0x40000000) # FIXME: limit to 1G for now/main_ram_size = min(main_ram_size, 0x20000000) # FIXME: limit to 512MB for now/g' $FPGADIR/litex/litex/litex/soc/integration/soc_sdram.py && \
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#sed -i -e 's/main_ram_size = min(main_ram_size, 0x30000000) # FIXME: limit to 768MB for now/main_ram_size = min(main_ram_size, 0x20000000) # FIXME: limit to 512MB for now/g' $FPGADIR/litex/litex/litex/soc/integration/soc_sdram.py && \
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cd .. && \
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#####################
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# Build RISC-V Core #
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#####################
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# XXX This build is done in above LiteX subdir
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# XXX So this is unused duplicate
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# XXX Should this really be built here earlier???
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# $FPGADIR/litex/litex/litex/soc/cores/cpu/vexriscv/verilog
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#
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# Update Vexrisc-verilog
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echo "===================================== Update vexrisc-verilog"
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# XXX BUILD
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cd Vexriscv-verilog && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# XXX clean thusly?
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# 5 seconds:
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sbt clean reload && \
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# XXX Just checkout VexRiscv_LinuxNoDspFmax ?
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# sbt "runMain vexriscv.GenCoreDefault"
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# 10 seconds:
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sbt "runMain vexriscv.GenCoreDefault --externalInterruptArray=true --csrPluginConfig=linux-minimal" && \
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# XXX OUTPUT FILES:
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# VexRiscv.v VexRiscv.yaml
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cd ..
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########################
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# Build Linux on LiteX #
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########################
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# Update Linux on LiteX Vexriscv
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echo "===================================== Update linux-on-litex-vexriscv"
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# XXX BUILD
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cd linux-on-litex-vexriscv && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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git pull && \
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git submodule update && \
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# Clean
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/__pycache__/ && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/build && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/rv32.dtb && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.d && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.o && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.bin && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.elf && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/prog/trellisboard.cfg && \
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# Checkout custom branch
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#git checkout fs-trellis && \
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#git status && \
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#git log | head -1 | cut -f 2 -d " "
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# XXX PATCH
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# XXX set ramdisk_size=131072
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#sed -i -e 's/root=\/dev\/ram0 init=/root=\/dev\/ram0 ramdisk_size=65536 debug init=/g' json2dts.py
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# root=nbd:<server>:<port>[:<fstype>][:<mountopts>]
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# XXX
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# sed -i -e 's/root=\/dev\/ram0 init=/root=nbd:192.168.1.100:8992 debug init=/g' json2dts.py
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cp -p $FPGADIR/PATCH/json2dts.py $FPGADIR/litex/linux-on-litex-vexriscv
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# TrellisBoard Patch to make.py
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patch -p0 < $FPGADIR/PATCH/0001-linuxonlitex-make.diff && \
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# TrellisBoard config
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cp -p $FPGADIR/PATCH/0000-trellisboard.cfg prog/trellisboard.cfg && \
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# motd :)
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cp -p $FPGADIR/PATCH/linux-on-litex-motd \
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buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd && \
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# motd date
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echo "motd date `date`" >> buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd
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# XXX BUILD
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# XXX Add output of Vexrisc.v and buildroot etc from above
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#
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#
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# Really need to fix:
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# 2m1s:
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# XXX It actually builds, then fails at the end on something else (?)
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# This is now broken: XXX NOW OK
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./make.py --board=trellisboard --build
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#
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# Temporary work around:
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#cd $FPGADIR/litex/litex-boards/litex_boards/partner/targets
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#rm -rf soc_ethernetsoc_trellisboard
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#./trellisboard.py \
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# --with-ethernet \
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# --sys-clk-freq=75e6 \
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# --gateware-toolchain=trellis \
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# --gateware-toolchain-path=/usr/local \
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# --cpu-type=vexriscv \
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# --cpu-variant=linux+no-dsp \
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# --csr-csv=./csr_trellisboard.csv
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#
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#
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#
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#
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#
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# XXX extra cruft
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#cd ~/FPGADIR/litex/linux-on-litex-vexriscv && \
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## Now comment out the line that fails in make.py and rerun to get rest of build...
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|
#sed -i -e 's/builder.build()/#builder.build()/g' make.py && \
|
|
#./make.py --board=trellisboard --build && \
|
|
#
|
|
#
|
|
#
|
|
#
|
|
# XXX Copy to tftp server 1 file needed ?
|
|
cp -p buildroot/rv32.dtb /srv/tftp/rv32.dtb && \
|
|
# XXX copy to tftp server emulator.bin
|
|
cp -p emulator/emulator.bin /srv/tftp/emulator.bin && \
|
|
#
|
|
#
|
|
#
|
|
#
|
|
# Load image on FPGA
|
|
# XXX busted:
|
|
./make.py --board=trellisboard --load && \
|
|
# Use this to flash since make.py broken:
|
|
#cd $FPGADIR
|
|
#openocd \
|
|
# -f litex/linux-on-litex-vexriscv/prog/trellisboard.cfg \
|
|
# -c "init; svf litex/litex-boards/litex_boards/partner/targets/soc_ethernetsoc_trellisboard/gateware/top.svf ; exit"
|
|
## -c "init; svf litex/linux-on-litex-vexriscv/build/trellisboard/gateware/top.svf ; exit"
|
|
cd ..
|
|
######################
|
|
# Load image on FPGA #
|
|
######################
|
|
# Done above
|
|
# openocd
|
|
###################
|
|
# Connect to FPGA #
|
|
###################
|
|
# lxterm
|
|
# lxterm /dev/ttyUSB1
|
|
# lxterm /dev/ttyUSB1 --speed=2e6
|
|
# lxterm /dev/ttyUSB1 --speed=1e6
|
|
echo "Connect to FPGA thusly:" && \
|
|
echo "lxterm /dev/ttyUSB1 --speed=1e6" && \
|
|
lxterm /dev/ttyUSB1 --speed=1e6
|
|
lxterm /dev/ttyUSB2 --speed=1e6
|
|
########
|
|
# MISC #
|
|
########
|
|
# Update GCC toolchain
|
|
#######
|
|
# END #
|
|
#######
|
|
exit 0
|