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113 lines
4.0 KiB
113 lines
4.0 KiB
#!/bin/bash
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#
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# Creates:
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# RISC-V 32-bit core running Linux with root filesystem for ECP5 FPGA.
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# Directory where everything is stored
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FPGADIR=/home/jebba/devel/FPGA
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# Directory of scripts
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FPGASCRIPTS=$FPGADIR/muh
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# Timestamp
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FPGANOW=`date +%Y%m%d-%H%M%S`
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# Log script
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exec > >(tee $FPGADIR/log/trellis-kernel-root-$FPGANOW) 2>>$FPGADIR/log/trellis-kernel-root-$FPGANOW
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set -x
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cd $FPGASCRIPTS || exit
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###############
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# Build LiteX #
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###############
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cd $FPGADIR/litex
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# Update Buildroot
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echo "===================================== Update buildroot"
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cd buildroot && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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#git pull && \
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#git submodule update && \
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make clean && \
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# XXX Use custom linux.config
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cp -p $FPGADIR/PATCH/linux-fstrellis.config \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config
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# XXX Set up rootfs overlay files defined here:
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
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cp -a $FPGADIR/PATCH/rootfs_overlay \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/rootfs_overlay
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# XXX Use custom defconfig
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cp -p $FPGADIR/PATCH/litex_vexriscv_fstrellis_defconfig \
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$FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig
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make BR2_EXTERNAL=../linux-on-litex-vexriscv/buildroot/ litex_vexriscv_fstrellis_defconfig \
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# 5m16s:
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make && \
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# XXX COPY OUTPUT
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# XXX *output/images/*
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# Since tftp server is remote, mount it locally for convenience:
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sshfs -o reconnect sparkle:/srv/tftp/ /srv/tftp/
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cp -p output/images/Image /srv/tftp/Image && \
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cp -p output/images/rootfs.cpio /srv/tftp/rootfs.cpio && \
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cp -p output/images/rootfs.tar /srv/tftp/rootfs.tar && \
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# Where dtb dts ? ./linux-on-litex-vexriscv/buildroot/rv32.dtb
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cd ..
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########################
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# Build Linux on LiteX #
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########################
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# Update Linux on LiteX Vexriscv
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echo "===================================== Update linux-on-litex-vexriscv"
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# XXX BUILD
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cd linux-on-litex-vexriscv && \
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git branch -a && \
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git checkout master && \
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git reset --hard HEAD && \
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git status && \
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git log | head -1 | cut -f 2 -d " "
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#git pull && \
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#git submodule update && \
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# Clean
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/__pycache__/ && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/build && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/rv32.dtb && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/board/litex_vexriscv/linux-fstrellis.config && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/buildroot/configs/litex_vexriscv_fstrellis_defconfig && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.d && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/*.o && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.bin && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/emulator/emulator.elf && \
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rm -rf $FPGADIR/litex/linux-on-litex-vexriscv/prog/trellisboard.cfg && \
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# Custom config, set kernel boot line in this script
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cp -p $FPGADIR/PATCH/json2dts.py $FPGADIR/litex/linux-on-litex-vexriscv
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# TrellisBoard Patch to make.py
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patch -p0 < $FPGADIR/PATCH/0001-linuxonlitex-make.diff && \
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# TrellisBoard config
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cp -p $FPGADIR/PATCH/0000-trellisboard.cfg prog/trellisboard.cfg && \
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# motd :)
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cp -p $FPGADIR/PATCH/linux-on-litex-motd \
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buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd && \
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# motd date
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echo "motd date `date`" >> buildroot/board/litex_vexriscv/rootfs_overlay/etc/motd
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# 2m1s:
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./make.py --board=trellisboard --build
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# XXX Copy to tftp server 1 file needed ?
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cp -p buildroot/rv32.dtb /srv/tftp/rv32.dtb && \
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# XXX copy to tftp server emulator.bin
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cp -p emulator/emulator.bin /srv/tftp/emulator.bin && \
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#
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# Load image on FPGA
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./make.py --board=trellisboard --load && \
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cd ..
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echo "Connect to FPGA thusly:" && \
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echo "lxterm /dev/ttyUSB1 --speed=1e6" && \
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exit 0
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