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fs-TrellisBoard/hardware/lib/parts.pretty/PCIe_EDGE_x4.kicad_mod

116 lines
8.4 KiB

(module PCIe_EDGE_x4 (layer F.Cu) (tedit 5BF559E3)
(fp_text reference REF** (at 0 -7.35) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value PCIe_EDGE_x4 (at 0 -5.08) (layer Edge.Cuts)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.2 3.5) (end 5.6 3.5) (layer Edge.Cuts) (width 0.15))
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(fp_arc (start 4.5 -3.95) (end 3.55 -3.95) (angle 180) (layer Edge.Cuts) (width 0.15))
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(fp_line (start 5.45 -3.95) (end 5.45 3.5) (layer Edge.Cuts) (width 0.15))
(fp_line (start 3.55 3.5) (end -6.9 3.5) (layer Edge.Cuts) (width 0.15))
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(fp_line (start -11.3 -1) (end -11.9 -1) (layer Edge.Cuts) (width 0.15))
(fp_line (start -11.3 -2.8) (end -11.3 -1) (layer Edge.Cuts) (width 0.15))
(fp_line (start -11.3 -7.2) (end -11.3 -2.8) (layer Edge.Cuts) (width 0.15))
(fp_line (start -11.3 -7.45) (end -11.3 -7.2) (layer Edge.Cuts) (width 0.15))
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(fp_line (start 79.4 -9.25) (end 79.4 -4.45) (layer Edge.Cuts) (width 0.15))
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(fp_line (start 79.4 -4.45) (end 79.4 0.05) (layer Edge.Cuts) (width 0.15))
(fp_line (start 88.15 -9.25) (end 105.4 -9.25) (layer Edge.Cuts) (width 0.15))
(fp_line (start 86.4 -6.2) (end 86.4 -7.5) (layer Edge.Cuts) (width 0.15))
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(fp_arc (start 88.15 -7.5) (end 88.15 -9.25) (angle -90) (layer Edge.Cuts) (width 0.15))
(fp_arc (start 88.15 -6.2) (end 86.4 -6.2) (angle -90) (layer Edge.Cuts) (width 0.15))
(pad M thru_hole circle (at -45.1 -91.2) (size 5 5) (drill 3.18) (layers *.Cu *.Mask))
(pad M thru_hole circle (at -45.15 -5.85) (size 5 5) (drill 3.18) (layers *.Cu *.Mask))
(pad A32 smd rect (at 26 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A31 smd rect (at 25 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A30 smd rect (at 24 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A29 smd rect (at 23 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A28 smd rect (at 22 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A27 smd rect (at 21 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A26 smd rect (at 20 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A25 smd rect (at 19 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A24 smd rect (at 18 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A23 smd rect (at 17 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A22 smd rect (at 16 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A21 smd rect (at 15 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A20 smd rect (at 14 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A19 smd rect (at 13 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A18 smd rect (at 12 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A17 smd rect (at 11 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A16 smd rect (at 10 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A15 smd rect (at 9 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A14 smd rect (at 8 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A13 smd rect (at 7 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A12 smd rect (at 6 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A11 smd rect (at 3 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A10 smd rect (at 2 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A9 smd rect (at 1 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A8 smd rect (at 0 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A7 smd rect (at -1 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A6 smd rect (at -2 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A5 smd rect (at -3 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A4 smd rect (at -4 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A3 smd rect (at -5 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A2 smd rect (at -6 0) (size 0.75 4.2) (layers B.Cu B.Paste B.Mask))
(pad A1 smd rect (at -7 -0.5) (size 0.75 3.2) (layers B.Cu B.Paste B.Mask))
(pad B32 smd rect (at 26 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B31 smd rect (at 25 -0.5) (size 0.75 3.2) (layers F.Cu F.Paste F.Mask))
(pad B30 smd rect (at 24 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B29 smd rect (at 23 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B28 smd rect (at 22 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B27 smd rect (at 21 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B26 smd rect (at 20 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B25 smd rect (at 19 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B24 smd rect (at 18 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B23 smd rect (at 17 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B22 smd rect (at 16 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B21 smd rect (at 15 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B20 smd rect (at 14 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B19 smd rect (at 13 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B18 smd rect (at 12 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B17 smd rect (at 11 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B16 smd rect (at 10 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B15 smd rect (at 9 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B14 smd rect (at 8 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B13 smd rect (at 7 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B12 smd rect (at 6 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B11 smd rect (at 3 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B10 smd rect (at 2 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B9 smd rect (at 1 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B8 smd rect (at 0 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B7 smd rect (at -1 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B6 smd rect (at -2 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B5 smd rect (at -3 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B4 smd rect (at -4 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B3 smd rect (at -5 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B2 smd rect (at -6 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
(pad B1 smd rect (at -7 0) (size 0.75 4.2) (layers F.Cu F.Paste F.Mask))
)