From 01fd3bbeeec0e8202030841bfa9e7b005015c635 Mon Sep 17 00:00:00 2001 From: David Shah Date: Fri, 3 Aug 2018 19:00:55 +0200 Subject: [PATCH] ecp5_mainboard: Adding some 'glue' parts, preparing for USB-C and DP schematics Signed-off-by: David Shah --- hardware/ecp5_mainboard/debug.sch | 2 +- hardware/ecp5_mainboard/ecp5_mainboard.sch | 8 +- hardware/ecp5_mainboard/fpga_pwr.sch | 2 +- hardware/ecp5_mainboard/power.sch | 2 +- hardware/ecp5_mainboard/sym-lib-table | 1 + hardware/ecp5_mainboard/usbc_dp.sch | 37 +++++++ hardware/lib/eco_glue.dcm | 12 +++ hardware/lib/eco_glue.lib | 108 +++++++++++++++++++++ 8 files changed, 168 insertions(+), 4 deletions(-) create mode 100644 hardware/ecp5_mainboard/usbc_dp.sch create mode 100644 hardware/lib/eco_glue.dcm create mode 100644 hardware/lib/eco_glue.lib diff --git a/hardware/ecp5_mainboard/debug.sch b/hardware/ecp5_mainboard/debug.sch index 51f0281..2b8a0b4 100644 --- a/hardware/ecp5_mainboard/debug.sch +++ b/hardware/ecp5_mainboard/debug.sch @@ -4,7 +4,7 @@ EELAYER 26 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 -Sheet 4 4 +Sheet 4 5 Title "" Date "" Rev "" diff --git a/hardware/ecp5_mainboard/ecp5_mainboard.sch b/hardware/ecp5_mainboard/ecp5_mainboard.sch index 159ffca..e326b14 100644 --- a/hardware/ecp5_mainboard/ecp5_mainboard.sch +++ b/hardware/ecp5_mainboard/ecp5_mainboard.sch @@ -4,7 +4,7 @@ EELAYER 26 0 EELAYER END $Descr A4 11693 8268 encoding utf-8 -Sheet 1 4 +Sheet 1 5 Title "" Date "" Rev "" @@ -32,4 +32,10 @@ U 62793184 F0 "Debug Interface" 50 F1 "debug.sch" 50 $EndSheet +$Sheet +S 1000 3500 2400 1000 +U 5B642DC1 +F0 "USB-C + DisplayPort" 50 +F1 "usbc_dp.sch" 50 +$EndSheet $EndSCHEMATC diff --git a/hardware/ecp5_mainboard/fpga_pwr.sch b/hardware/ecp5_mainboard/fpga_pwr.sch index 7ad4bcb..20df0a7 100644 --- a/hardware/ecp5_mainboard/fpga_pwr.sch +++ b/hardware/ecp5_mainboard/fpga_pwr.sch @@ -4,7 +4,7 @@ EELAYER 26 0 EELAYER END $Descr A1 33110 23386 encoding utf-8 -Sheet 3 4 +Sheet 3 5 Title "" Date "" Rev "" diff --git a/hardware/ecp5_mainboard/power.sch b/hardware/ecp5_mainboard/power.sch index d5f5fec..bc25ebb 100644 --- a/hardware/ecp5_mainboard/power.sch +++ b/hardware/ecp5_mainboard/power.sch @@ -4,7 +4,7 @@ EELAYER 26 0 EELAYER END $Descr A3 16535 11693 encoding utf-8 -Sheet 2 4 +Sheet 2 5 Title "" Date "" Rev "" diff --git a/hardware/ecp5_mainboard/sym-lib-table b/hardware/ecp5_mainboard/sym-lib-table index 542dde8..c986972 100644 --- a/hardware/ecp5_mainboard/sym-lib-table +++ b/hardware/ecp5_mainboard/sym-lib-table @@ -4,4 +4,5 @@ (lib (name eco_power)(type Legacy)(uri ${KIPRJMOD}/../lib/eco_power.lib)(options "")(descr "")) (lib (name eco_virtual)(type Legacy)(uri ${KIPRJMOD}/../lib/eco_virtual.lib)(options "")(descr "")) (lib (name eco_memory)(type Legacy)(uri ${KIPRJMOD}/../lib/eco_memory.lib)(options "")(descr "")) + (lib (name eco_glue)(type Legacy)(uri ${KIPRJMOD}/../lib/eco_glue.lib)(options "")(descr "")) ) diff --git a/hardware/ecp5_mainboard/usbc_dp.sch b/hardware/ecp5_mainboard/usbc_dp.sch new file mode 100644 index 0000000..ab88ce7 --- /dev/null +++ b/hardware/ecp5_mainboard/usbc_dp.sch @@ -0,0 +1,37 @@ +EESchema Schematic File Version 4 +LIBS:ecp5_mainboard-cache +EELAYER 26 0 +EELAYER END +$Descr A3 16535 11693 +encoding utf-8 +Sheet 5 5 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L ECP5UM5G:ECP5UM5G_85_CABGA756 U? +U 12 1 5B642DD8 +P 11800 3200 +F 0 "U?" H 12731 2803 60 0000 L CNN +F 1 "ECP5UM5G_85_CABGA756" H 12731 2697 60 0000 L CNN +F 2 "" H 11800 3200 50 0001 C CNN +F 3 "" H 11800 3200 50 0001 C CNN +F 4 "ECP5UM5G_85" H 11950 3150 60 0001 R CNN "manf#" + 12 11800 3200 + 1 0 0 -1 +$EndComp +Text Label 11100 4000 0 50 ~ 0 +DPC_REFCLK+ +Wire Wire Line + 11100 4000 11800 4000 +Wire Wire Line + 11100 4100 11800 4100 +Text Label 11100 4100 0 50 ~ 0 +DPC_REFCLK- +$EndSCHEMATC diff --git a/hardware/lib/eco_glue.dcm b/hardware/lib/eco_glue.dcm new file mode 100644 index 0000000..f6c8f43 --- /dev/null +++ b/hardware/lib/eco_glue.dcm @@ -0,0 +1,12 @@ +EESchema-DOCLIB Version 2.0 +# +$CMP 5P49V6965 +D VersaClock® 6E Programmable Clock Generator 1kHz-350MHz +K clock pll reference +$ENDCMP +# +$CMP CBTL02043A +D 3.3 V, 2 differential channel, 2:1 MUX/deMUX switch, up to 10Gbps +$ENDCMP +# +#End Doc Library diff --git a/hardware/lib/eco_glue.lib b/hardware/lib/eco_glue.lib new file mode 100644 index 0000000..7201f74 --- /dev/null +++ b/hardware/lib/eco_glue.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# 5P49V6965 +# +DEF 5P49V6965 U 0 40 Y Y 1 F N +F0 "U" 0 50 50 H V C CNN +F1 "5P49V6965" 0 -50 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +S -800 1100 800 -1000 0 1 0 f +X CLKIN+ 1 -1000 200 200 R 50 50 1 1 I +X VddO4 10 1000 -500 200 L 50 50 1 1 W +X OUT4+ 11 1000 -600 200 L 50 50 1 1 O +X OUT4- 12 1000 -700 200 L 50 50 1 1 O +X OUT3- 13 1000 -200 200 L 50 50 1 1 O +X OUT3+ 14 1000 -100 200 L 50 50 1 1 O +X VddO3 15 1000 0 200 L 50 50 1 1 W +X OUT2- 16 1000 300 200 L 50 50 1 1 O +X OUT2+ 17 1000 400 200 L 50 50 1 1 O +X VddO2 18 1000 500 200 L 50 50 1 1 W +X OUT1- 19 1000 800 200 L 50 50 1 1 O +X CLKIN- 2 -1000 100 200 R 50 50 1 1 I +X OUT1+ 20 1000 900 200 L 50 50 1 1 O +X VddO1 21 1000 1000 200 L 50 50 1 1 W +X VddD 22 -1000 900 200 R 50 50 1 1 W +X VddO0 23 -1000 800 200 R 50 50 1 1 W +X OUT0_SEL_I2CB 24 -1000 -700 200 R 50 50 1 1 O +X GND 25 -1000 -900 200 R 50 50 1 1 W +X XOUT 3 -1000 400 200 R 50 50 1 1 O +X XIN/REF 4 -1000 600 200 R 50 50 1 1 I +X VddA 5 -1000 1000 200 R 50 50 1 1 W +X CLKSEL 6 -1000 -100 200 R 50 50 1 1 I +X SD/OE 7 -1000 -200 200 R 50 50 1 1 I +X SEL1/SDA 8 -1000 -400 200 R 50 50 1 1 C +X SEL0/SCL 9 -1000 -500 200 R 50 50 1 1 C +ENDDRAW +ENDDEF +# +# CBTL02043A +# +DEF CBTL02043A U 0 40 Y Y 1 F N +F0 "U" -500 -650 50 H V L CNN +F1 "CBTL02043A" 0 1050 50 H V C CNN +F2 "" 25 0 50 H I C CNN +F3 "" 25 0 50 H I C CNN +DRAW +C -200 400 10 0 1 0 F +C -150 300 10 0 1 0 F +C -100 700 10 0 1 0 F +C -50 800 10 0 1 0 F +S -500 1200 500 -600 0 1 0 f +P 2 0 1 0 -300 -150 -250 -150 N +P 2 0 1 0 -300 -50 -250 -50 N +P 2 0 1 0 -300 300 -225 300 N +P 2 0 1 0 -300 700 -225 700 N +P 2 0 1 0 -225 400 -300 400 N +P 2 0 1 0 -225 800 -300 800 N +P 2 0 1 0 -200 -150 -150 -150 N +P 2 0 1 0 -200 -50 -150 -50 N +P 2 0 1 0 -150 200 -150 300 N +P 2 0 1 0 -100 -150 -50 -150 N +P 2 0 1 0 -100 -50 -50 -50 N +P 2 0 1 0 50 50 50 100 N +P 2 0 1 0 100 -50 100 0 N +P 2 0 1 0 100 50 100 100 N +P 2 0 1 0 125 100 275 100 N +P 2 0 1 0 125 200 275 200 N +P 2 0 1 0 125 300 275 300 N +P 2 0 1 0 125 400 275 400 N +P 2 0 1 0 125 500 275 500 N +P 2 0 1 0 125 600 275 600 N +P 2 0 1 0 125 700 275 700 N +P 2 0 1 0 275 800 125 800 N +P 3 0 1 0 -225 700 0 700 125 750 N +P 3 0 1 0 -225 800 0 800 125 850 N +P 3 0 1 0 0 -50 50 -50 50 0 N +P 4 0 1 0 -200 400 -200 200 0 200 125 250 N +P 4 0 1 0 -150 200 -150 100 0 100 125 150 N +P 4 0 1 0 -100 700 -100 300 0 300 125 350 N +P 4 0 1 0 -50 800 -50 400 0 400 125 450 N +P 5 0 1 0 -225 300 -150 300 -150 500 0 500 125 550 N +P 5 0 1 0 0 -150 100 -150 50 -150 100 -150 100 -100 N +P 6 0 1 0 -225 400 -200 400 -200 500 -200 600 0 600 125 650 N +X Vdd 1 -700 1100 200 R 50 50 1 1 W +X Vdd 10 -700 1000 200 R 50 50 1 1 W +X GND 11 -700 -400 200 R 50 50 1 1 W +X C1- 12 700 100 200 L 50 50 1 1 P +X C1+ 13 700 200 200 L 50 50 1 1 P +X C0- 14 700 300 200 L 50 50 1 1 P +X C0+ 15 700 400 200 L 50 50 1 1 P +X B1- 16 700 500 200 L 50 50 1 1 P +X B1+ 17 700 600 200 L 50 50 1 1 P +X B0- 18 700 700 200 L 50 50 1 1 P +X B0+ 19 700 800 200 L 50 50 1 1 P +X XSD 2 -700 -50 200 R 50 50 1 1 I +X GND 20 -700 -300 200 R 50 50 1 1 W +X GND 21 -700 -500 200 R 50 50 1 1 W +X A0+ 3 -700 800 200 R 50 50 1 1 P +X A0- 3 -700 700 200 R 50 50 1 1 P +X A1+ 7 -700 400 200 R 50 50 1 1 P +X A1- 8 -700 300 200 R 50 50 1 1 P +X SEL 9 -700 -150 200 R 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library