diff --git a/hardware/ecp5_mainboard/ecp5_mainboard.kicad_pcb b/hardware/ecp5_mainboard/ecp5_mainboard.kicad_pcb index 46ccdaf..20dbb95 100644 --- a/hardware/ecp5_mainboard/ecp5_mainboard.kicad_pcb +++ b/hardware/ecp5_mainboard/ecp5_mainboard.kicad_pcb @@ -3,10 +3,10 @@ (general (thickness 1.6) (drawings 42) - (tracks 17967) + (tracks 18698) (zones 0) - (modules 508) - (nets 719) + (modules 507) + (nets 718) ) (page A4) @@ -40,7 +40,7 @@ ) (setup - (last_trace_width 0.0889) + (last_trace_width 0.1) (user_trace_width 0.1) (user_trace_width 0.15) (user_trace_width 0.2) @@ -580,254 +580,253 @@ (net 468 "/FPGA IO/EXT0_1+") (net 469 "/FPGA IO/EXT0_0-") (net 470 "/FPGA IO/EXT0_0+") - (net 471 "/FPGA IO/EXT3_0+") - (net 472 "/FPGA IO/EXT3_0-") - (net 473 "/FPGA IO/EXT3_1+") - (net 474 "/FPGA IO/EXT3_1-") - (net 475 "/FPGA IO/EXT3_2+") - (net 476 "/FPGA IO/EXT3_2-") - (net 477 "/FPGA IO/EXT3_3+") - (net 478 "/FPGA IO/EXT3_3-") - (net 479 "/FPGA IO/EXT3_4+") - (net 480 "/FPGA IO/EXT3_4-") - (net 481 "/FPGA IO/EXT3_5+") - (net 482 "/FPGA IO/EXT3_5-") - (net 483 "/FPGA IO/EXT3_6+") - (net 484 "/FPGA IO/EXT3_6-") - (net 485 "/FPGA IO/EXT3_7+") - (net 486 "/FPGA IO/EXT3_7-") - (net 487 "/FPGA IO/EXT3_8+") - (net 488 "/FPGA IO/EXT3_8-") - (net 489 "/FPGA IO/EXT3_9+") - (net 490 "/FPGA IO/EXT3_9-") - (net 491 "/FPGA IO/EXT3_10+") - (net 492 "/FPGA IO/EXT3_10-") - (net 493 "/FPGA IO/EXT3_11+") - (net 494 "/FPGA IO/EXT3_11-") - (net 495 "Net-(J8-Pad38)") - (net 496 "Net-(J6-Pad38)") - (net 497 "/FPGA IO/EXT1_11-") - (net 498 "/FPGA IO/EXT1_11+") - (net 499 "/FPGA IO/EXT1_10-") - (net 500 "/FPGA IO/EXT1_10+") - (net 501 "/FPGA IO/EXT1_9-") - (net 502 "/FPGA IO/EXT1_9+") - (net 503 "/FPGA IO/EXT1_8-") - (net 504 "/FPGA IO/EXT1_8+") - (net 505 "/FPGA IO/EXT1_7-") - (net 506 "/FPGA IO/EXT1_7+") - (net 507 "/FPGA IO/EXT1_6-") - (net 508 "/FPGA IO/EXT1_6+") - (net 509 "/FPGA IO/EXT1_5-") - (net 510 "/FPGA IO/EXT1_5+") - (net 511 "/FPGA IO/EXT1_4-") - (net 512 "/FPGA IO/EXT1_4+") - (net 513 "/FPGA IO/EXT1_3-") - (net 514 "/FPGA IO/EXT1_3+") - (net 515 "/FPGA IO/EXT1_2-") - (net 516 "/FPGA IO/EXT1_2+") - (net 517 "/FPGA IO/EXT1_1-") - (net 518 "/FPGA IO/EXT1_1+") - (net 519 "/FPGA IO/EXT1_0-") - (net 520 "/FPGA IO/EXT1_0+") - (net 521 "/FPGA IO/EXT2_0+") - (net 522 "/FPGA IO/EXT2_0-") - (net 523 "/FPGA IO/EXT2_1+") - (net 524 "/FPGA IO/EXT2_1-") - (net 525 "/FPGA IO/EXT2_2+") - (net 526 "/FPGA IO/EXT2_2-") - (net 527 "/FPGA IO/EXT2_3+") - (net 528 "/FPGA IO/EXT2_3-") - (net 529 "/FPGA IO/EXT2_4+") - (net 530 "/FPGA IO/EXT2_4-") - (net 531 "/FPGA IO/EXT2_5+") - (net 532 "/FPGA IO/EXT2_5-") - (net 533 "/FPGA IO/EXT2_6+") - (net 534 "/FPGA IO/EXT2_6-") - (net 535 "/FPGA IO/EXT2_7+") - (net 536 "/FPGA IO/EXT2_7-") - (net 537 "/FPGA IO/EXT2_8+") - (net 538 "/FPGA IO/EXT2_8-") - (net 539 "/FPGA IO/EXT2_9+") - (net 540 "/FPGA IO/EXT2_9-") - (net 541 "/FPGA IO/EXT2_10+") - (net 542 "/FPGA IO/EXT2_10-") - (net 543 "/FPGA IO/EXT2_11+") - (net 544 "/FPGA IO/EXT2_11-") - (net 545 "Net-(J7-Pad38)") - (net 546 "Net-(C132-Pad1)") - (net 547 "Net-(C135-Pad1)") - (net 548 "Net-(C133-Pad1)") - (net 549 "Net-(C134-Pad1)") - (net 550 "Net-(P3-PadB5)") - (net 551 "Net-(P3-PadB6)") - (net 552 "Net-(P3-PadB8)") - (net 553 "Net-(P3-PadB9)") - (net 554 "Net-(P3-PadB10)") - (net 555 PCIe_~WAKE) - (net 556 "Net-(P3-PadB12)") - (net 557 "/PCIe + SATA/~PRSNT2~_X1") - (net 558 "Net-(P3-PadB23)") - (net 559 "Net-(P3-PadB24)") - (net 560 "Net-(P3-PadB27)") - (net 561 "Net-(P3-PadB28)") - (net 562 "Net-(P3-PadB30)") - (net 563 "/PCIe + SATA/~PRSNT2~_X4") - (net 564 "/PCIe + SATA/~PRSNT1") - (net 565 "Net-(P3-PadA5)") - (net 566 "Net-(P3-PadA6)") - (net 567 "Net-(P3-PadA7)") - (net 568 "Net-(P3-PadA8)") - (net 569 "Net-(P3-PadA9)") - (net 570 "Net-(P3-PadA10)") - (net 571 "Net-(P3-PadA19)") - (net 572 "Net-(P3-PadA25)") - (net 573 "Net-(P3-PadA26)") - (net 574 "Net-(P3-PadA29)") - (net 575 "Net-(P3-PadA30)") - (net 576 "Net-(P3-PadA32)") - (net 577 "Net-(U14-Pad2)") - (net 578 "Net-(U14-Pad1)") - (net 579 "Net-(U26-Pad1)") - (net 580 "Net-(U26-Pad2)") - (net 581 "/FPGA IO/CLK100+") - (net 582 "/FPGA IO/CLK100-") - (net 583 "Net-(J3-Pad14)") - (net 584 "Net-(J3-Pad13)") - (net 585 LED2) - (net 586 LED11) - (net 587 LED10) - (net 588 LED0) - (net 589 LED1) - (net 590 LED3) - (net 591 LED4) - (net 592 LED5) - (net 593 LED6) - (net 594 LED7) - (net 595 LED8) - (net 596 LED9) - (net 597 "Net-(F2-Pad2)") - (net 598 "Net-(U15-PadR1)") - (net 599 "Net-(U15-PadA2)") - (net 600 "Net-(U15-PadT2)") - (net 601 "Net-(U15-PadAB2)") - (net 602 "Net-(U15-PadAC2)") - (net 603 "Net-(U15-PadAE2)") - (net 604 "Net-(U15-PadAG2)") - (net 605 "Net-(U15-PadA3)") - (net 606 "Net-(U15-PadV3)") - (net 607 "Net-(U15-PadW3)") - (net 608 "Net-(U15-PadY3)") - (net 609 "Net-(U15-PadAC3)") - (net 610 "Net-(U15-PadAG3)") - (net 611 "Net-(U15-PadAL3)") - (net 612 "Net-(U15-PadB4)") - (net 613 "Net-(U15-PadH4)") - (net 614 "Net-(U15-PadAC4)") - (net 615 "Net-(U15-PadA5)") - (net 616 "Net-(U15-PadL5)") - (net 617 "Net-(U15-PadW6)") - (net 618 "Net-(U15-PadD7)") - (net 619 "Net-(U15-PadE7)") - (net 620 "Net-(U15-PadAE7)") - (net 621 "Net-(U15-PadG9)") - (net 622 "/PCIe + SATA/DCU0_TX0+") - (net 623 "Net-(U15-PadG10)") - (net 624 "/PCIe + SATA/DCU0_TX0-") - (net 625 "Net-(U15-PadG11)") - (net 626 "/PCIe + SATA/DCU0_TX1+") - (net 627 "/PCIe + SATA/DCU0_TX1-") - (net 628 "/FPGA IO/PMOD1_10") - (net 629 "/FPGA IO/PMOD1_9") - (net 630 "Net-(U15-PadG14)") - (net 631 "Net-(U15-PadG15)") - (net 632 "Net-(U15-PadAK15)") - (net 633 "Net-(U15-PadG16)") - (net 634 "Net-(U15-PadAK16)") - (net 635 "Net-(U15-PadG17)") - (net 636 "Net-(U15-PadG18)") - (net 637 "/PCIe + SATA/DCU1_TX0+") - (net 638 "Net-(U15-PadG19)") - (net 639 "/PCIe + SATA/DCU1_TX0-") - (net 640 "/FPGA IO/PMOD1_8") - (net 641 "/FPGA IO/PMOD1_7") - (net 642 "/PCIe + SATA/DCU1_TX1+") - (net 643 "/PCIe + SATA/DCU1_TX1-") - (net 644 "/FPGA IO/EXIO_5") - (net 645 "/FPGA IO/EXIO_4") - (net 646 "/FPGA IO/EXIO_3") - (net 647 "Net-(U15-PadG22)") - (net 648 "/FPGA IO/PMOD1_3") - (net 649 "/FPGA IO/PMOD1_2") - (net 650 "/FPGA IO/PMOD1_0") - (net 651 "/FPGA IO/PMOD1_1") - (net 652 "/FPGA IO/EXIO_2") - (net 653 "Net-(U15-PadG23)") - (net 654 "/FPGA IO/EXIO_1") - (net 655 "/FPGA IO/PMOD0_10") - (net 656 "/FPGA IO/EXIO_0") - (net 657 "/FPGA IO/PMOD0_9") - (net 658 "Net-(U15-PadG24)") - (net 659 "Net-(U15-PadAG24)") - (net 660 "Net-(U15-PadAK24)") - (net 661 "/FPGA IO/PMOD0_8") - (net 662 "/FPGA IO/PMOD0_3") - (net 663 "/FPGA IO/PMOD0_7") - (net 664 "/FPGA IO/PMOD0_2") - (net 665 "/FPGA IO/PMOD0_1") - (net 666 "Net-(U15-PadAK25)") - (net 667 "/FPGA IO/PMOD0_0") - (net 668 "Net-(U15-PadB26)") - (net 669 "Net-(U15-PadE26)") - (net 670 "Net-(U15-PadAE26)") - (net 671 "Net-(U15-PadH27)") - (net 672 "Net-(U15-PadJ27)") - (net 673 "Net-(U15-PadW27)") - (net 674 "Net-(U15-PadC28)") - (net 675 "Net-(U15-PadD28)") - (net 676 "Net-(U15-PadH28)") - (net 677 "Net-(U15-PadL28)") - (net 678 "Net-(U15-PadP28)") - (net 679 "Net-(U15-PadAC28)") - (net 680 "Net-(U15-PadAE28)") - (net 681 "Net-(U15-PadC29)") - (net 682 "Net-(U15-PadH29)") - (net 683 "Net-(U15-PadP29)") - (net 684 "Net-(U15-PadAB29)") - (net 685 "Net-(U15-PadAC29)") - (net 686 "Net-(U15-PadAE29)") - (net 687 "Net-(U15-PadAJ29)") - (net 688 "Net-(U15-PadC30)") - (net 689 "Net-(U15-PadP30)") - (net 690 "Net-(U15-PadR30)") - (net 691 "Net-(U15-PadV30)") - (net 692 "Net-(U15-PadAB30)") - (net 693 "Net-(U15-PadAE30)") - (net 694 "Net-(U15-PadAJ30)") - (net 695 "Net-(U15-PadA31)") - (net 696 "Net-(U15-PadAG31)") - (net 697 "Net-(U15-PadAK31)") - (net 698 "Net-(U15-PadAG32)") - (net 699 "Net-(J2-Pad1)") - (net 700 "Net-(J2-Pad4)") - (net 701 "Net-(U15-PadT30)") - (net 702 "Net-(U15-PadAE27)") - (net 703 "Net-(U15-PadAD27)") - (net 704 "Net-(U15-PadF30)") - (net 705 "Net-(U15-PadN27)") - (net 706 "Net-(U15-PadU27)") - (net 707 "Net-(U15-PadU29)") - (net 708 "Net-(U15-PadW30)") - (net 709 "Net-(U15-PadY30)") - (net 710 "Net-(U15-PadY29)") - (net 711 "Net-(U15-PadW1)") - (net 712 "Net-(U15-PadV1)") - (net 713 "Net-(U15-PadY7)") - (net 714 "Net-(U15-PadY6)") - (net 715 "Net-(U15-PadAC5)") - (net 716 "Net-(U15-PadAD4)") - (net 717 "Net-(U15-PadY4)") - (net 718 "Net-(U15-PadW4)") + (net 471 "Net-(J6-Pad38)") + (net 472 "/FPGA IO/EXT1_11-") + (net 473 "/FPGA IO/EXT1_11+") + (net 474 "/FPGA IO/EXT1_10-") + (net 475 "/FPGA IO/EXT1_10+") + (net 476 "/FPGA IO/EXT1_9-") + (net 477 "/FPGA IO/EXT1_9+") + (net 478 "/FPGA IO/EXT1_8-") + (net 479 "/FPGA IO/EXT1_8+") + (net 480 "/FPGA IO/EXT1_7-") + (net 481 "/FPGA IO/EXT1_7+") + (net 482 "/FPGA IO/EXT1_6-") + (net 483 "/FPGA IO/EXT1_6+") + (net 484 "/FPGA IO/EXT1_5-") + (net 485 "/FPGA IO/EXT1_5+") + (net 486 "/FPGA IO/EXT1_4-") + (net 487 "/FPGA IO/EXT1_4+") + (net 488 "/FPGA IO/EXT1_3-") + (net 489 "/FPGA IO/EXT1_3+") + (net 490 "/FPGA IO/EXT1_2-") + (net 491 "/FPGA IO/EXT1_2+") + (net 492 "/FPGA IO/EXT1_1-") + (net 493 "/FPGA IO/EXT1_1+") + (net 494 "/FPGA IO/EXT1_0-") + (net 495 "/FPGA IO/EXT1_0+") + (net 496 "/FPGA IO/EXT2_0+") + (net 497 "/FPGA IO/EXT2_0-") + (net 498 "/FPGA IO/EXT2_1+") + (net 499 "/FPGA IO/EXT2_1-") + (net 500 "/FPGA IO/EXT2_2+") + (net 501 "/FPGA IO/EXT2_2-") + (net 502 "/FPGA IO/EXT2_3+") + (net 503 "/FPGA IO/EXT2_3-") + (net 504 "/FPGA IO/EXT2_4+") + (net 505 "/FPGA IO/EXT2_4-") + (net 506 "/FPGA IO/EXT2_5+") + (net 507 "/FPGA IO/EXT2_5-") + (net 508 "/FPGA IO/EXT2_6+") + (net 509 "/FPGA IO/EXT2_6-") + (net 510 "/FPGA IO/EXT2_7+") + (net 511 "/FPGA IO/EXT2_7-") + (net 512 "/FPGA IO/EXT2_8+") + (net 513 "/FPGA IO/EXT2_8-") + (net 514 "/FPGA IO/EXT2_9+") + (net 515 "/FPGA IO/EXT2_9-") + (net 516 "/FPGA IO/EXT2_10+") + (net 517 "/FPGA IO/EXT2_10-") + (net 518 "/FPGA IO/EXT2_11+") + (net 519 "/FPGA IO/EXT2_11-") + (net 520 "Net-(J7-Pad38)") + (net 521 "Net-(C132-Pad1)") + (net 522 "Net-(C135-Pad1)") + (net 523 "Net-(C133-Pad1)") + (net 524 "Net-(C134-Pad1)") + (net 525 "Net-(P3-PadB5)") + (net 526 "Net-(P3-PadB6)") + (net 527 "Net-(P3-PadB8)") + (net 528 "Net-(P3-PadB9)") + (net 529 "Net-(P3-PadB10)") + (net 530 PCIe_~WAKE) + (net 531 "Net-(P3-PadB12)") + (net 532 "/PCIe + SATA/~PRSNT2~_X1") + (net 533 "Net-(P3-PadB23)") + (net 534 "Net-(P3-PadB24)") + (net 535 "Net-(P3-PadB27)") + (net 536 "Net-(P3-PadB28)") + (net 537 "Net-(P3-PadB30)") + (net 538 "/PCIe + SATA/~PRSNT2~_X4") + (net 539 "/PCIe + SATA/~PRSNT1") + (net 540 "Net-(P3-PadA5)") + (net 541 "Net-(P3-PadA6)") + (net 542 "Net-(P3-PadA7)") + (net 543 "Net-(P3-PadA8)") + (net 544 "Net-(P3-PadA9)") + (net 545 "Net-(P3-PadA10)") + (net 546 "Net-(P3-PadA19)") + (net 547 "Net-(P3-PadA25)") + (net 548 "Net-(P3-PadA26)") + (net 549 "Net-(P3-PadA29)") + (net 550 "Net-(P3-PadA30)") + (net 551 "Net-(P3-PadA32)") + (net 552 "Net-(U14-Pad2)") + (net 553 "Net-(U14-Pad1)") + (net 554 "Net-(U26-Pad1)") + (net 555 "Net-(U26-Pad2)") + (net 556 "/FPGA IO/CLK100+") + (net 557 "/FPGA IO/CLK100-") + (net 558 "Net-(J3-Pad14)") + (net 559 "Net-(J3-Pad13)") + (net 560 LED2) + (net 561 LED11) + (net 562 LED10) + (net 563 LED0) + (net 564 LED1) + (net 565 LED3) + (net 566 LED4) + (net 567 LED5) + (net 568 LED6) + (net 569 LED7) + (net 570 LED8) + (net 571 LED9) + (net 572 "Net-(F2-Pad2)") + (net 573 "Net-(U15-PadR1)") + (net 574 "Net-(U15-PadA2)") + (net 575 "Net-(U15-PadT2)") + (net 576 "Net-(U15-PadAB2)") + (net 577 "Net-(U15-PadAC2)") + (net 578 "Net-(U15-PadAE2)") + (net 579 "Net-(U15-PadAG2)") + (net 580 "Net-(U15-PadA3)") + (net 581 "Net-(U15-PadV3)") + (net 582 "Net-(U15-PadW3)") + (net 583 "Net-(U15-PadY3)") + (net 584 "Net-(U15-PadAC3)") + (net 585 "Net-(U15-PadAG3)") + (net 586 "Net-(U15-PadAL3)") + (net 587 "Net-(U15-PadB4)") + (net 588 "Net-(U15-PadH4)") + (net 589 "Net-(U15-PadAC4)") + (net 590 "Net-(U15-PadA5)") + (net 591 "Net-(U15-PadL5)") + (net 592 "Net-(U15-PadW6)") + (net 593 "Net-(U15-PadD7)") + (net 594 "Net-(U15-PadE7)") + (net 595 "Net-(U15-PadAE7)") + (net 596 "Net-(U15-PadG9)") + (net 597 "/PCIe + SATA/DCU0_TX0+") + (net 598 "Net-(U15-PadG10)") + (net 599 "/PCIe + SATA/DCU0_TX0-") + (net 600 "Net-(U15-PadG11)") + (net 601 "/PCIe + SATA/DCU0_TX1+") + (net 602 "/PCIe + SATA/DCU0_TX1-") + (net 603 "/FPGA IO/PMOD1_10") + (net 604 "/FPGA IO/PMOD1_9") + (net 605 "Net-(U15-PadG14)") + (net 606 "Net-(U15-PadG15)") + (net 607 "Net-(U15-PadAK15)") + (net 608 "Net-(U15-PadG16)") + (net 609 "Net-(U15-PadAK16)") + (net 610 "Net-(U15-PadG17)") + (net 611 "Net-(U15-PadG18)") + (net 612 "/PCIe + SATA/DCU1_TX0+") + (net 613 "Net-(U15-PadG19)") + (net 614 "/PCIe + SATA/DCU1_TX0-") + (net 615 "/FPGA IO/PMOD1_8") + (net 616 "/FPGA IO/PMOD1_7") + (net 617 "/PCIe + SATA/DCU1_TX1+") + (net 618 "/PCIe + SATA/DCU1_TX1-") + (net 619 "/FPGA IO/EXIO_5") + (net 620 "/FPGA IO/EXIO_4") + (net 621 "/FPGA IO/EXIO_3") + (net 622 "Net-(U15-PadG22)") + (net 623 "/FPGA IO/PMOD1_3") + (net 624 "/FPGA IO/PMOD1_2") + (net 625 "/FPGA IO/PMOD1_0") + (net 626 "/FPGA IO/PMOD1_1") + (net 627 "/FPGA IO/EXIO_2") + (net 628 "Net-(U15-PadG23)") + (net 629 "/FPGA IO/EXIO_1") + (net 630 "/FPGA IO/PMOD0_10") + (net 631 "/FPGA IO/EXIO_0") + (net 632 "/FPGA IO/PMOD0_9") + (net 633 "Net-(U15-PadG24)") + (net 634 "Net-(U15-PadAG24)") + (net 635 "Net-(U15-PadAK24)") + (net 636 "/FPGA IO/PMOD0_8") + (net 637 "/FPGA IO/PMOD0_3") + (net 638 "/FPGA IO/PMOD0_7") + (net 639 "/FPGA IO/PMOD0_2") + (net 640 "/FPGA IO/PMOD0_1") + (net 641 "Net-(U15-PadAK25)") + (net 642 "/FPGA IO/PMOD0_0") + (net 643 "Net-(U15-PadB26)") + (net 644 "Net-(U15-PadE26)") + (net 645 "Net-(U15-PadAE26)") + (net 646 "Net-(U15-PadH27)") + (net 647 "Net-(U15-PadJ27)") + (net 648 "Net-(U15-PadW27)") + (net 649 "Net-(U15-PadC28)") + (net 650 "Net-(U15-PadD28)") + (net 651 "Net-(U15-PadH28)") + (net 652 "Net-(U15-PadL28)") + (net 653 "Net-(U15-PadP28)") + (net 654 "Net-(U15-PadAC28)") + (net 655 "Net-(U15-PadAE28)") + (net 656 "Net-(U15-PadC29)") + (net 657 "Net-(U15-PadH29)") + (net 658 "Net-(U15-PadP29)") + (net 659 "Net-(U15-PadAB29)") + (net 660 "Net-(U15-PadAC29)") + (net 661 "Net-(U15-PadAE29)") + (net 662 "Net-(U15-PadAJ29)") + (net 663 "Net-(U15-PadC30)") + (net 664 "Net-(U15-PadP30)") + (net 665 "Net-(U15-PadR30)") + (net 666 "Net-(U15-PadV30)") + (net 667 "Net-(U15-PadAB30)") + (net 668 "Net-(U15-PadAE30)") + (net 669 "Net-(U15-PadAJ30)") + (net 670 "Net-(U15-PadA31)") + (net 671 "Net-(U15-PadAG31)") + (net 672 "Net-(U15-PadAK31)") + (net 673 "Net-(U15-PadAG32)") + (net 674 "Net-(J2-Pad1)") + (net 675 "Net-(J2-Pad4)") + (net 676 "Net-(U15-PadT30)") + (net 677 "Net-(U15-PadAE27)") + (net 678 "Net-(U15-PadAD27)") + (net 679 "Net-(U15-PadF30)") + (net 680 "Net-(U15-PadN27)") + (net 681 "Net-(U15-PadU27)") + (net 682 "Net-(U15-PadU29)") + (net 683 "Net-(U15-PadW30)") + (net 684 "Net-(U15-PadY30)") + (net 685 "Net-(U15-PadY29)") + (net 686 "Net-(U15-PadW1)") + (net 687 "Net-(U15-PadV1)") + (net 688 "Net-(U15-PadY7)") + (net 689 "Net-(U15-PadY6)") + (net 690 "Net-(U15-PadAC5)") + (net 691 "Net-(U15-PadAD4)") + (net 692 "Net-(U15-PadY4)") + (net 693 "Net-(U15-PadW4)") + (net 694 "Net-(U15-PadP7)") + (net 695 "Net-(U15-PadN7)") + (net 696 "Net-(U15-PadL7)") + (net 697 "Net-(U15-PadP6)") + (net 698 "Net-(U15-PadN6)") + (net 699 "Net-(U15-PadL6)") + (net 700 "Net-(U15-PadK5)") + (net 701 "Net-(U15-PadN4)") + (net 702 "Net-(U15-PadL4)") + (net 703 "Net-(U15-PadK4)") + (net 704 "Net-(U15-PadJ4)") + (net 705 "Net-(U15-PadN3)") + (net 706 "Net-(U15-PadL3)") + (net 707 "Net-(U15-PadL2)") + (net 708 "Net-(U15-PadK2)") + (net 709 "Net-(U15-PadL1)") + (net 710 "Net-(U15-PadK1)") + (net 711 "Net-(U15-PadJ1)") + (net 712 "Net-(U15-PadD1)") + (net 713 "Net-(U15-PadC1)") + (net 714 "Net-(U15-PadF2)") + (net 715 "Net-(U15-PadE1)") + (net 716 "Net-(U15-PadE4)") + (net 717 "Net-(U15-PadD4)") (net_class Default "This is the default net class." (clearance 0.0889) @@ -945,30 +944,6 @@ (add_net "/FPGA IO/EXT2_8-") (add_net "/FPGA IO/EXT2_9+") (add_net "/FPGA IO/EXT2_9-") - (add_net "/FPGA IO/EXT3_0+") - (add_net "/FPGA IO/EXT3_0-") - (add_net "/FPGA IO/EXT3_1+") - (add_net "/FPGA IO/EXT3_1-") - (add_net "/FPGA IO/EXT3_10+") - (add_net "/FPGA IO/EXT3_10-") - (add_net "/FPGA IO/EXT3_11+") - (add_net "/FPGA IO/EXT3_11-") - (add_net "/FPGA IO/EXT3_2+") - (add_net "/FPGA IO/EXT3_2-") - (add_net "/FPGA IO/EXT3_3+") - (add_net "/FPGA IO/EXT3_3-") - (add_net "/FPGA IO/EXT3_4+") - (add_net "/FPGA IO/EXT3_4-") - (add_net "/FPGA IO/EXT3_5+") - (add_net "/FPGA IO/EXT3_5-") - (add_net "/FPGA IO/EXT3_6+") - (add_net "/FPGA IO/EXT3_6-") - (add_net "/FPGA IO/EXT3_7+") - (add_net "/FPGA IO/EXT3_7-") - (add_net "/FPGA IO/EXT3_8+") - (add_net "/FPGA IO/EXT3_8-") - (add_net "/FPGA IO/EXT3_9+") - (add_net "/FPGA IO/EXT3_9-") (add_net "/FPGA IO/FLASH_CLK") (add_net "/FPGA IO/FLASH_D0") (add_net "/FPGA IO/FLASH_D1") @@ -1308,7 +1283,6 @@ (add_net "Net-(J5-Pad38)") (add_net "Net-(J6-Pad38)") (add_net "Net-(J7-Pad38)") - (add_net "Net-(J8-Pad38)") (add_net "Net-(L1-Pad1)") (add_net "Net-(L3-Pad1)") (add_net "Net-(L4-Pad1)") @@ -1436,13 +1410,19 @@ (add_net "Net-(U15-PadAL3)") (add_net "Net-(U15-PadB26)") (add_net "Net-(U15-PadB4)") + (add_net "Net-(U15-PadC1)") (add_net "Net-(U15-PadC28)") (add_net "Net-(U15-PadC29)") (add_net "Net-(U15-PadC30)") + (add_net "Net-(U15-PadD1)") (add_net "Net-(U15-PadD28)") + (add_net "Net-(U15-PadD4)") (add_net "Net-(U15-PadD7)") + (add_net "Net-(U15-PadE1)") (add_net "Net-(U15-PadE26)") + (add_net "Net-(U15-PadE4)") (add_net "Net-(U15-PadE7)") + (add_net "Net-(U15-PadF2)") (add_net "Net-(U15-PadF30)") (add_net "Net-(U15-PadG10)") (add_net "Net-(U15-PadG11)") @@ -1460,13 +1440,31 @@ (add_net "Net-(U15-PadH28)") (add_net "Net-(U15-PadH29)") (add_net "Net-(U15-PadH4)") + (add_net "Net-(U15-PadJ1)") (add_net "Net-(U15-PadJ27)") + (add_net "Net-(U15-PadJ4)") + (add_net "Net-(U15-PadK1)") + (add_net "Net-(U15-PadK2)") + (add_net "Net-(U15-PadK4)") + (add_net "Net-(U15-PadK5)") + (add_net "Net-(U15-PadL1)") + (add_net "Net-(U15-PadL2)") (add_net "Net-(U15-PadL28)") + (add_net "Net-(U15-PadL3)") + (add_net "Net-(U15-PadL4)") (add_net "Net-(U15-PadL5)") + (add_net "Net-(U15-PadL6)") + (add_net "Net-(U15-PadL7)") (add_net "Net-(U15-PadN27)") + (add_net "Net-(U15-PadN3)") + (add_net "Net-(U15-PadN4)") + (add_net "Net-(U15-PadN6)") + (add_net "Net-(U15-PadN7)") (add_net "Net-(U15-PadP28)") (add_net "Net-(U15-PadP29)") (add_net "Net-(U15-PadP30)") + (add_net "Net-(U15-PadP6)") + (add_net "Net-(U15-PadP7)") (add_net "Net-(U15-PadR1)") (add_net "Net-(U15-PadR30)") (add_net "Net-(U15-PadT2)") @@ -1558,6 +1556,118 @@ (add_net ~PERST) ) + (module "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" (layer F.Cu) (tedit 5BF58209) (tstamp 5BF66AD3) + (at 135 30 180) + (path /61FAF948/64AB9BC6) + (fp_text reference J7 (at -13.5 0.5 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value EXT2 (at 0 -2 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.39 3.85) (end 10.9 3.85) (layer F.SilkS) (width 0.15)) + (fp_line (start 11.32 3.85) (end 13.14 3.85) (layer F.SilkS) (width 0.15)) + (fp_line (start 10.91 3.85) (end -13.02 3.86) (layer F.SilkS) (width 0.15)) + (fp_line (start -13.02 3.25) (end -12.66 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start -13.02 3.86) (end -13.02 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 12.71 3.25) (end 13.03 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 13.14 3.25) (end 12.98 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 13.14 3.85) (end 13.14 3.25) (layer F.SilkS) (width 0.15)) + (fp_text user 1 (at -10.5 -0.75 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user 40 (at 11 -0.75 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad "" smd rect (at -11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) + (pad "" smd rect (at 11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) + (pad 40 smd rect (at 9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 105 "/FPGA IO/VCCIO7")) + (pad 39 smd rect (at 9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 105 "/FPGA IO/VCCIO7")) + (pad 38 smd rect (at 8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 520 "Net-(J7-Pad38)")) + (pad 37 smd rect (at 8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 519 "/FPGA IO/EXT2_11-")) + (pad 36 smd rect (at 7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 518 "/FPGA IO/EXT2_11+")) + (pad 35 smd rect (at 7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 34 smd rect (at 6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 517 "/FPGA IO/EXT2_10-")) + (pad 33 smd rect (at 6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 516 "/FPGA IO/EXT2_10+")) + (pad 32 smd rect (at 5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 31 smd rect (at 5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 515 "/FPGA IO/EXT2_9-")) + (pad 30 smd rect (at 4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 514 "/FPGA IO/EXT2_9+")) + (pad 29 smd rect (at 4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 28 smd rect (at 3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 513 "/FPGA IO/EXT2_8-")) + (pad 27 smd rect (at 3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 512 "/FPGA IO/EXT2_8+")) + (pad 26 smd rect (at 2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 25 smd rect (at 2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 511 "/FPGA IO/EXT2_7-")) + (pad 24 smd rect (at 1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 510 "/FPGA IO/EXT2_7+")) + (pad 23 smd rect (at 1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 22 smd rect (at 0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 509 "/FPGA IO/EXT2_6-")) + (pad 21 smd rect (at 0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 508 "/FPGA IO/EXT2_6+")) + (pad 20 smd rect (at -0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 19 smd rect (at -0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 507 "/FPGA IO/EXT2_5-")) + (pad 18 smd rect (at -1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 506 "/FPGA IO/EXT2_5+")) + (pad 17 smd rect (at -1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 16 smd rect (at -2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 505 "/FPGA IO/EXT2_4-")) + (pad 15 smd rect (at -2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 504 "/FPGA IO/EXT2_4+")) + (pad 14 smd rect (at -3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 13 smd rect (at -3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 503 "/FPGA IO/EXT2_3-")) + (pad 12 smd rect (at -4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 502 "/FPGA IO/EXT2_3+")) + (pad 11 smd rect (at -4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 10 smd rect (at -5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 501 "/FPGA IO/EXT2_2-")) + (pad 9 smd rect (at -5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 500 "/FPGA IO/EXT2_2+")) + (pad 8 smd rect (at -6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 7 smd rect (at -6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 499 "/FPGA IO/EXT2_1-")) + (pad 6 smd rect (at -7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 498 "/FPGA IO/EXT2_1+")) + (pad 5 smd rect (at -7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 24 GND)) + (pad 4 smd rect (at -8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 497 "/FPGA IO/EXT2_0-")) + (pad 3 smd rect (at -8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 496 "/FPGA IO/EXT2_0+")) + (pad 2 smd rect (at -9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 105 "/FPGA IO/VCCIO7")) + (pad 1 smd rect (at -9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) + (net 105 "/FPGA IO/VCCIO7")) + (model /home/david/3d/c-4-1734839-0-c-3d.stp + (offset (xyz 0 -5 1)) + (scale (xyz 1 1 1)) + (rotate (xyz -90 0 0)) + ) + ) + (module Capacitor_SMD:C_0201_0603Metric (layer B.Cu) (tedit 5BF97B9C) (tstamp 5C08F877) (at 90.2 111.585 90) (descr "Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator") @@ -2352,21 +2462,21 @@ (pad B4 smd rect (at -4 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B5 smd rect (at -3 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 550 "Net-(P3-PadB5)")) + (net 525 "Net-(P3-PadB5)")) (pad B6 smd rect (at -2 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 551 "Net-(P3-PadB6)")) + (net 526 "Net-(P3-PadB6)")) (pad B7 smd rect (at -1 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B8 smd rect (at 0 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 552 "Net-(P3-PadB8)")) + (net 527 "Net-(P3-PadB8)")) (pad B9 smd rect (at 1 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 553 "Net-(P3-PadB9)")) + (net 528 "Net-(P3-PadB9)")) (pad B10 smd rect (at 2 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 554 "Net-(P3-PadB10)")) + (net 529 "Net-(P3-PadB10)")) (pad B11 smd rect (at 3 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 555 PCIe_~WAKE)) + (net 530 PCIe_~WAKE)) (pad B12 smd rect (at 6 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 556 "Net-(P3-PadB12)")) + (net 531 "Net-(P3-PadB12)")) (pad B13 smd rect (at 7 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B14 smd rect (at 8 0) (size 0.75 4.2) (layers F.Cu F.Mask) @@ -2376,7 +2486,7 @@ (pad B16 smd rect (at 10 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B17 smd rect (at 11 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 557 "/PCIe + SATA/~PRSNT2~_X1")) + (net 532 "/PCIe + SATA/~PRSNT2~_X1")) (pad B18 smd rect (at 12 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B19 smd rect (at 13 0) (size 0.75 4.2) (layers F.Cu F.Mask) @@ -2388,27 +2498,27 @@ (pad B22 smd rect (at 16 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B23 smd rect (at 17 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 558 "Net-(P3-PadB23)")) + (net 533 "Net-(P3-PadB23)")) (pad B24 smd rect (at 18 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 559 "Net-(P3-PadB24)")) + (net 534 "Net-(P3-PadB24)")) (pad B25 smd rect (at 19 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B26 smd rect (at 20 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B27 smd rect (at 21 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 560 "Net-(P3-PadB27)")) + (net 535 "Net-(P3-PadB27)")) (pad B28 smd rect (at 22 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 561 "Net-(P3-PadB28)")) + (net 536 "Net-(P3-PadB28)")) (pad B29 smd rect (at 23 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad B30 smd rect (at 24 0) (size 0.75 4.2) (layers F.Cu F.Mask) - (net 562 "Net-(P3-PadB30)")) + (net 537 "Net-(P3-PadB30)")) (pad B31 smd rect (at 25 -0.5) (size 0.75 3.2) (layers F.Cu F.Mask) - (net 563 "/PCIe + SATA/~PRSNT2~_X4")) + (net 538 "/PCIe + SATA/~PRSNT2~_X4")) (pad B32 smd rect (at 26 0) (size 0.75 4.2) (layers F.Cu F.Mask) (net 24 GND)) (pad A1 smd rect (at -7 -0.5) (size 0.75 3.2) (layers B.Cu B.Mask) - (net 564 "/PCIe + SATA/~PRSNT1")) + (net 539 "/PCIe + SATA/~PRSNT1")) (pad A2 smd rect (at -6 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 126 PCIe_12V)) (pad A3 smd rect (at -5 0) (size 0.75 4.2) (layers B.Cu B.Mask) @@ -2416,17 +2526,17 @@ (pad A4 smd rect (at -4 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A5 smd rect (at -3 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 565 "Net-(P3-PadA5)")) + (net 540 "Net-(P3-PadA5)")) (pad A6 smd rect (at -2 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 566 "Net-(P3-PadA6)")) + (net 541 "Net-(P3-PadA6)")) (pad A7 smd rect (at -1 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 567 "Net-(P3-PadA7)")) + (net 542 "Net-(P3-PadA7)")) (pad A8 smd rect (at 0 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 568 "Net-(P3-PadA8)")) + (net 543 "Net-(P3-PadA8)")) (pad A9 smd rect (at 1 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 569 "Net-(P3-PadA9)")) + (net 544 "Net-(P3-PadA9)")) (pad A10 smd rect (at 2 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 570 "Net-(P3-PadA10)")) + (net 545 "Net-(P3-PadA10)")) (pad A11 smd rect (at 3 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 129 "Net-(P3-PadA11)")) (pad A12 smd rect (at 6 0) (size 0.75 4.2) (layers B.Cu B.Mask) @@ -2444,7 +2554,7 @@ (pad A18 smd rect (at 12 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A19 smd rect (at 13 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 571 "Net-(P3-PadA19)")) + (net 546 "Net-(P3-PadA19)")) (pad A20 smd rect (at 14 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A21 smd rect (at 15 0) (size 0.75 4.2) (layers B.Cu B.Mask) @@ -2456,21 +2566,21 @@ (pad A24 smd rect (at 18 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A25 smd rect (at 19 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 572 "Net-(P3-PadA25)")) + (net 547 "Net-(P3-PadA25)")) (pad A26 smd rect (at 20 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 573 "Net-(P3-PadA26)")) + (net 548 "Net-(P3-PadA26)")) (pad A27 smd rect (at 21 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A28 smd rect (at 22 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A29 smd rect (at 23 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 574 "Net-(P3-PadA29)")) + (net 549 "Net-(P3-PadA29)")) (pad A30 smd rect (at 24 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 575 "Net-(P3-PadA30)")) + (net 550 "Net-(P3-PadA30)")) (pad A31 smd rect (at 25 0) (size 0.75 4.2) (layers B.Cu B.Mask) (net 24 GND)) (pad A32 smd rect (at 26 0) (size 0.75 4.2) (layers B.Cu B.Mask) - (net 576 "Net-(P3-PadA32)")) + (net 551 "Net-(P3-PadA32)")) (pad M thru_hole circle (at -45.15 -5.85) (size 5 5) (drill 3.18) (layers *.Cu *.Mask)) (pad M thru_hole circle (at -45.1 -91.2) (size 5 5) (drill 3.18) (layers *.Cu *.Mask)) ) @@ -2899,118 +3009,6 @@ ) ) - (module "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" (layer F.Cu) (tedit 5BF58209) (tstamp 5BF66AD3) - (at 135 30 180) - (path /61FAF948/64AB9BC6) - (fp_text reference J7 (at -13.5 0.5 270) (layer F.SilkS) - (effects (font (size 0.8 0.8) (thickness 0.15))) - ) - (fp_text value EXT2 (at 0 -2 180) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 11.39 3.85) (end 10.9 3.85) (layer F.SilkS) (width 0.15)) - (fp_line (start 11.32 3.85) (end 13.14 3.85) (layer F.SilkS) (width 0.15)) - (fp_line (start 10.91 3.85) (end -13.02 3.86) (layer F.SilkS) (width 0.15)) - (fp_line (start -13.02 3.25) (end -12.66 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start -13.02 3.86) (end -13.02 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 12.71 3.25) (end 13.03 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 13.14 3.25) (end 12.98 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 13.14 3.85) (end 13.14 3.25) (layer F.SilkS) (width 0.15)) - (fp_text user 1 (at -10.5 -0.75 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user 40 (at 11 -0.75 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad "" smd rect (at -11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) - (pad "" smd rect (at 11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) - (pad 40 smd rect (at 9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 39 smd rect (at 9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 38 smd rect (at 8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 545 "Net-(J7-Pad38)")) - (pad 37 smd rect (at 8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 544 "/FPGA IO/EXT2_11-")) - (pad 36 smd rect (at 7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 543 "/FPGA IO/EXT2_11+")) - (pad 35 smd rect (at 7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 34 smd rect (at 6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 542 "/FPGA IO/EXT2_10-")) - (pad 33 smd rect (at 6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 541 "/FPGA IO/EXT2_10+")) - (pad 32 smd rect (at 5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 31 smd rect (at 5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 540 "/FPGA IO/EXT2_9-")) - (pad 30 smd rect (at 4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 539 "/FPGA IO/EXT2_9+")) - (pad 29 smd rect (at 4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 28 smd rect (at 3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 538 "/FPGA IO/EXT2_8-")) - (pad 27 smd rect (at 3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 537 "/FPGA IO/EXT2_8+")) - (pad 26 smd rect (at 2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 25 smd rect (at 2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 536 "/FPGA IO/EXT2_7-")) - (pad 24 smd rect (at 1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 535 "/FPGA IO/EXT2_7+")) - (pad 23 smd rect (at 1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 22 smd rect (at 0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 534 "/FPGA IO/EXT2_6-")) - (pad 21 smd rect (at 0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 533 "/FPGA IO/EXT2_6+")) - (pad 20 smd rect (at -0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 19 smd rect (at -0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 532 "/FPGA IO/EXT2_5-")) - (pad 18 smd rect (at -1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 531 "/FPGA IO/EXT2_5+")) - (pad 17 smd rect (at -1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 16 smd rect (at -2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 530 "/FPGA IO/EXT2_4-")) - (pad 15 smd rect (at -2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 529 "/FPGA IO/EXT2_4+")) - (pad 14 smd rect (at -3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 13 smd rect (at -3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 528 "/FPGA IO/EXT2_3-")) - (pad 12 smd rect (at -4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 527 "/FPGA IO/EXT2_3+")) - (pad 11 smd rect (at -4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 10 smd rect (at -5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 526 "/FPGA IO/EXT2_2-")) - (pad 9 smd rect (at -5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 525 "/FPGA IO/EXT2_2+")) - (pad 8 smd rect (at -6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 7 smd rect (at -6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 524 "/FPGA IO/EXT2_1-")) - (pad 6 smd rect (at -7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 523 "/FPGA IO/EXT2_1+")) - (pad 5 smd rect (at -7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 4 smd rect (at -8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 522 "/FPGA IO/EXT2_0-")) - (pad 3 smd rect (at -8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 521 "/FPGA IO/EXT2_0+")) - (pad 2 smd rect (at -9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 1 smd rect (at -9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (model /home/david/3d/c-4-1734839-0-c-3d.stp - (offset (xyz 0 -5 1)) - (scale (xyz 1 1 1)) - (rotate (xyz -90 0 0)) - ) - ) - (module "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" (layer F.Cu) (tedit 5BF58209) (tstamp 5BF66BA8) (at 106 30 180) (path /61FAF948/635A137F) @@ -3041,77 +3039,77 @@ (pad 39 smd rect (at 9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 119 "/FPGA IO/VCCIO6")) (pad 38 smd rect (at 8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 496 "Net-(J6-Pad38)")) + (net 471 "Net-(J6-Pad38)")) (pad 37 smd rect (at 8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 497 "/FPGA IO/EXT1_11-")) + (net 472 "/FPGA IO/EXT1_11-")) (pad 36 smd rect (at 7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 498 "/FPGA IO/EXT1_11+")) + (net 473 "/FPGA IO/EXT1_11+")) (pad 35 smd rect (at 7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 34 smd rect (at 6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 499 "/FPGA IO/EXT1_10-")) + (net 474 "/FPGA IO/EXT1_10-")) (pad 33 smd rect (at 6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 500 "/FPGA IO/EXT1_10+")) + (net 475 "/FPGA IO/EXT1_10+")) (pad 32 smd rect (at 5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 31 smd rect (at 5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 501 "/FPGA IO/EXT1_9-")) + (net 476 "/FPGA IO/EXT1_9-")) (pad 30 smd rect (at 4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 502 "/FPGA IO/EXT1_9+")) + (net 477 "/FPGA IO/EXT1_9+")) (pad 29 smd rect (at 4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 28 smd rect (at 3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 503 "/FPGA IO/EXT1_8-")) + (net 478 "/FPGA IO/EXT1_8-")) (pad 27 smd rect (at 3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 504 "/FPGA IO/EXT1_8+")) + (net 479 "/FPGA IO/EXT1_8+")) (pad 26 smd rect (at 2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 25 smd rect (at 2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 505 "/FPGA IO/EXT1_7-")) + (net 480 "/FPGA IO/EXT1_7-")) (pad 24 smd rect (at 1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 506 "/FPGA IO/EXT1_7+")) + (net 481 "/FPGA IO/EXT1_7+")) (pad 23 smd rect (at 1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 22 smd rect (at 0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 507 "/FPGA IO/EXT1_6-")) + (net 482 "/FPGA IO/EXT1_6-")) (pad 21 smd rect (at 0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 508 "/FPGA IO/EXT1_6+")) + (net 483 "/FPGA IO/EXT1_6+")) (pad 20 smd rect (at -0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 19 smd rect (at -0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 509 "/FPGA IO/EXT1_5-")) + (net 484 "/FPGA IO/EXT1_5-")) (pad 18 smd rect (at -1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 510 "/FPGA IO/EXT1_5+")) + (net 485 "/FPGA IO/EXT1_5+")) (pad 17 smd rect (at -1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 16 smd rect (at -2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 511 "/FPGA IO/EXT1_4-")) + (net 486 "/FPGA IO/EXT1_4-")) (pad 15 smd rect (at -2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 512 "/FPGA IO/EXT1_4+")) + (net 487 "/FPGA IO/EXT1_4+")) (pad 14 smd rect (at -3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 13 smd rect (at -3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 513 "/FPGA IO/EXT1_3-")) + (net 488 "/FPGA IO/EXT1_3-")) (pad 12 smd rect (at -4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 514 "/FPGA IO/EXT1_3+")) + (net 489 "/FPGA IO/EXT1_3+")) (pad 11 smd rect (at -4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 10 smd rect (at -5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 515 "/FPGA IO/EXT1_2-")) + (net 490 "/FPGA IO/EXT1_2-")) (pad 9 smd rect (at -5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 516 "/FPGA IO/EXT1_2+")) + (net 491 "/FPGA IO/EXT1_2+")) (pad 8 smd rect (at -6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 7 smd rect (at -6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 517 "/FPGA IO/EXT1_1-")) + (net 492 "/FPGA IO/EXT1_1-")) (pad 6 smd rect (at -7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 518 "/FPGA IO/EXT1_1+")) + (net 493 "/FPGA IO/EXT1_1+")) (pad 5 smd rect (at -7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 4 smd rect (at -8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 519 "/FPGA IO/EXT1_0-")) + (net 494 "/FPGA IO/EXT1_0-")) (pad 3 smd rect (at -8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 520 "/FPGA IO/EXT1_0+")) + (net 495 "/FPGA IO/EXT1_0+")) (pad 2 smd rect (at -9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) (net 119 "/FPGA IO/VCCIO6")) (pad 1 smd rect (at -9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) @@ -3123,118 +3121,6 @@ ) ) - (module "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" (layer F.Cu) (tedit 5BF58209) (tstamp 5BF675A7) - (at 164 30 180) - (path /61FAF948/65FA91E0) - (fp_text reference J8 (at -13.5 0.5 270) (layer F.SilkS) - (effects (font (size 0.8 0.8) (thickness 0.15))) - ) - (fp_text value EXT3 (at 0 -2 180) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 11.39 3.85) (end 10.9 3.85) (layer F.SilkS) (width 0.15)) - (fp_line (start 11.32 3.85) (end 13.14 3.85) (layer F.SilkS) (width 0.15)) - (fp_line (start 10.91 3.85) (end -13.02 3.86) (layer F.SilkS) (width 0.15)) - (fp_line (start -13.02 3.25) (end -12.66 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start -13.02 3.86) (end -13.02 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 12.71 3.25) (end 13.03 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 13.14 3.25) (end 12.98 3.25) (layer F.SilkS) (width 0.15)) - (fp_line (start 13.14 3.85) (end 13.14 3.25) (layer F.SilkS) (width 0.15)) - (fp_text user 1 (at -10.5 -0.75 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user 40 (at 11 -0.75 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad "" smd rect (at -11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) - (pad "" smd rect (at 11.42 1.7 180) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) - (pad 40 smd rect (at 9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 39 smd rect (at 9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 38 smd rect (at 8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 495 "Net-(J8-Pad38)")) - (pad 37 smd rect (at 8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 494 "/FPGA IO/EXT3_11-")) - (pad 36 smd rect (at 7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 493 "/FPGA IO/EXT3_11+")) - (pad 35 smd rect (at 7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 34 smd rect (at 6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 492 "/FPGA IO/EXT3_10-")) - (pad 33 smd rect (at 6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 491 "/FPGA IO/EXT3_10+")) - (pad 32 smd rect (at 5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 31 smd rect (at 5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 490 "/FPGA IO/EXT3_9-")) - (pad 30 smd rect (at 4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 489 "/FPGA IO/EXT3_9+")) - (pad 29 smd rect (at 4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 28 smd rect (at 3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 488 "/FPGA IO/EXT3_8-")) - (pad 27 smd rect (at 3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 487 "/FPGA IO/EXT3_8+")) - (pad 26 smd rect (at 2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 25 smd rect (at 2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 486 "/FPGA IO/EXT3_7-")) - (pad 24 smd rect (at 1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 485 "/FPGA IO/EXT3_7+")) - (pad 23 smd rect (at 1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 22 smd rect (at 0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 484 "/FPGA IO/EXT3_6-")) - (pad 21 smd rect (at 0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 483 "/FPGA IO/EXT3_6+")) - (pad 20 smd rect (at -0.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 19 smd rect (at -0.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 482 "/FPGA IO/EXT3_5-")) - (pad 18 smd rect (at -1.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 481 "/FPGA IO/EXT3_5+")) - (pad 17 smd rect (at -1.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 16 smd rect (at -2.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 480 "/FPGA IO/EXT3_4-")) - (pad 15 smd rect (at -2.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 479 "/FPGA IO/EXT3_4+")) - (pad 14 smd rect (at -3.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 13 smd rect (at -3.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 478 "/FPGA IO/EXT3_3-")) - (pad 12 smd rect (at -4.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 477 "/FPGA IO/EXT3_3+")) - (pad 11 smd rect (at -4.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 10 smd rect (at -5.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 476 "/FPGA IO/EXT3_2-")) - (pad 9 smd rect (at -5.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 475 "/FPGA IO/EXT3_2+")) - (pad 8 smd rect (at -6.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 7 smd rect (at -6.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 474 "/FPGA IO/EXT3_1-")) - (pad 6 smd rect (at -7.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 473 "/FPGA IO/EXT3_1+")) - (pad 5 smd rect (at -7.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 24 GND)) - (pad 4 smd rect (at -8.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 472 "/FPGA IO/EXT3_0-")) - (pad 3 smd rect (at -8.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 471 "/FPGA IO/EXT3_0+")) - (pad 2 smd rect (at -9.25 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (pad 1 smd rect (at -9.75 0 180) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask) - (net 105 "/FPGA IO/VCCIO7")) - (model /home/david/3d/c-4-1734839-0-c-3d.stp - (offset (xyz 0 -5 1)) - (scale (xyz 1 1 1)) - (rotate (xyz -90 0 0)) - ) - ) - (module "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" (layer F.Cu) (tedit 5BF58209) (tstamp 5BF676D0) (at 77 30 180) (path /61FAF948/62664D22) @@ -3882,11 +3768,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 591 LED4)) + (net 566 LED4)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 57 "Net-(D18-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 591 LED4)) + (net 566 LED4)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 95 "Net-(D18-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -3911,11 +3797,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 590 LED3)) + (net 565 LED3)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 92 "Net-(D17-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 590 LED3)) + (net 565 LED3)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 77 "Net-(D17-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -3940,11 +3826,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 592 LED5)) + (net 567 LED5)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 59 "Net-(D19-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 592 LED5)) + (net 567 LED5)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 96 "Net-(D19-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -3969,11 +3855,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 595 LED8)) + (net 570 LED8)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 64 "Net-(D22-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 595 LED8)) + (net 570 LED8)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 103 "Net-(D22-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -3998,11 +3884,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 594 LED7)) + (net 569 LED7)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 60 "Net-(D21-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 594 LED7)) + (net 569 LED7)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 93 "Net-(D21-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4027,11 +3913,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 585 LED2)) + (net 560 LED2)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 90 "Net-(D16-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 585 LED2)) + (net 560 LED2)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 78 "Net-(D16-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4056,11 +3942,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 589 LED1)) + (net 564 LED1)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 91 "Net-(D15-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 589 LED1)) + (net 564 LED1)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 80 "Net-(D15-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4085,11 +3971,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 588 LED0)) + (net 563 LED0)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 89 "Net-(D14-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 588 LED0)) + (net 563 LED0)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 79 "Net-(D14-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4114,11 +4000,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 596 LED9)) + (net 571 LED9)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 62 "Net-(D23-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 596 LED9)) + (net 571 LED9)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 104 "Net-(D23-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4143,11 +4029,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 587 LED10)) + (net 562 LED10)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 63 "Net-(D24-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 587 LED10)) + (net 562 LED10)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 102 "Net-(D24-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4172,11 +4058,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 586 LED11)) + (net 561 LED11)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 61 "Net-(D25-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 586 LED11)) + (net 561 LED11)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 101 "Net-(D25-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -4201,11 +4087,11 @@ (fp_line (start -0.85 -1.4) (end 1.75 -1.4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.75 -0.3) (end -1.75 0.3) (layer F.SilkS) (width 0.15)) (pad 3 smd rect (at -1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 593 LED6)) + (net 568 LED6)) (pad 4 smd rect (at -1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 58 "Net-(D20-Pad4)")) (pad 2 smd rect (at 1.55 0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) - (net 593 LED6)) + (net 568 LED6)) (pad 1 smd rect (at 1.55 -0.85 180) (size 1.5 0.9) (layers F.Cu F.Paste F.Mask) (net 94 "Net-(D20-Pad1)")) (model "/home/david/3d/STEP-WL-SBTW-3528-rev1(2.stp" @@ -6809,7 +6695,7 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 637 "/PCIe + SATA/DCU1_TX0+")) + (net 612 "/PCIe + SATA/DCU1_TX0+")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 426 "/PCIe + SATA/SATA0_A+")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -6877,7 +6763,7 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 642 "/PCIe + SATA/DCU1_TX1+")) + (net 617 "/PCIe + SATA/DCU1_TX1+")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 422 "/PCIe + SATA/SATA1_A+")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -6911,7 +6797,7 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 643 "/PCIe + SATA/DCU1_TX1-")) + (net 618 "/PCIe + SATA/DCU1_TX1-")) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 423 "/PCIe + SATA/SATA1_A-")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -6945,7 +6831,7 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 622 "/PCIe + SATA/DCU0_TX0+")) + (net 597 "/PCIe + SATA/DCU0_TX0+")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 430 "/PCIe + SATA/PCIe_HSI0+")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -6979,7 +6865,7 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 624 "/PCIe + SATA/DCU0_TX0-")) + (net 599 "/PCIe + SATA/DCU0_TX0-")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 431 "/PCIe + SATA/PCIe_HSI0-")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -7013,7 +6899,7 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 626 "/PCIe + SATA/DCU0_TX1+")) + (net 601 "/PCIe + SATA/DCU0_TX1+")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 432 "/PCIe + SATA/PCIe_HSI1+")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -7047,7 +6933,7 @@ (fp_line (start -0.5 0.25) (end 0.5 0.25) (layer B.Fab) (width 0.1)) (fp_line (start -0.5 -0.25) (end -0.5 0.25) (layer B.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) - (net 627 "/PCIe + SATA/DCU0_TX1-")) + (net 602 "/PCIe + SATA/DCU0_TX1-")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) (net 433 "/PCIe + SATA/PCIe_HSI1-")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -7251,7 +7137,7 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 639 "/PCIe + SATA/DCU1_TX0-")) + (net 614 "/PCIe + SATA/DCU1_TX0-")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 427 "/PCIe + SATA/SATA0_A-")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl @@ -7287,7 +7173,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 24 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 549 "Net-(C134-Pad1)")) + (net 524 "Net-(C134-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7321,7 +7207,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 24 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 547 "Net-(C135-Pad1)")) + (net 522 "Net-(C135-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8001,7 +7887,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 24 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 548 "Net-(C133-Pad1)")) + (net 523 "Net-(C133-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -9871,7 +9757,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 24 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 546 "Net-(C132-Pad1)")) + (net 521 "Net-(C132-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12517,7 +12403,7 @@ (pad 2 thru_hole roundrect (at -6 0 180) (size 3 3.5) (drill oval 1 3) (layers *.Cu *.Mask) (roundrect_rratio 0.25) (net 24 GND)) (pad 1 thru_hole rect (at 0 0 180) (size 3.5 3.5) (drill oval 1 3) (layers *.Cu *.Mask) - (net 597 "Net-(F2-Pad2)")) + (net 572 "Net-(F2-Pad2)")) (model ${KISYS3DMOD}/Connector_BarrelJack.3dshapes/BarrelJack_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -12764,11 +12650,11 @@ (fp_line (start 1.27 -1.27) (end 1.27 6.35) (layer F.Fab) (width 0.1)) (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) (pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 563 "/PCIe + SATA/~PRSNT2~_X4")) + (net 538 "/PCIe + SATA/~PRSNT2~_X4")) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 564 "/PCIe + SATA/~PRSNT1")) + (net 539 "/PCIe + SATA/~PRSNT1")) (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 557 "/PCIe + SATA/~PRSNT2~_X1")) + (net 532 "/PCIe + SATA/~PRSNT2~_X1")) (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x03_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13121,33 +13007,33 @@ (pad 27 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 24 GND)) (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 628 "/FPGA IO/PMOD1_10")) + (net 603 "/FPGA IO/PMOD1_10")) (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 648 "/FPGA IO/PMOD1_3")) + (net 623 "/FPGA IO/PMOD1_3")) (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 629 "/FPGA IO/PMOD1_9")) + (net 604 "/FPGA IO/PMOD1_9")) (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 649 "/FPGA IO/PMOD1_2")) + (net 624 "/FPGA IO/PMOD1_2")) (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 640 "/FPGA IO/PMOD1_8")) + (net 615 "/FPGA IO/PMOD1_8")) (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 651 "/FPGA IO/PMOD1_1")) + (net 626 "/FPGA IO/PMOD1_1")) (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 641 "/FPGA IO/PMOD1_7")) + (net 616 "/FPGA IO/PMOD1_7")) (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 650 "/FPGA IO/PMOD1_0")) + (net 625 "/FPGA IO/PMOD1_0")) (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 644 "/FPGA IO/EXIO_5")) + (net 619 "/FPGA IO/EXIO_5")) (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 652 "/FPGA IO/EXIO_2")) + (net 627 "/FPGA IO/EXIO_2")) (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 645 "/FPGA IO/EXIO_4")) + (net 620 "/FPGA IO/EXIO_4")) (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 654 "/FPGA IO/EXIO_1")) + (net 629 "/FPGA IO/EXIO_1")) (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 646 "/FPGA IO/EXIO_3")) + (net 621 "/FPGA IO/EXIO_3")) (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 656 "/FPGA IO/EXIO_0")) + (net 631 "/FPGA IO/EXIO_0")) (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 12 +3V3)) (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) @@ -13157,21 +13043,21 @@ (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 24 GND)) (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 655 "/FPGA IO/PMOD0_10")) + (net 630 "/FPGA IO/PMOD0_10")) (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 662 "/FPGA IO/PMOD0_3")) + (net 637 "/FPGA IO/PMOD0_3")) (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 657 "/FPGA IO/PMOD0_9")) + (net 632 "/FPGA IO/PMOD0_9")) (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 664 "/FPGA IO/PMOD0_2")) + (net 639 "/FPGA IO/PMOD0_2")) (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 661 "/FPGA IO/PMOD0_8")) + (net 636 "/FPGA IO/PMOD0_8")) (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 665 "/FPGA IO/PMOD0_1")) + (net 640 "/FPGA IO/PMOD0_1")) (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 663 "/FPGA IO/PMOD0_7")) + (net 638 "/FPGA IO/PMOD0_7")) (pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 667 "/FPGA IO/PMOD0_0")) + (net 642 "/FPGA IO/PMOD0_0")) (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x15_P2.54mm_Horizontal.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -13234,11 +13120,11 @@ (pad 3 smd rect (at 0 -1.4625 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 175 "/Debug Interface/PORT_D+")) (pad 4 smd rect (at 0.65 -1.4625 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 700 "Net-(J2-Pad4)")) + (net 675 "Net-(J2-Pad4)")) (pad 5 smd rect (at 1.3 -1.4625 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 1 smd rect (at -1.3 -1.4625 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 699 "Net-(J2-Pad1)")) + (net 674 "Net-(J2-Pad1)")) (pad 2 smd rect (at -0.65 -1.4625 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 172 "/Debug Interface/PORT_D-")) (pad 6 thru_hole circle (at -2.5 -1.4625 270) (size 1.45 1.45) (drill 0.85) (layers *.Cu *.Mask) @@ -13327,9 +13213,9 @@ (pad AJ32 smd circle (at 12.4 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 254 FTDI_D6)) (pad AH32 smd circle (at 12.4 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 593 LED6)) + (net 568 LED6)) (pad AG32 smd circle (at 12.4 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 698 "Net-(U15-PadAG32)")) + (net 673 "Net-(U15-PadAG32)")) (pad AE32 smd circle (at 12.4 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 82 DIP_SW0)) (pad AD32 smd circle (at 12.4 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13377,13 +13263,13 @@ (pad AL31 smd circle (at 11.6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK31 smd circle (at 11.6 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 697 "Net-(U15-PadAK31)")) + (net 672 "Net-(U15-PadAK31)")) (pad AJ31 smd circle (at 11.6 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 259 FTDI_~TXE)) (pad AH31 smd circle (at 11.6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AG31 smd circle (at 11.6 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 696 "Net-(U15-PadAG31)")) + (net 671 "Net-(U15-PadAG31)")) (pad AE31 smd circle (at 11.6 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 87 DIP_SW4)) (pad AD31 smd circle (at 11.6 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13427,41 +13313,41 @@ (pad B31 smd circle (at 11.6 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A31 smd circle (at 11.6 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 695 "Net-(U15-PadA31)")) + (net 670 "Net-(U15-PadA31)")) (pad AM30 smd circle (at 10.8 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 253 FTDI_D5)) (pad AL30 smd circle (at 10.8 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 255 FTDI_D7)) (pad AK30 smd circle (at 10.8 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 592 LED5)) + (net 567 LED5)) (pad AJ30 smd circle (at 10.8 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 694 "Net-(U15-PadAJ30)")) + (net 669 "Net-(U15-PadAJ30)")) (pad AH30 smd circle (at 10.8 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 585 LED2)) + (net 560 LED2)) (pad AG30 smd circle (at 10.8 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 591 LED4)) + (net 566 LED4)) (pad AE30 smd circle (at 10.8 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 693 "Net-(U15-PadAE30)")) + (net 668 "Net-(U15-PadAE30)")) (pad AD30 smd circle (at 10.8 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 97 BTN1)) (pad AC30 smd circle (at 10.8 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 85 DIP_SW7)) (pad AB30 smd circle (at 10.8 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 692 "Net-(U15-PadAB30)")) + (net 667 "Net-(U15-PadAB30)")) (pad Y30 smd circle (at 10.8 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 709 "Net-(U15-PadY30)")) + (net 684 "Net-(U15-PadY30)")) (pad W30 smd circle (at 10.8 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 708 "Net-(U15-PadW30)")) + (net 683 "Net-(U15-PadW30)")) (pad V30 smd circle (at 10.8 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 691 "Net-(U15-PadV30)")) + (net 666 "Net-(U15-PadV30)")) (pad U30 smd circle (at 10.8 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 409 DDR3_DQ31)) (pad T30 smd circle (at 10.8 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 701 "Net-(U15-PadT30)")) + (net 676 "Net-(U15-PadT30)")) (pad R30 smd circle (at 10.8 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 690 "Net-(U15-PadR30)")) + (net 665 "Net-(U15-PadR30)")) (pad P30 smd circle (at 10.8 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 689 "Net-(U15-PadP30)")) + (net 664 "Net-(U15-PadP30)")) (pad N30 smd circle (at 10.8 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 363 DDR3_DQS1+)) (pad L30 smd circle (at 10.8 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13473,51 +13359,51 @@ (pad H30 smd circle (at 10.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 40 DDR3_BA1)) (pad F30 smd circle (at 10.8 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 704 "Net-(U15-PadF30)")) + (net 679 "Net-(U15-PadF30)")) (pad E30 smd circle (at 10.8 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 49 DDR3_A0)) (pad D30 smd circle (at 10.8 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 5 DDR3_A5)) (pad C30 smd circle (at 10.8 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 688 "Net-(U15-PadC30)")) + (net 663 "Net-(U15-PadC30)")) (pad B30 smd circle (at 10.8 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 582 "/FPGA IO/CLK100-")) + (net 557 "/FPGA IO/CLK100-")) (pad A30 smd circle (at 10.8 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 594 LED7)) + (net 569 LED7)) (pad AM29 smd circle (at 10 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 250 FTDI_D2)) (pad AL29 smd circle (at 10 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK29 smd circle (at 10 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 590 LED3)) + (net 565 LED3)) (pad AJ29 smd circle (at 10 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 687 "Net-(U15-PadAJ29)")) + (net 662 "Net-(U15-PadAJ29)")) (pad AH29 smd circle (at 10 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AG29 smd circle (at 10 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 588 LED0)) + (net 563 LED0)) (pad AE29 smd circle (at 10 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 686 "Net-(U15-PadAE29)")) + (net 661 "Net-(U15-PadAE29)")) (pad AD29 smd circle (at 10 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 100 BTN3)) (pad AC29 smd circle (at 10 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 685 "Net-(U15-PadAC29)")) + (net 660 "Net-(U15-PadAC29)")) (pad AB29 smd circle (at 10 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 684 "Net-(U15-PadAB29)")) + (net 659 "Net-(U15-PadAB29)")) (pad Y29 smd circle (at 10 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 710 "Net-(U15-PadY29)")) + (net 685 "Net-(U15-PadY29)")) (pad W29 smd circle (at 10 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 389 DDR3_DQ21)) (pad V29 smd circle (at 10 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 228 DDR3_Vref)) (pad U29 smd circle (at 10 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 707 "Net-(U15-PadU29)")) + (net 682 "Net-(U15-PadU29)")) (pad T29 smd circle (at 10 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 373 DDR3_DQ6)) (pad R29 smd circle (at 10 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 370 DDR3_DQS0+)) (pad P29 smd circle (at 10 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 683 "Net-(U15-PadP29)")) + (net 658 "Net-(U15-PadP29)")) (pad N29 smd circle (at 10 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 359 DDR3_DQS1-)) (pad L29 smd circle (at 10 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13527,7 +13413,7 @@ (pad J29 smd circle (at 10 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 36 DDR3_ODT)) (pad H29 smd circle (at 10 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 682 "Net-(U15-PadH29)")) + (net 657 "Net-(U15-PadH29)")) (pad F29 smd circle (at 10 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 41 DDR3_A12)) (pad E29 smd circle (at 10 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13535,11 +13421,11 @@ (pad D29 smd circle (at 10 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 6 DDR3_A7)) (pad C29 smd circle (at 10 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 681 "Net-(U15-PadC29)")) + (net 656 "Net-(U15-PadC29)")) (pad B29 smd circle (at 10 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 581 "/FPGA IO/CLK100+")) + (net 556 "/FPGA IO/CLK100+")) (pad A29 smd circle (at 10 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 595 LED8)) + (net 570 LED8)) (pad AM28 smd circle (at 9.2 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 249 FTDI_D0_TX)) (pad AL28 smd circle (at 9.2 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13549,15 +13435,15 @@ (pad AJ28 smd circle (at 9.2 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 68 FTDI_~SIWU)) (pad AH28 smd circle (at 9.2 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 589 LED1)) + (net 564 LED1)) (pad AG28 smd circle (at 9.2 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 66 FTDI_~WR)) (pad AE28 smd circle (at 9.2 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 680 "Net-(U15-PadAE28)")) + (net 655 "Net-(U15-PadAE28)")) (pad AD28 smd circle (at 9.2 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AC28 smd circle (at 9.2 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 679 "Net-(U15-PadAC28)")) + (net 654 "Net-(U15-PadAC28)")) (pad AB28 smd circle (at 9.2 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 396 DDR3_DQS2+)) (pad Y28 smd circle (at 9.2 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13573,33 +13459,33 @@ (pad R28 smd circle (at 9.2 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad P28 smd circle (at 9.2 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 678 "Net-(U15-PadP28)")) + (net 653 "Net-(U15-PadP28)")) (pad N28 smd circle (at 9.2 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad L28 smd circle (at 9.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 677 "Net-(U15-PadL28)")) + (net 652 "Net-(U15-PadL28)")) (pad K28 smd circle (at 9.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 362 DDR3_DQ9)) (pad J28 smd circle (at 9.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad H28 smd circle (at 9.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 676 "Net-(U15-PadH28)")) + (net 651 "Net-(U15-PadH28)")) (pad F28 smd circle (at 9.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 51 DDR3_A1)) (pad E28 smd circle (at 9.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad D28 smd circle (at 9.2 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 675 "Net-(U15-PadD28)")) + (net 650 "Net-(U15-PadD28)")) (pad C28 smd circle (at 9.2 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 674 "Net-(U15-PadC28)")) + (net 649 "Net-(U15-PadC28)")) (pad B28 smd circle (at 9.2 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A28 smd circle (at 9.2 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 587 LED10)) + (net 562 LED10)) (pad AE27 smd circle (at 8.4 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 702 "Net-(U15-PadAE27)")) + (net 677 "Net-(U15-PadAE27)")) (pad AD27 smd circle (at 8.4 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 703 "Net-(U15-PadAD27)")) + (net 678 "Net-(U15-PadAD27)")) (pad AC27 smd circle (at 8.4 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 399 DDR3_DQ16)) (pad AB27 smd circle (at 8.4 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13607,11 +13493,11 @@ (pad Y27 smd circle (at 8.4 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 398 DDR3_DM2)) (pad W27 smd circle (at 8.4 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 673 "Net-(U15-PadW27)")) + (net 648 "Net-(U15-PadW27)")) (pad V27 smd circle (at 8.4 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 369 DDR3_DQ2)) (pad U27 smd circle (at 8.4 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 706 "Net-(U15-PadU27)")) + (net 681 "Net-(U15-PadU27)")) (pad T27 smd circle (at 8.4 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 377 DDR3_DQ5)) (pad R27 smd circle (at 8.4 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13619,15 +13505,15 @@ (pad P27 smd circle (at 8.4 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 366 DDR3_DQ8)) (pad N27 smd circle (at 8.4 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 705 "Net-(U15-PadN27)")) + (net 680 "Net-(U15-PadN27)")) (pad L27 smd circle (at 8.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 365 DDR3_DM1)) (pad K27 smd circle (at 8.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 358 DDR3_DQ12)) (pad J27 smd circle (at 8.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 672 "Net-(U15-PadJ27)")) + (net 647 "Net-(U15-PadJ27)")) (pad H27 smd circle (at 8.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 671 "Net-(U15-PadH27)")) + (net 646 "Net-(U15-PadH27)")) (pad AM26 smd circle (at 7.6 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AL26 smd circle (at 7.6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13639,7 +13525,7 @@ (pad AH26 smd circle (at 7.6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AE26 smd circle (at 7.6 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 670 "Net-(U15-PadAE26)")) + (net 645 "Net-(U15-PadAE26)")) (pad AD26 smd circle (at 7.6 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 393 DDR3_DQ22)) (pad AC26 smd circle (at 7.6 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13667,17 +13553,17 @@ (pad J26 smd circle (at 7.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 228 DDR3_Vref)) (pad E26 smd circle (at 7.6 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 669 "Net-(U15-PadE26)")) + (net 644 "Net-(U15-PadE26)")) (pad D26 smd circle (at 7.6 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 596 LED9)) + (net 571 LED9)) (pad C26 smd circle (at 7.6 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 586 LED11)) + (net 561 LED11)) (pad B26 smd circle (at 7.6 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 668 "Net-(U15-PadB26)")) + (net 643 "Net-(U15-PadB26)")) (pad A26 smd circle (at 7.6 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 667 "/FPGA IO/PMOD0_0")) + (net 642 "/FPGA IO/PMOD0_0")) (pad AK25 smd circle (at 6.8 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 666 "Net-(U15-PadAK25)")) + (net 641 "Net-(U15-PadAK25)")) (pad AJ25 smd circle (at 6.8 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 420 "/FPGA Core Power/VCCAUX")) (pad AH25 smd circle (at 6.8 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13685,41 +13571,41 @@ (pad F25 smd circle (at 6.8 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 229 DDR3_Vtt_EN)) (pad E25 smd circle (at 6.8 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 665 "/FPGA IO/PMOD0_1")) + (net 640 "/FPGA IO/PMOD0_1")) (pad D25 smd circle (at 6.8 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 664 "/FPGA IO/PMOD0_2")) + (net 639 "/FPGA IO/PMOD0_2")) (pad C25 smd circle (at 6.8 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 663 "/FPGA IO/PMOD0_7")) + (net 638 "/FPGA IO/PMOD0_7")) (pad B25 smd circle (at 6.8 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 662 "/FPGA IO/PMOD0_3")) + (net 637 "/FPGA IO/PMOD0_3")) (pad A25 smd circle (at 6.8 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 661 "/FPGA IO/PMOD0_8")) + (net 636 "/FPGA IO/PMOD0_8")) (pad AM24 smd circle (at 6 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 1 "/PCIe + SATA/DCU1_REFCLK-")) (pad AL24 smd circle (at 6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK24 smd circle (at 6 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 660 "Net-(U15-PadAK24)")) + (net 635 "Net-(U15-PadAK24)")) (pad AJ24 smd circle (at 6 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 420 "/FPGA Core Power/VCCAUX")) (pad AH24 smd circle (at 6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AG24 smd circle (at 6 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 659 "Net-(U15-PadAG24)")) + (net 634 "Net-(U15-PadAG24)")) (pad G24 smd circle (at 6 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 658 "Net-(U15-PadG24)")) + (net 633 "Net-(U15-PadG24)")) (pad F24 smd circle (at 6 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 657 "/FPGA IO/PMOD0_9")) + (net 632 "/FPGA IO/PMOD0_9")) (pad E24 smd circle (at 6 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad D24 smd circle (at 6 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 656 "/FPGA IO/EXIO_0")) + (net 631 "/FPGA IO/EXIO_0")) (pad C24 smd circle (at 6 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 655 "/FPGA IO/PMOD0_10")) + (net 630 "/FPGA IO/PMOD0_10")) (pad B24 smd circle (at 6 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A24 smd circle (at 6 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 654 "/FPGA IO/EXIO_1")) + (net 629 "/FPGA IO/EXIO_1")) (pad AM23 smd circle (at 5.2 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 2 "/PCIe + SATA/DCU1_REFCLK+")) (pad AL23 smd circle (at 5.2 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13763,19 +13649,19 @@ (pad K23 smd circle (at 5.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad G23 smd circle (at 5.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 653 "Net-(U15-PadG23)")) + (net 628 "Net-(U15-PadG23)")) (pad F23 smd circle (at 5.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 652 "/FPGA IO/EXIO_2")) + (net 627 "/FPGA IO/EXIO_2")) (pad E23 smd circle (at 5.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 651 "/FPGA IO/PMOD1_1")) + (net 626 "/FPGA IO/PMOD1_1")) (pad D23 smd circle (at 5.2 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 650 "/FPGA IO/PMOD1_0")) + (net 625 "/FPGA IO/PMOD1_0")) (pad C23 smd circle (at 5.2 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 649 "/FPGA IO/PMOD1_2")) + (net 624 "/FPGA IO/PMOD1_2")) (pad B23 smd circle (at 5.2 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 648 "/FPGA IO/PMOD1_3")) + (net 623 "/FPGA IO/PMOD1_3")) (pad A23 smd circle (at 5.2 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 555 PCIe_~WAKE)) + (net 530 PCIe_~WAKE)) (pad AK22 smd circle (at 4.4 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 424 "/PCIe + SATA/DCU1_RX1-")) (pad AJ22 smd circle (at 4.4 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13815,21 +13701,21 @@ (pad K22 smd circle (at 4.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad G22 smd circle (at 4.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 647 "Net-(U15-PadG22)")) + (net 622 "Net-(U15-PadG22)")) (pad F22 smd circle (at 4.4 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 646 "/FPGA IO/EXIO_3")) + (net 621 "/FPGA IO/EXIO_3")) (pad E22 smd circle (at 4.4 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 645 "/FPGA IO/EXIO_4")) + (net 620 "/FPGA IO/EXIO_4")) (pad D22 smd circle (at 4.4 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 128 ~PERST)) (pad C22 smd circle (at 4.4 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 121 CLK_SDA)) (pad B22 smd circle (at 4.4 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 644 "/FPGA IO/EXIO_5")) + (net 619 "/FPGA IO/EXIO_5")) (pad A22 smd circle (at 4.4 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 185 CLK_SCL)) (pad AM21 smd circle (at 3.6 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 643 "/PCIe + SATA/DCU1_TX1-")) + (net 618 "/PCIe + SATA/DCU1_TX1-")) (pad AL21 smd circle (at 3.6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK21 smd circle (at 3.6 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13865,7 +13751,7 @@ (pad K21 smd circle (at 3.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad AM20 smd circle (at 2.8 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 642 "/PCIe + SATA/DCU1_TX1+")) + (net 617 "/PCIe + SATA/DCU1_TX1+")) (pad AL20 smd circle (at 2.8 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK20 smd circle (at 2.8 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13907,19 +13793,19 @@ (pad K20 smd circle (at 2.8 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 420 "/FPGA Core Power/VCCAUX")) (pad F20 smd circle (at 2.8 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 641 "/FPGA IO/PMOD1_7")) + (net 616 "/FPGA IO/PMOD1_7")) (pad E20 smd circle (at 2.8 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad D20 smd circle (at 2.8 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 338 ULPI_D7)) (pad C20 smd circle (at 2.8 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 640 "/FPGA IO/PMOD1_8")) + (net 615 "/FPGA IO/PMOD1_8")) (pad B20 smd circle (at 2.8 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A20 smd circle (at 2.8 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 339 ULPI_D6)) (pad AK19 smd circle (at 2 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 639 "/PCIe + SATA/DCU1_TX0-")) + (net 614 "/PCIe + SATA/DCU1_TX0-")) (pad AJ19 smd circle (at 2 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 421 "/FPGA Core Power/VCCA1")) (pad AH19 smd circle (at 2 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13957,7 +13843,7 @@ (pad K19 smd circle (at 2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G19 smd circle (at 2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 638 "Net-(U15-PadG19)")) + (net 613 "Net-(U15-PadG19)")) (pad F19 smd circle (at 2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 340 ULPI_D5)) (pad E19 smd circle (at 2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -13975,7 +13861,7 @@ (pad AL18 smd circle (at 1.2 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK18 smd circle (at 1.2 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 637 "/PCIe + SATA/DCU1_TX0+")) + (net 612 "/PCIe + SATA/DCU1_TX0+")) (pad AJ18 smd circle (at 1.2 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 421 "/FPGA Core Power/VCCA1")) (pad AC18 smd circle (at 1.2 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14007,7 +13893,7 @@ (pad K18 smd circle (at 1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G18 smd circle (at 1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 636 "Net-(U15-PadG18)")) + (net 611 "Net-(U15-PadG18)")) (pad F18 smd circle (at 1.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 345 ULPI_D0)) (pad E18 smd circle (at 1.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14063,7 +13949,7 @@ (pad K17 smd circle (at 0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G17 smd circle (at 0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 635 "Net-(U15-PadG17)")) + (net 610 "Net-(U15-PadG17)")) (pad F17 smd circle (at 0.4 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 332 ULPI_RESET)) (pad E17 smd circle (at 0.4 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14077,7 +13963,7 @@ (pad A17 smd circle (at 0.4 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 56 RGMII_REF_CLK)) (pad AK16 smd circle (at -0.4 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 634 "Net-(U15-PadAK16)")) + (net 609 "Net-(U15-PadAK16)")) (pad AJ16 smd circle (at -0.4 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 420 "/FPGA Core Power/VCCAUX")) (pad AH16 smd circle (at -0.4 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14115,7 +14001,7 @@ (pad K16 smd circle (at -0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G16 smd circle (at -0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 633 "Net-(U15-PadG16)")) + (net 608 "Net-(U15-PadG16)")) (pad F16 smd circle (at -0.4 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 73 RGMII_RX_DV)) (pad E16 smd circle (at -0.4 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14133,7 +14019,7 @@ (pad AL15 smd circle (at -1.2 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK15 smd circle (at -1.2 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 632 "Net-(U15-PadAK15)")) + (net 607 "Net-(U15-PadAK15)")) (pad AJ15 smd circle (at -1.2 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 420 "/FPGA Core Power/VCCAUX")) (pad AH15 smd circle (at -1.2 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14171,7 +14057,7 @@ (pad K15 smd circle (at -1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G15 smd circle (at -1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 631 "Net-(U15-PadG15)")) + (net 606 "Net-(U15-PadG15)")) (pad F15 smd circle (at -1.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 72 RGMII_RXD3)) (pad E15 smd circle (at -1.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14227,13 +14113,13 @@ (pad K14 smd circle (at -2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad G14 smd circle (at -2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 630 "Net-(U15-PadG14)")) + (net 605 "Net-(U15-PadG14)")) (pad F14 smd circle (at -2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 304 DVI_D0)) (pad E14 smd circle (at -2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 629 "/FPGA IO/PMOD1_9")) + (net 604 "/FPGA IO/PMOD1_9")) (pad D14 smd circle (at -2 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 628 "/FPGA IO/PMOD1_10")) + (net 603 "/FPGA IO/PMOD1_10")) (pad C14 smd circle (at -2 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 54 ETH_~RESET)) (pad B14 smd circle (at -2 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14285,7 +14171,7 @@ (pad A13 smd circle (at -2.8 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 303 DVI_D1)) (pad AM12 smd circle (at -3.6 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 627 "/PCIe + SATA/DCU0_TX1-")) + (net 602 "/PCIe + SATA/DCU0_TX1-")) (pad AL12 smd circle (at -3.6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK12 smd circle (at -3.6 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14327,7 +14213,7 @@ (pad K12 smd circle (at -3.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 12 +3V3)) (pad AM11 smd circle (at -4.4 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 626 "/PCIe + SATA/DCU0_TX1+")) + (net 601 "/PCIe + SATA/DCU0_TX1+")) (pad AL11 smd circle (at -4.4 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK11 smd circle (at -4.4 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14369,7 +14255,7 @@ (pad K11 smd circle (at -4.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad G11 smd circle (at -4.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 625 "Net-(U15-PadG11)")) + (net 600 "Net-(U15-PadG11)")) (pad F11 smd circle (at -4.4 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 292 DVI_D11)) (pad E11 smd circle (at -4.4 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14383,7 +14269,7 @@ (pad A11 smd circle (at -4.4 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 299 DVI_D5)) (pad AK10 smd circle (at -5.2 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 624 "/PCIe + SATA/DCU0_TX0-")) + (net 599 "/PCIe + SATA/DCU0_TX0-")) (pad AJ10 smd circle (at -5.2 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 419 "/FPGA Core Power/VCCA0")) (pad AC10 smd circle (at -5.2 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14415,7 +14301,7 @@ (pad K10 smd circle (at -5.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad G10 smd circle (at -5.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 623 "Net-(U15-PadG10)")) + (net 598 "Net-(U15-PadG10)")) (pad F10 smd circle (at -5.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 286 DVI_D16)) (pad E10 smd circle (at -5.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14433,7 +14319,7 @@ (pad AL9 smd circle (at -6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AK9 smd circle (at -6 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 622 "/PCIe + SATA/DCU0_TX0+")) + (net 597 "/PCIe + SATA/DCU0_TX0+")) (pad AJ9 smd circle (at -6 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 419 "/FPGA Core Power/VCCA0")) (pad AH9 smd circle (at -6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14441,7 +14327,7 @@ (pad AG9 smd circle (at -6 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 419 "/FPGA Core Power/VCCA0")) (pad G9 smd circle (at -6 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 621 "Net-(U15-PadG9)")) + (net 596 "Net-(U15-PadG9)")) (pad F9 smd circle (at -6 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 282 DVI_D20)) (pad E9 smd circle (at -6 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14487,7 +14373,7 @@ (pad AH7 smd circle (at -7.6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AE7 smd circle (at -7.6 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 620 "Net-(U15-PadAE7)")) + (net 595 "Net-(U15-PadAE7)")) (pad AD7 smd circle (at -7.6 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 447 "/FPGA IO/EXT0_11-")) (pad AC7 smd circle (at -7.6 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14495,29 +14381,29 @@ (pad AB7 smd circle (at -7.6 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 460 "/FPGA IO/EXT0_5+")) (pad Y7 smd circle (at -7.6 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 713 "Net-(U15-PadY7)")) + (net 688 "Net-(U15-PadY7)")) (pad V7 smd circle (at -7.6 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 505 "/FPGA IO/EXT1_7-")) + (net 480 "/FPGA IO/EXT1_7-")) (pad U7 smd circle (at -7.6 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 513 "/FPGA IO/EXT1_3-")) + (net 488 "/FPGA IO/EXT1_3-")) (pad T7 smd circle (at -7.6 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 517 "/FPGA IO/EXT1_1-")) + (net 492 "/FPGA IO/EXT1_1-")) (pad R7 smd circle (at -7.6 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 518 "/FPGA IO/EXT1_1+")) + (net 493 "/FPGA IO/EXT1_1+")) (pad P7 smd circle (at -7.6 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 524 "/FPGA IO/EXT2_1-")) + (net 694 "Net-(U15-PadP7)")) (pad N7 smd circle (at -7.6 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 522 "/FPGA IO/EXT2_0-")) + (net 695 "Net-(U15-PadN7)")) (pad L7 smd circle (at -7.6 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 527 "/FPGA IO/EXT2_3+")) + (net 696 "Net-(U15-PadL7)")) (pad K7 smd circle (at -7.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 530 "/FPGA IO/EXT2_4-")) + (net 497 "/FPGA IO/EXT2_0-")) (pad J7 smd circle (at -7.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 535 "/FPGA IO/EXT2_7+")) + (net 498 "/FPGA IO/EXT2_1+")) (pad E7 smd circle (at -7.6 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 619 "Net-(U15-PadE7)")) + (net 594 "Net-(U15-PadE7)")) (pad D7 smd circle (at -7.6 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 618 "Net-(U15-PadD7)")) + (net 593 "Net-(U15-PadD7)")) (pad C7 smd circle (at -7.6 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 183 DVI_SCL)) (pad B7 smd circle (at -7.6 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14533,29 +14419,29 @@ (pad AB6 smd circle (at -8.4 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 465 "/FPGA IO/EXT0_2-")) (pad Y6 smd circle (at -8.4 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 714 "Net-(U15-PadY6)")) + (net 689 "Net-(U15-PadY6)")) (pad W6 smd circle (at -8.4 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 617 "Net-(U15-PadW6)")) + (net 592 "Net-(U15-PadW6)")) (pad V6 smd circle (at -8.4 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 506 "/FPGA IO/EXT1_7+")) + (net 481 "/FPGA IO/EXT1_7+")) (pad U6 smd circle (at -8.4 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 514 "/FPGA IO/EXT1_3+")) + (net 489 "/FPGA IO/EXT1_3+")) (pad T6 smd circle (at -8.4 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 515 "/FPGA IO/EXT1_2-")) + (net 490 "/FPGA IO/EXT1_2-")) (pad R6 smd circle (at -8.4 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 516 "/FPGA IO/EXT1_2+")) + (net 491 "/FPGA IO/EXT1_2+")) (pad P6 smd circle (at -8.4 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 523 "/FPGA IO/EXT2_1+")) + (net 697 "Net-(U15-PadP6)")) (pad N6 smd circle (at -8.4 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 521 "/FPGA IO/EXT2_0+")) + (net 698 "Net-(U15-PadN6)")) (pad L6 smd circle (at -8.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 528 "/FPGA IO/EXT2_3-")) + (net 699 "Net-(U15-PadL6)")) (pad K6 smd circle (at -8.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 529 "/FPGA IO/EXT2_4+")) + (net 496 "/FPGA IO/EXT2_0+")) (pad J6 smd circle (at -8.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 536 "/FPGA IO/EXT2_7-")) + (net 499 "/FPGA IO/EXT2_1-")) (pad H6 smd circle (at -8.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 533 "/FPGA IO/EXT2_6+")) + (net 500 "/FPGA IO/EXT2_2+")) (pad AM5 smd circle (at -9.2 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 112 JTAG_TMS)) (pad AL5 smd circle (at -9.2 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14573,7 +14459,7 @@ (pad AD5 smd circle (at -9.2 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AC5 smd circle (at -9.2 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 715 "Net-(U15-PadAC5)")) + (net 690 "Net-(U15-PadAC5)")) (pad AB5 smd circle (at -9.2 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 466 "/FPGA IO/EXT0_2+")) (pad Y5 smd circle (at -9.2 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14583,35 +14469,35 @@ (pad V5 smd circle (at -9.2 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad U5 smd circle (at -9.2 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 509 "/FPGA IO/EXT1_5-")) + (net 484 "/FPGA IO/EXT1_5-")) (pad T5 smd circle (at -9.2 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 511 "/FPGA IO/EXT1_4-")) + (net 486 "/FPGA IO/EXT1_4-")) (pad R5 smd circle (at -9.2 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad P5 smd circle (at -9.2 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 520 "/FPGA IO/EXT1_0+")) + (net 495 "/FPGA IO/EXT1_0+")) (pad N5 smd circle (at -9.2 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad L5 smd circle (at -9.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 616 "Net-(U15-PadL5)")) + (net 591 "Net-(U15-PadL5)")) (pad K5 smd circle (at -9.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 531 "/FPGA IO/EXT2_5+")) + (net 700 "Net-(U15-PadK5)")) (pad J5 smd circle (at -9.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad H5 smd circle (at -9.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 534 "/FPGA IO/EXT2_6-")) + (net 501 "/FPGA IO/EXT2_2-")) (pad F5 smd circle (at -9.2 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 478 "/FPGA IO/EXT3_3-")) + (net 503 "/FPGA IO/EXT2_3-")) (pad E5 smd circle (at -9.2 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad D5 smd circle (at -9.2 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 472 "/FPGA IO/EXT3_0-")) + (net 509 "/FPGA IO/EXT2_6-")) (pad C5 smd circle (at -9.2 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 471 "/FPGA IO/EXT3_0+")) + (net 508 "/FPGA IO/EXT2_6+")) (pad B5 smd circle (at -9.2 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A5 smd circle (at -9.2 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 615 "Net-(U15-PadA5)")) + (net 590 "Net-(U15-PadA5)")) (pad AM4 smd circle (at -10 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 28 "/FPGA IO/CFG2")) (pad AL4 smd circle (at -10 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14627,51 +14513,51 @@ (pad AE4 smd circle (at -10 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 467 "/FPGA IO/EXT0_1-")) (pad AD4 smd circle (at -10 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 716 "Net-(U15-PadAD4)")) + (net 691 "Net-(U15-PadAD4)")) (pad AC4 smd circle (at -10 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 614 "Net-(U15-PadAC4)")) + (net 589 "Net-(U15-PadAC4)")) (pad AB4 smd circle (at -10 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 457 "/FPGA IO/EXT0_6-")) (pad Y4 smd circle (at -10 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 717 "Net-(U15-PadY4)")) + (net 692 "Net-(U15-PadY4)")) (pad W4 smd circle (at -10 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 718 "Net-(U15-PadW4)")) + (net 693 "Net-(U15-PadW4)")) (pad V4 smd circle (at -10 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 507 "/FPGA IO/EXT1_6-")) + (net 482 "/FPGA IO/EXT1_6-")) (pad U4 smd circle (at -10 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 508 "/FPGA IO/EXT1_6+")) + (net 483 "/FPGA IO/EXT1_6+")) (pad T4 smd circle (at -10 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 510 "/FPGA IO/EXT1_5+")) + (net 485 "/FPGA IO/EXT1_5+")) (pad R4 smd circle (at -10 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 512 "/FPGA IO/EXT1_4+")) + (net 487 "/FPGA IO/EXT1_4+")) (pad P4 smd circle (at -10 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 519 "/FPGA IO/EXT1_0-")) + (net 494 "/FPGA IO/EXT1_0-")) (pad N4 smd circle (at -10 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 526 "/FPGA IO/EXT2_2-")) + (net 701 "Net-(U15-PadN4)")) (pad L4 smd circle (at -10 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 532 "/FPGA IO/EXT2_5-")) + (net 702 "Net-(U15-PadL4)")) (pad K4 smd circle (at -10 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 540 "/FPGA IO/EXT2_9-")) + (net 703 "Net-(U15-PadK4)")) (pad J4 smd circle (at -10 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 539 "/FPGA IO/EXT2_9+")) + (net 704 "Net-(U15-PadJ4)")) (pad H4 smd circle (at -10 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 613 "Net-(U15-PadH4)")) + (net 588 "Net-(U15-PadH4)")) (pad F4 smd circle (at -10 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 477 "/FPGA IO/EXT3_3+")) + (net 502 "/FPGA IO/EXT2_3+")) (pad E4 smd circle (at -10 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 476 "/FPGA IO/EXT3_2-")) + (net 716 "Net-(U15-PadE4)")) (pad D4 smd circle (at -10 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 475 "/FPGA IO/EXT3_2+")) + (net 717 "Net-(U15-PadD4)")) (pad C4 smd circle (at -10 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 473 "/FPGA IO/EXT3_1+")) + (net 506 "/FPGA IO/EXT2_5+")) (pad B4 smd circle (at -10 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 612 "Net-(U15-PadB4)")) + (net 587 "Net-(U15-PadB4)")) (pad A4 smd circle (at -10 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 348 CLK_SD_OE)) (pad AM3 smd circle (at -10.8 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 150 "/FPGA IO/FLASH_CLK")) (pad AL3 smd circle (at -10.8 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 611 "Net-(U15-PadAL3)")) + (net 586 "Net-(U15-PadAL3)")) (pad AK3 smd circle (at -10.8 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 163 "Net-(R97-Pad1)")) (pad AJ3 smd circle (at -10.8 10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14679,51 +14565,51 @@ (pad AH3 smd circle (at -10.8 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 21 USD_CMD)) (pad AG3 smd circle (at -10.8 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 610 "Net-(U15-PadAG3)")) + (net 585 "Net-(U15-PadAG3)")) (pad AE3 smd circle (at -10.8 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 455 "/FPGA IO/EXT0_7-")) (pad AD3 smd circle (at -10.8 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 456 "/FPGA IO/EXT0_7+")) (pad AC3 smd circle (at -10.8 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 609 "Net-(U15-PadAC3)")) + (net 584 "Net-(U15-PadAC3)")) (pad AB3 smd circle (at -10.8 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 458 "/FPGA IO/EXT0_6+")) (pad Y3 smd circle (at -10.8 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 608 "Net-(U15-PadY3)")) + (net 583 "Net-(U15-PadY3)")) (pad W3 smd circle (at -10.8 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 607 "Net-(U15-PadW3)")) + (net 582 "Net-(U15-PadW3)")) (pad V3 smd circle (at -10.8 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 606 "Net-(U15-PadV3)")) + (net 581 "Net-(U15-PadV3)")) (pad U3 smd circle (at -10.8 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 497 "/FPGA IO/EXT1_11-")) + (net 472 "/FPGA IO/EXT1_11-")) (pad T3 smd circle (at -10.8 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 501 "/FPGA IO/EXT1_9-")) + (net 476 "/FPGA IO/EXT1_9-")) (pad R3 smd circle (at -10.8 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 502 "/FPGA IO/EXT1_9+")) + (net 477 "/FPGA IO/EXT1_9+")) (pad P3 smd circle (at -10.8 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 503 "/FPGA IO/EXT1_8-")) + (net 478 "/FPGA IO/EXT1_8-")) (pad N3 smd circle (at -10.8 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 525 "/FPGA IO/EXT2_2+")) + (net 705 "Net-(U15-PadN3)")) (pad L3 smd circle (at -10.8 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 538 "/FPGA IO/EXT2_8-")) + (net 706 "Net-(U15-PadL3)")) (pad K3 smd circle (at -10.8 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 494 "/FPGA IO/EXT3_11-")) + (net 515 "/FPGA IO/EXT2_9-")) (pad J3 smd circle (at -10.8 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 493 "/FPGA IO/EXT3_11+")) + (net 514 "/FPGA IO/EXT2_9+")) (pad H3 smd circle (at -10.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 492 "/FPGA IO/EXT3_10-")) + (net 513 "/FPGA IO/EXT2_8-")) (pad F3 smd circle (at -10.8 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 483 "/FPGA IO/EXT3_6+")) + (net 504 "/FPGA IO/EXT2_4+")) (pad E3 smd circle (at -10.8 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 484 "/FPGA IO/EXT3_6-")) + (net 505 "/FPGA IO/EXT2_4-")) (pad D3 smd circle (at -10.8 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 481 "/FPGA IO/EXT3_5+")) + (net 510 "/FPGA IO/EXT2_7+")) (pad C3 smd circle (at -10.8 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 474 "/FPGA IO/EXT3_1-")) + (net 507 "/FPGA IO/EXT2_5-")) (pad B3 smd circle (at -10.8 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 123 FPGA_12MHz)) (pad A3 smd circle (at -10.8 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 605 "Net-(U15-PadA3)")) + (net 580 "Net-(U15-PadA3)")) (pad AM2 smd circle (at -11.6 12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 31 "/FPGA IO/FLASH_D2")) (pad AL2 smd circle (at -11.6 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14735,15 +14621,15 @@ (pad AH2 smd circle (at -11.6 9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AG2 smd circle (at -11.6 8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 604 "Net-(U15-PadAG2)")) + (net 579 "Net-(U15-PadAG2)")) (pad AE2 smd circle (at -11.6 6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 603 "Net-(U15-PadAE2)")) + (net 578 "Net-(U15-PadAE2)")) (pad AD2 smd circle (at -11.6 6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad AC2 smd circle (at -11.6 5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 602 "Net-(U15-PadAC2)")) + (net 577 "Net-(U15-PadAC2)")) (pad AB2 smd circle (at -11.6 4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 601 "Net-(U15-PadAB2)")) + (net 576 "Net-(U15-PadAB2)")) (pad Y2 smd circle (at -11.6 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad W2 smd circle (at -11.6 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14751,35 +14637,35 @@ (pad V2 smd circle (at -11.6 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad U2 smd circle (at -11.6 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 498 "/FPGA IO/EXT1_11+")) + (net 473 "/FPGA IO/EXT1_11+")) (pad T2 smd circle (at -11.6 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 600 "Net-(U15-PadT2)")) + (net 575 "Net-(U15-PadT2)")) (pad R2 smd circle (at -11.6 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad P2 smd circle (at -11.6 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 504 "/FPGA IO/EXT1_8+")) + (net 479 "/FPGA IO/EXT1_8+")) (pad N2 smd circle (at -11.6 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad L2 smd circle (at -11.6 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 537 "/FPGA IO/EXT2_8+")) + (net 707 "Net-(U15-PadL2)")) (pad K2 smd circle (at -11.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 541 "/FPGA IO/EXT2_10+")) + (net 708 "Net-(U15-PadK2)")) (pad J2 smd circle (at -11.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad H2 smd circle (at -11.6 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 491 "/FPGA IO/EXT3_10+")) + (net 512 "/FPGA IO/EXT2_8+")) (pad F2 smd circle (at -11.6 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 487 "/FPGA IO/EXT3_8+")) + (net 714 "Net-(U15-PadF2)")) (pad E2 smd circle (at -11.6 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad D2 smd circle (at -11.6 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 482 "/FPGA IO/EXT3_5-")) + (net 511 "/FPGA IO/EXT2_7-")) (pad C2 smd circle (at -11.6 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 480 "/FPGA IO/EXT3_4-")) + (net 517 "/FPGA IO/EXT2_10-")) (pad B2 smd circle (at -11.6 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad A2 smd circle (at -11.6 -12.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 599 "Net-(U15-PadA2)")) + (net 574 "Net-(U15-PadA2)")) (pad AL1 smd circle (at -12.4 11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 29 "/FPGA IO/FLASH_D3")) (pad AK1 smd circle (at -12.4 10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) @@ -14801,37 +14687,37 @@ (pad Y1 smd circle (at -12.4 2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 461 "/FPGA IO/EXT0_4-")) (pad W1 smd circle (at -12.4 2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 711 "Net-(U15-PadW1)")) + (net 686 "Net-(U15-PadW1)")) (pad V1 smd circle (at -12.4 1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 712 "Net-(U15-PadV1)")) + (net 687 "Net-(U15-PadV1)")) (pad U1 smd circle (at -12.4 0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 469 "/FPGA IO/EXT0_0-")) (pad T1 smd circle (at -12.4 -0.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) (net 470 "/FPGA IO/EXT0_0+")) (pad R1 smd circle (at -12.4 -1.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 598 "Net-(U15-PadR1)")) + (net 573 "Net-(U15-PadR1)")) (pad P1 smd circle (at -12.4 -2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 499 "/FPGA IO/EXT1_10-")) + (net 474 "/FPGA IO/EXT1_10-")) (pad N1 smd circle (at -12.4 -2.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 500 "/FPGA IO/EXT1_10+")) + (net 475 "/FPGA IO/EXT1_10+")) (pad L1 smd circle (at -12.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 544 "/FPGA IO/EXT2_11-")) + (net 709 "Net-(U15-PadL1)")) (pad K1 smd circle (at -12.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 543 "/FPGA IO/EXT2_11+")) + (net 710 "Net-(U15-PadK1)")) (pad J1 smd circle (at -12.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 542 "/FPGA IO/EXT2_10-")) + (net 711 "Net-(U15-PadJ1)")) (pad H1 smd circle (at -12.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 490 "/FPGA IO/EXT3_9-")) + (net 519 "/FPGA IO/EXT2_11-")) (pad F1 smd circle (at -12.4 -8.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 489 "/FPGA IO/EXT3_9+")) + (net 518 "/FPGA IO/EXT2_11+")) (pad E1 smd circle (at -12.4 -9.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 488 "/FPGA IO/EXT3_8-")) + (net 715 "Net-(U15-PadE1)")) (pad D1 smd circle (at -12.4 -10) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 486 "/FPGA IO/EXT3_7-")) + (net 712 "Net-(U15-PadD1)")) (pad C1 smd circle (at -12.4 -10.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 485 "/FPGA IO/EXT3_7+")) + (net 713 "Net-(U15-PadC1)")) (pad B1 smd circle (at -12.4 -11.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask) - (net 479 "/FPGA IO/EXT3_4+")) + (net 516 "/FPGA IO/EXT2_10+")) (model /home/david/3d/cabga756.stp (offset (xyz -13.5 -13.5 0)) (scale (xyz 1 1 1)) @@ -15025,7 +14911,7 @@ (fp_line (start -1 3) (end 1 3) (layer F.SilkS) (width 0.15)) (fp_line (start -1 -3) (end 1 -3) (layer F.SilkS) (width 0.15)) (pad 2 smd rect (at 4 0) (size 5 6) (layers F.Cu F.Paste F.Mask) - (net 597 "Net-(F2-Pad2)")) + (net 572 "Net-(F2-Pad2)")) (pad 1 smd rect (at -4 0) (size 5 6) (layers F.Cu F.Paste F.Mask) (net 170 +12V)) (model /home/david/3d/0031-7701-11.STEP @@ -15125,9 +15011,9 @@ (pad 12 smd rect (at -1 1.3 270) (size 0.3 2.6) (layers F.Cu F.Paste F.Mask) (net 270 "/HDMI, GbE, USB/TMDS_CLK-")) (pad 13 smd rect (at -1.5 1.3 270) (size 0.3 2.6) (layers F.Cu F.Paste F.Mask) - (net 584 "Net-(J3-Pad13)")) + (net 559 "Net-(J3-Pad13)")) (pad 14 smd rect (at -2 1.3 270) (size 0.3 2.6) (layers F.Cu F.Paste F.Mask) - (net 583 "Net-(J3-Pad14)")) + (net 558 "Net-(J3-Pad14)")) (pad 15 smd rect (at -2.5 1.3 270) (size 0.3 2.6) (layers F.Cu F.Paste F.Mask) (net 140 "/HDMI, GbE, USB/PORT_SCL")) (pad 16 smd rect (at -3 1.3 270) (size 0.3 2.6) (layers F.Cu F.Paste F.Mask) @@ -15269,15 +15155,15 @@ (fp_line (start 1.9 1.6) (end 1.8 1.6) (layer F.SilkS) (width 0.15)) (fp_line (start 2.5 -1.6) (end 1.8 -1.6) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.27 1.1049 90) (size 0.89 1.29) (layers F.Cu F.Paste F.Mask) - (net 579 "Net-(U26-Pad1)")) + (net 554 "Net-(U26-Pad1)")) (pad 2 smd rect (at 0 1.1049 90) (size 0.89 1.29) (layers F.Cu F.Paste F.Mask) - (net 580 "Net-(U26-Pad2)")) + (net 555 "Net-(U26-Pad2)")) (pad 3 smd rect (at 1.27 1.1049 90) (size 0.89 1.29) (layers F.Cu F.Paste F.Mask) (net 24 GND)) (pad 4 smd rect (at 1.27 -1.1049 90) (size 0.89 1.29) (layers F.Cu F.Paste F.Mask) - (net 581 "/FPGA IO/CLK100+")) + (net 556 "/FPGA IO/CLK100+")) (pad 5 smd rect (at 0 -1.1049 90) (size 0.89 1.29) (layers F.Cu F.Paste F.Mask) - (net 582 "/FPGA IO/CLK100-")) + (net 557 "/FPGA IO/CLK100-")) (pad 6 smd rect (at -1.27 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(segment (start 110.801778 113.375) (end 111.375 113.948222) (width 0.15) (layer B.Cu) (net 602)) + (segment (start 111.375 113.948222) (end 111.375 116.94) (width 0.15) (layer B.Cu) (net 602)) + (via (at 121.65 59.66) (size 0.4) (drill 0.2) (layers F.Cu B.Cu) (net 603)) + (segment (start 122 60) (end 121.99 60) (width 0.1) (layer F.Cu) (net 603)) + (segment (start 121.99 60) (end 121.65 59.66) (width 0.1) (layer F.Cu) (net 603)) + (via (at 121.56 60.42) (size 0.4) (drill 0.2) (layers F.Cu B.Cu) (net 604)) + (segment (start 122 60.8) (end 121.94 60.8) (width 0.1) (layer F.Cu) (net 604)) + (segment (start 121.94 60.8) (end 121.56 60.42) (width 0.1) (layer F.Cu) (net 604)) + (via (at 127.14 58.8) (size 0.4) (drill 0.2) (layers F.Cu B.Cu) (net 615)) + (segment (start 126.8 59.2) (end 126.8 59.14) (width 0.1) (layer F.Cu) (net 615)) + (segment (start 126.8 59.14) (end 127.14 58.8) (width 0.1) (layer F.Cu) (net 615)) + (via (at 127.23 61.19) (size 0.4) (drill 0.2) (layers F.Cu B.Cu) (net 616)) + (segment (start 126.8 61.6) (end 126.82 61.6) (width 0.1) (layer F.Cu) (net 616)) + (segment (start 126.82 61.6) (end 127.23 61.19) (width 0.1) (layer F.Cu) (net 616)) (zone (net 24) (net_name GND) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) (connect_pads (clearance 0.254)) diff --git a/hardware/ecp5_mainboard/fpga_io.sch b/hardware/ecp5_mainboard/fpga_io.sch index 15a52e9..cb8442c 100644 --- a/hardware/ecp5_mainboard/fpga_io.sch +++ b/hardware/ecp5_mainboard/fpga_io.sch @@ -2180,395 +2180,104 @@ EXT2_11- Wire Wire Line 4300 15400 3700 15400 Wire Wire Line - 11950 13700 12550 13700 -Text Label 11950 13700 0 50 ~ 0 + 11950 12900 12550 12900 +Text Label 11950 12900 0 50 ~ 0 EXT2_0+ -Text Label 11950 13900 0 50 ~ 0 +Text Label 11950 13100 0 50 ~ 0 EXT2_0- Wire Wire Line - 11950 13900 12550 13900 + 11950 13100 12550 13100 Wire Wire Line - 11950 13800 12550 13800 -Text Label 11950 13800 0 50 ~ 0 + 11950 12600 12550 12600 +Text Label 11950 12600 0 50 ~ 0 EXT2_1+ -Text Label 11950 14000 0 50 ~ 0 +Text Label 11950 12800 0 50 ~ 0 EXT2_1- Wire Wire Line - 11950 14000 12550 14000 + 11950 12800 12550 12800 Wire Wire Line - 11950 13300 12550 13300 -Text Label 11950 13300 0 50 ~ 0 + 11950 12500 12550 12500 +Text Label 11950 12500 0 50 ~ 0 EXT2_2+ -Text Label 11950 13500 0 50 ~ 0 +Text Label 11950 12700 0 50 ~ 0 EXT2_2- Wire Wire Line - 11950 13500 12550 13500 + 11950 12700 12550 12700 Wire Wire Line - 11950 13400 12550 13400 -Text Label 11950 13400 0 50 ~ 0 + 11950 9800 12550 9800 +Text Label 11950 9800 0 50 ~ 0 EXT2_3+ -Text Label 11950 13600 0 50 ~ 0 +Text Label 11950 10000 0 50 ~ 0 EXT2_3- Wire Wire Line - 11950 13600 12550 13600 + 11950 10000 12550 10000 Wire Wire Line - 11950 12900 12550 12900 -Text Label 11950 12900 0 50 ~ 0 + 11950 10500 12550 10500 +Text Label 11950 10500 0 50 ~ 0 EXT2_4+ -Text Label 11950 13100 0 50 ~ 0 +Text Label 11950 10700 0 50 ~ 0 EXT2_4- Wire Wire Line - 11950 13100 12550 13100 + 11950 10700 12550 10700 Wire Wire Line - 11950 13000 12550 13000 -Text Label 11950 13000 0 50 ~ 0 + 11950 9500 12550 9500 +Text Label 11950 9500 0 50 ~ 0 EXT2_5+ -Text Label 11950 13200 0 50 ~ 0 +Text Label 11950 9600 0 50 ~ 0 EXT2_5- Wire Wire Line - 11950 13200 12550 13200 + 11950 9600 12550 9600 Wire Wire Line - 11950 12500 12550 12500 -Text Label 11950 12500 0 50 ~ 0 + 11950 9300 12550 9300 +Text Label 11950 9300 0 50 ~ 0 EXT2_6+ -Text Label 11950 12700 0 50 ~ 0 +Text Label 11950 9400 0 50 ~ 0 EXT2_6- Wire Wire Line - 11950 12700 12550 12700 + 11950 9400 12550 9400 Wire Wire Line - 11950 12600 12550 12600 -Text Label 11950 12600 0 50 ~ 0 + 11950 10200 12550 10200 +Text Label 11950 10200 0 50 ~ 0 EXT2_7+ -Text Label 11950 12800 0 50 ~ 0 +Text Label 11950 10400 0 50 ~ 0 EXT2_7- Wire Wire Line - 11950 12800 12550 12800 + 11950 10400 12550 10400 Wire Wire Line - 11950 12100 12550 12100 -Text Label 11950 12100 0 50 ~ 0 + 11950 11300 12550 11300 +Text Label 11950 11300 0 50 ~ 0 EXT2_8+ -Text Label 11950 12300 0 50 ~ 0 +Text Label 11950 11500 0 50 ~ 0 EXT2_8- Wire Wire Line - 11950 12300 12550 12300 + 11950 11500 12550 11500 Wire Wire Line - 11950 12200 12550 12200 -Text Label 11950 12200 0 50 ~ 0 + 11950 11400 12550 11400 +Text Label 11950 11400 0 50 ~ 0 EXT2_9+ -Text Label 11950 12400 0 50 ~ 0 +Text Label 11950 11600 0 50 ~ 0 EXT2_9- Wire Wire Line - 11950 12400 12550 12400 -Wire Wire Line - 11950 11700 12550 11700 -Text Label 11950 11700 0 50 ~ 0 -EXT2_10+ -Text Label 11950 11900 0 50 ~ 0 -EXT2_10- -Wire Wire Line - 11950 11900 12550 11900 -Wire Wire Line - 11950 11800 12550 11800 -Text Label 11950 11800 0 50 ~ 0 -EXT2_11+ -Text Label 11950 12000 0 50 ~ 0 -EXT2_11- -Wire Wire Line - 11950 12000 12550 12000 -NoConn ~ 1400 15500 -NoConn ~ 2600 15500 -NoConn ~ 3700 15500 -$Comp -L Connector_Generic:Conn_01x40 J8 -U 1 1 65FA91E0 -P 4550 13700 -F 0 "J8" H 4470 15817 50 0000 C CNN -F 1 "EXT3" H 4470 15726 50 0000 C CNN -F 2 "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" H 4550 13700 50 0001 C CNN -F 3 "~" H 4550 13700 50 0001 C CNN - 1 4550 13700 - -1 0 0 -1 -$EndComp -Wire Wire Line - 4750 11800 4850 11800 -Text Label 5350 11800 2 50 ~ 0 -VCCIO7 -Wire Wire Line - 4750 15700 4850 15700 -Text Label 5350 15700 2 50 ~ 0 -VCCIO7 -$Comp -L power:GND #PWR0207 -U 1 1 65FA91EA -P 4950 15750 -F 0 "#PWR0207" H 4950 15500 50 0001 C CNN -F 1 "GND" H 4955 15577 50 0000 C CNN -F 2 "" H 4950 15750 50 0001 C CNN -F 3 "" H 4950 15750 50 0001 C CNN - 1 4950 15750 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5350 12000 4750 12000 -Text Label 5350 12000 2 50 ~ 0 -EXT3_0+ -Text Label 5350 12100 2 50 ~ 0 -EXT3_0- -Wire Wire Line - 5350 12100 4750 12100 -Wire Wire Line - 5350 12300 4750 12300 -Text Label 5350 12300 2 50 ~ 0 -EXT3_1+ -Text Label 5350 12400 2 50 ~ 0 -EXT3_1- -Wire Wire Line - 5350 12400 4750 12400 -Wire Wire Line - 5350 12600 4750 12600 -Text Label 5350 12600 2 50 ~ 0 -EXT3_2+ -Text Label 5350 12700 2 50 ~ 0 -EXT3_2- -Wire Wire Line - 5350 12700 4750 12700 -Wire Wire Line - 5350 12900 4750 12900 -Text Label 5350 12900 2 50 ~ 0 -EXT3_3+ -Text Label 5350 13000 2 50 ~ 0 -EXT3_3- -Wire Wire Line - 5350 13000 4750 13000 -Wire Wire Line - 5350 13200 4750 13200 -Text Label 5350 13200 2 50 ~ 0 -EXT3_4+ -Text Label 5350 13300 2 50 ~ 0 -EXT3_4- -Wire Wire Line - 5350 13300 4750 13300 -Wire Wire Line - 5350 13500 4750 13500 -Text Label 5350 13500 2 50 ~ 0 -EXT3_5+ -Text Label 5350 13600 2 50 ~ 0 -EXT3_5- -Wire Wire Line - 5350 13600 4750 13600 -Wire Wire Line - 5350 13800 4750 13800 -Text Label 5350 13800 2 50 ~ 0 -EXT3_6+ -Text Label 5350 13900 2 50 ~ 0 -EXT3_6- -Wire Wire Line - 5350 13900 4750 13900 -Wire Wire Line - 5350 14100 4750 14100 -Text Label 5350 14100 2 50 ~ 0 -EXT3_7+ -Text Label 5350 14200 2 50 ~ 0 -EXT3_7- -Wire Wire Line - 5350 14200 4750 14200 -Wire Wire Line - 5350 14400 4750 14400 -Text Label 5350 14400 2 50 ~ 0 -EXT3_8+ -Text Label 5350 14500 2 50 ~ 0 -EXT3_8- -Wire Wire Line - 5350 14500 4750 14500 -Wire Wire Line - 5350 14700 4750 14700 -Text Label 5350 14700 2 50 ~ 0 -EXT3_9+ -Text Label 5350 14800 2 50 ~ 0 -EXT3_9- -Wire Wire Line - 5350 14800 4750 14800 -Wire Wire Line - 4750 15600 4850 15600 -Wire Wire Line - 4850 15600 4850 15700 -Connection ~ 4850 15700 -Wire Wire Line - 4850 15700 5350 15700 -Wire Wire Line - 4750 11900 4850 11900 -Wire Wire Line - 4850 11900 4850 11800 -Connection ~ 4850 11800 -Wire Wire Line - 4850 11800 5350 11800 -Wire Wire Line - 4750 12200 4950 12200 -Wire Wire Line - 4950 12200 4950 12500 -Wire Wire Line - 4750 12500 4950 12500 -Connection ~ 4950 12500 -Wire Wire Line - 4950 12500 4950 12800 -Wire Wire Line - 4750 12800 4950 12800 -Connection ~ 4950 12800 -Wire Wire Line - 4950 12800 4950 13100 -Wire Wire Line - 4750 13100 4950 13100 -Connection ~ 4950 13100 -Wire Wire Line - 4950 13100 4950 13400 -Wire Wire Line - 4750 13400 4950 13400 -Connection ~ 4950 13400 -Wire Wire Line - 4950 13400 4950 13700 -Wire Wire Line - 4750 13700 4950 13700 -Connection ~ 4950 13700 -Wire Wire Line - 4950 13700 4950 14000 -Wire Wire Line - 4750 14000 4950 14000 -Connection ~ 4950 14000 -Wire Wire Line - 4950 14000 4950 14300 -Wire Wire Line - 4750 14300 4950 14300 -Connection ~ 4950 14300 -Wire Wire Line - 4950 14300 4950 14600 -Wire Wire Line - 4750 14600 4950 14600 -Connection ~ 4950 14600 -Wire Wire Line - 4950 14600 4950 14900 -Wire Wire Line - 4750 14900 4950 14900 -Connection ~ 4950 14900 -Wire Wire Line - 4950 14900 4950 15200 -Wire Wire Line - 5350 15000 4750 15000 -Text Label 5350 15000 2 50 ~ 0 -EXT3_10+ -Text Label 5350 15100 2 50 ~ 0 -EXT3_10- -Wire Wire Line - 5350 15100 4750 15100 -Wire Wire Line - 4750 15200 4950 15200 -Connection ~ 4950 15200 -Wire Wire Line - 4950 15200 4950 15750 -Wire Wire Line - 5350 15300 4750 15300 -Text Label 5350 15300 2 50 ~ 0 -EXT3_11+ -Text Label 5350 15400 2 50 ~ 0 -EXT3_11- -Wire Wire Line - 5350 15400 4750 15400 -NoConn ~ 4750 15500 -Wire Wire Line - 11950 9300 12550 9300 -Text Label 11950 9300 0 50 ~ 0 -EXT3_0+ -Text Label 11950 9400 0 50 ~ 0 -EXT3_0- -Wire Wire Line - 11950 9400 12550 9400 -Wire Wire Line - 11950 9500 12550 9500 -Text Label 11950 9500 0 50 ~ 0 -EXT3_1+ -Text Label 11950 9600 0 50 ~ 0 -EXT3_1- -Wire Wire Line - 11950 9600 12550 9600 -Wire Wire Line - 11950 9700 12550 9700 -Text Label 11950 9700 0 50 ~ 0 -EXT3_2+ -Text Label 11950 9900 0 50 ~ 0 -EXT3_2- -Wire Wire Line - 11950 9900 12550 9900 -Wire Wire Line - 11950 9800 12550 9800 -Text Label 11950 9800 0 50 ~ 0 -EXT3_3+ -Text Label 11950 10000 0 50 ~ 0 -EXT3_3- -Wire Wire Line - 11950 10000 12550 10000 + 11950 11600 12550 11600 Wire Wire Line 11950 10100 12550 10100 Text Label 11950 10100 0 50 ~ 0 -EXT3_4+ +EXT2_10+ Text Label 11950 10300 0 50 ~ 0 -EXT3_4- +EXT2_10- Wire Wire Line 11950 10300 12550 10300 -Wire Wire Line - 11950 10200 12550 10200 -Text Label 11950 10200 0 50 ~ 0 -EXT3_5+ -Text Label 11950 10400 0 50 ~ 0 -EXT3_5- -Wire Wire Line - 11950 10400 12550 10400 -Wire Wire Line - 11950 10500 12550 10500 -Text Label 11950 10500 0 50 ~ 0 -EXT3_6+ -Text Label 11950 10700 0 50 ~ 0 -EXT3_6- -Wire Wire Line - 11950 10700 12550 10700 -Wire Wire Line - 11950 10600 12550 10600 -Text Label 11950 10600 0 50 ~ 0 -EXT3_7+ -Text Label 11950 10800 0 50 ~ 0 -EXT3_7- -Wire Wire Line - 11950 10800 12550 10800 -Wire Wire Line - 11950 10900 12550 10900 -Text Label 11950 10900 0 50 ~ 0 -EXT3_8+ -Text Label 11950 11100 0 50 ~ 0 -EXT3_8- -Wire Wire Line - 11950 11100 12550 11100 Wire Wire Line 11950 11000 12550 11000 Text Label 11950 11000 0 50 ~ 0 -EXT3_9+ +EXT2_11+ Text Label 11950 11200 0 50 ~ 0 -EXT3_9- +EXT2_11- Wire Wire Line 11950 11200 12550 11200 -Wire Wire Line - 11950 11300 12550 11300 -Text Label 11950 11300 0 50 ~ 0 -EXT3_10+ -Text Label 11950 11500 0 50 ~ 0 -EXT3_10- -Wire Wire Line - 11950 11500 12550 11500 -Wire Wire Line - 11950 11400 12550 11400 -Text Label 11950 11400 0 50 ~ 0 -EXT3_11+ -Text Label 11950 11600 0 50 ~ 0 -EXT3_11- -Wire Wire Line - 11950 11600 12550 11600 +NoConn ~ 1400 15500 +NoConn ~ 2600 15500 +NoConn ~ 3700 15500 Text Label 8400 8400 0 50 ~ 0 VCCIO6 Wire Wire Line