From 280ce08a1b18e9559388bc0af996379321071c67 Mon Sep 17 00:00:00 2001 From: David Shah Date: Wed, 21 Nov 2018 16:07:21 +0000 Subject: [PATCH] hardware/mainboard: All footprints assigned Signed-off-by: David Shah --- .../ecp5_mainboard/ecp5_mainboard-cache.lib | 23 +++---- hardware/ecp5_mainboard/fpga_io.sch | 12 ++-- hardware/ecp5_mainboard/power.sch | 33 ++++++---- .../TE_FPC_40pin_p0.5mm_4-1734839-0.kicad_mod | 64 +++++++++++++++++++ 4 files changed, 101 insertions(+), 31 deletions(-) create mode 100644 hardware/lib/parts.pretty/TE_FPC_40pin_p0.5mm_4-1734839-0.kicad_mod diff --git a/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib b/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib index e83bb9a..4c984ee 100644 --- a/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib +++ b/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib @@ -497,13 +497,13 @@ X 3 3 0 -200 50 U 50 50 1 1 P ENDDRAW ENDDEF # -# Device_D_Small +# Device_D_Schottky_AAK # -DEF Device_D_Small D 0 10 N N 1 F N -F0 "D" -50 80 50 H V L CNN -F1 "Device_D_Small" -150 -80 50 H V L CNN -F2 "" 0 0 50 V I C CNN -F3 "" 0 0 50 V I C CNN +DEF Device_D_Schottky_AAK D 0 0 Y N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "Device_D_Schottky_AAK" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN $FPLIST TO-???* *_Diode_* @@ -511,11 +511,12 @@ $FPLIST D_* $ENDFPLIST DRAW -P 2 0 1 0 -30 -40 -30 40 N -P 2 0 1 0 -30 0 30 0 N -P 4 0 1 0 30 -40 -30 0 30 40 30 -40 N -X K 1 -100 0 70 R 50 50 1 1 P -X A 2 100 0 70 L 50 50 1 1 P +P 4 0 1 8 50 50 50 -50 -50 0 50 50 N +P 4 0 1 0 150 100 100 100 100 0 -50 0 N +P 6 0 1 8 -75 25 -75 50 -50 50 -50 -50 -25 -50 -25 -25 N +X A 1 200 100 100 L 50 50 1 1 I +X A 2 200 0 100 L 50 50 1 1 P +X K 3 -150 0 100 R 50 50 1 1 P ENDDRAW ENDDEF # diff --git a/hardware/ecp5_mainboard/fpga_io.sch b/hardware/ecp5_mainboard/fpga_io.sch index c093a5a..5426bb5 100644 --- a/hardware/ecp5_mainboard/fpga_io.sch +++ b/hardware/ecp5_mainboard/fpga_io.sch @@ -1428,7 +1428,7 @@ U 1 1 62664D22 P 1200 13700 F 0 "J5" H 1120 15817 50 0000 C CNN F 1 "EXT0" H 1120 15726 50 0000 C CNN -F 2 "" H 1200 13700 50 0001 C CNN +F 2 "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" H 1200 13700 50 0001 C CNN F 3 "~" H 1200 13700 50 0001 C CNN 1 1200 13700 -1 0 0 -1 @@ -1742,7 +1742,7 @@ U 1 1 635A137F P 2400 13700 F 0 "J6" H 2320 15817 50 0000 C CNN F 1 "EXT1" H 2320 15726 50 0000 C CNN -F 2 "" H 2400 13700 50 0001 C CNN +F 2 "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" H 2400 13700 50 0001 C CNN F 3 "~" H 2400 13700 50 0001 C CNN 1 2400 13700 -1 0 0 -1 @@ -2031,8 +2031,8 @@ L Connector_Generic:Conn_01x40 J7 U 1 1 64AB9BC6 P 3500 13700 F 0 "J7" H 3420 15817 50 0000 C CNN -F 1 "EXT1" H 3420 15726 50 0000 C CNN -F 2 "" H 3500 13700 50 0001 C CNN +F 1 "EXT2" H 3420 15726 50 0000 C CNN +F 2 "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" H 3500 13700 50 0001 C CNN F 3 "~" H 3500 13700 50 0001 C CNN 1 3500 13700 -1 0 0 -1 @@ -2324,8 +2324,8 @@ L Connector_Generic:Conn_01x40 J8 U 1 1 65FA91E0 P 4550 13700 F 0 "J8" H 4470 15817 50 0000 C CNN -F 1 "EXT1" H 4470 15726 50 0000 C CNN -F 2 "" H 4550 13700 50 0001 C CNN +F 1 "EXT3" H 4470 15726 50 0000 C CNN +F 2 "Custom Parts:TE_FPC_40pin_p0.5mm_4-1734839-0" H 4550 13700 50 0001 C CNN F 3 "~" H 4550 13700 50 0001 C CNN 1 4550 13700 -1 0 0 -1 diff --git a/hardware/ecp5_mainboard/power.sch b/hardware/ecp5_mainboard/power.sch index f173842..a963607 100644 --- a/hardware/ecp5_mainboard/power.sch +++ b/hardware/ecp5_mainboard/power.sch @@ -57,21 +57,8 @@ Wire Wire Line 3050 3350 3200 3350 Wire Wire Line 3050 2400 3200 2400 -$Comp -L Device:D_Small D3 -U 1 1 5B5DA9BE -P 3200 2700 -F 0 "D3" V 3154 2768 50 0000 L CNN -F 1 "MBR15U60" V 3245 2768 50 0000 L CNN -F 2 "" V 3200 2700 50 0001 C CNN -F 3 "~" V 3200 2700 50 0001 C CNN - 1 3200 2700 - 0 1 1 0 -$EndComp Wire Wire Line 3200 2600 3200 2400 -Wire Wire Line - 3200 2800 3200 3350 Wire Wire Line 2250 2650 2350 2650 Wire Wire Line @@ -2791,7 +2778,7 @@ Wire Wire Line Wire Wire Line 3850 2400 4550 2400 Wire Wire Line - 3200 3350 3850 3350 + 3200 3350 3300 3350 $Comp L power:PWR_FLAG #FLG0101 U 1 1 61A6AF75 @@ -2814,4 +2801,22 @@ Wire Wire Line 3050 2550 3050 2400 Wire Wire Line 2850 2550 3050 2550 +$Comp +L Device:D_Schottky_AAK D3 +U 1 1 5C219D75 +P 3200 2750 +F 0 "D3" V 3179 2890 50 0000 L CNN +F 1 "MBR15U60" V 3270 2890 50 0000 L CNN +F 2 "Package_TO_SOT_SMD:TO-277B" H 3200 2750 50 0001 C CNN +F 3 "~" H 3200 2750 50 0001 C CNN + 1 3200 2750 + 0 1 1 0 +$EndComp +Wire Wire Line + 3200 2950 3200 3350 +Wire Wire Line + 3300 2950 3300 3350 +Connection ~ 3300 3350 +Wire Wire Line + 3300 3350 3850 3350 $EndSCHEMATC diff --git a/hardware/lib/parts.pretty/TE_FPC_40pin_p0.5mm_4-1734839-0.kicad_mod b/hardware/lib/parts.pretty/TE_FPC_40pin_p0.5mm_4-1734839-0.kicad_mod new file mode 100644 index 0000000..7c20494 --- /dev/null +++ b/hardware/lib/parts.pretty/TE_FPC_40pin_p0.5mm_4-1734839-0.kicad_mod @@ -0,0 +1,64 @@ +(module TE_FPC_40pin_p0.5mm_4-1734839-0 (layer F.Cu) (tedit 5BF58209) + (fp_text reference REF** (at -13.5 0.5 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TE_FPC_40pin_p0.5mm_4-1734839-0 (at 0 -2) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 11.39 3.85) (end 10.9 3.85) (layer F.SilkS) (width 0.15)) + (fp_line (start 11.32 3.85) (end 13.14 3.85) (layer F.SilkS) (width 0.15)) + (fp_line (start 10.91 3.85) (end -13.02 3.86) (layer F.SilkS) (width 0.15)) + (fp_line (start -13.02 3.25) (end -12.66 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start -13.02 3.86) (end -13.02 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 12.71 3.25) (end 13.03 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 13.14 3.25) (end 12.98 3.25) (layer F.SilkS) (width 0.15)) + (fp_line (start 13.14 3.85) (end 13.14 3.25) (layer F.SilkS) (width 0.15)) + (fp_text user 1 (at -10.5 -0.75) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user 40 (at 11 -0.75) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad "" smd rect (at -11.42 1.7) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) + (pad "" smd rect (at 11.42 1.7) (size 2.3 3.1) (layers F.Cu F.Paste F.Mask)) + (pad 40 smd rect (at 9.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 39 smd rect (at 9.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 38 smd rect (at 8.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 37 smd rect (at 8.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 36 smd rect (at 7.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 35 smd rect (at 7.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 34 smd rect (at 6.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 33 smd rect (at 6.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 32 smd rect (at 5.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 31 smd rect (at 5.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 30 smd rect (at 4.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 29 smd rect (at 4.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 28 smd rect (at 3.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 27 smd rect (at 3.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 26 smd rect (at 2.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 25 smd rect (at 2.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 24 smd rect (at 1.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 23 smd rect (at 1.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 22 smd rect (at 0.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 21 smd rect (at 0.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 20 smd rect (at -0.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 19 smd rect (at -0.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 18 smd rect (at -1.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 17 smd rect (at -1.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 16 smd rect (at -2.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 15 smd rect (at -2.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 14 smd rect (at -3.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 13 smd rect (at -3.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 12 smd rect (at -4.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 11 smd rect (at -4.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 10 smd rect (at -5.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 9 smd rect (at -5.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 8 smd rect (at -6.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd rect (at -6.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd rect (at -7.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at -7.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd rect (at -8.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd rect (at -8.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 2 smd rect (at -9.25 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) + (pad 1 smd rect (at -9.75 0) (size 0.3 1.1) (layers F.Cu F.Paste F.Mask)) +)