gateware: Restructure, add minimal blinky

Signed-off-by: David Shah <dave@ds0.me>

gateware/litex/trellisboard.py

@@ -83,10 +83,13 @@ _io = [
     ("eth_clocks", 0,
         Subsignal("tx", Pins("A15")),
         Subsignal("rx", Pins("C17")),
+        Subsignal("ref", Pins("A17")),
         IOStandard("LVCMOS33")
     ),
+
     ("eth", 0,
         Subsignal("rst_n", Pins("D16")),
+        Subsignal("int_n", Pins("E16")),
         Subsignal("mdio", Pins("F17")),
         Subsignal("mdc", Pins("B17")),
         Subsignal("rx_ctl", Pins("A16")),

gateware/misc/trellisboard.cfg

@@ -0,0 +1,16 @@
+# TrellisBoard OpenOCD config
+
+interface ftdi
+# ftdi_device_desc "TrellisBoard"
+ftdi_vid_pid 0x0403 0x6010
+# channel 1 does not have any functionality
+ftdi_channel 0
+# just TCK TDI TDO TMS, no reset
+ftdi_layout_init 0xfff8 0xfffb
+reset_config none
+
+# default speed
+adapter_khz 5000
+
+# ECP5 device - LFE5UM5G-85F
+jtag newtap ecp5 tap -irlen 8 -expected-id 0x81113043

gateware/simple/.gitignore

@@ -0,0 +1,4 @@
+*.json
+*_out.config
+*.bit
+*.svf

gateware/simple/Makefile

@@ -0,0 +1,22 @@
+PROJ=demo
+
+all: ${PROJ}.bit
+
+%.json: *.v
+	yosys -p "synth_ecp5 -json $@ -top $*_top" $^
+
+%_out.config: %.json
+	nextpnr-ecp5 --json $< --textcfg $@ --um5g-85k --package CABGA756 --lpf trellisboard.lpf
+
+%.bit: %_out.config
+	ecppack --svf ${PROJ}.svf $< $@
+
+${PROJ}.svf : ${PROJ}.bit
+
+prog: ${PROJ}.svf
+	openocd -f ../misc/trellisboard.cfg -c "transport select jtag; init; svf $<; exit"
+
+clean:
+	rm -f *.svf *.bit *.config *.json
+
+.PHONY: prog clean

gateware/simple/demo.v

@@ -0,0 +1,32 @@
+module demo_top(
+	input clk_12,
+	input [3:0] btn,
+	input [7:0] dip_sw,
+	output [11:0] led
+);
+	
+	reg [11:0] ctr_scroll = 1'b1;
+	reg clk_div = 0;
+	
+	localparam DIV = 20;
+	reg [DIV-1:0] div_ctr = 0;
+
+	always @(posedge clk) begin
+		{clk_div, div_ctr} <= div_ctr + 1'b1;
+
+		if (clk_div) begin
+			if (!(|ctr_scroll))
+				ctr_scroll <= 1'b1;
+			else
+				ctr_scroll <= {ctr_scroll[10:0], ctr_scroll[11]};
+		end
+	end
+
+	led_ctrl led_ctrl_i (
+		.clk(clk_12),
+		.led_in_yr({dip_sw, btn}),
+		.led_in_bg(ctr_scroll),
+		.led_pin(led)
+	);
+
+endmodule

gateware/simple/led_ctrl.v

@@ -0,0 +1,34 @@
+// LED multiplex control
+
+module led_ctrl (
+	// Fast clock (12MHz+)
+	input clk,
+	// Colour A inputs (yellow for 0-5, red for 6-11)
+	input [11:0] led_in_yr,
+	// Colour B inputs (blue for 0-5, green for 6-11)
+	input [11:0] led_in_bg,
+	// Output to LED pins
+	output [11:0] led_pin
+);
+	// Gives ~23kHz at 12MHz, ~195kHz at 100MHz
+	localparam DIV_FACTOR = 9;
+	reg [DIV_FACTOR-1:0] ctr;
+
+	always @(posedge clk) ctr <= ctr + 1'b1;
+
+	genvar i;
+	generate
+		for (i = 0; i < 12; i = i + 1'b1) begin
+			/*
+				Only YR asserted : LED at constant 1'b0
+				Both YR & BG asserted : blend colour by connecting LED to divider MSB
+				Only BG asserted : LED at constant 1'b1
+				Neither asserted : LED off (1'bz)
+			*/
+			assign led_pin[i] = led_in_yr ?
+									(led_in_bg ? ctr[DIV_FACTOR - 1] : 1'b0) :
+									(led_in_bg ? 1'b1 : 1'bz);
+		end
+	endgenerate
+
+endmodule

gateware/simple/trellisboard.lpf

@@ -0,0 +1,56 @@
+LOCATE COMP "clk_12" SITE "B3";
+IOBUF PORT "clk_12" IO_TYPE=LVCMOS33;
+
+LOCATE COMP "btn[0]" SITE "Y32";
+LOCATE COMP "btn[1]" SITE "W31";
+LOCATE COMP "btn[2]" SITE "AD30";
+LOCATE COMP "btn[3]" SITE "AD29";
+
+IOBUF PORT "btn[0]" IO_TYPE=SSTL135_I;
+IOBUF PORT "btn[1]" IO_TYPE=SSTL135_I;
+IOBUF PORT "btn[2]" IO_TYPE=SSTL135_I;
+IOBUF PORT "btn[3]" IO_TYPE=SSTL135_I;
+
+LOCATE COMP "dip_sw[0]" SITE "AE31";
+LOCATE COMP "dip_sw[1]" SITE "AE32";
+LOCATE COMP "dip_sw[2]" SITE "AD32";
+LOCATE COMP "dip_sw[3]" SITE "AC32";
+LOCATE COMP "dip_sw[4]" SITE "AB32";
+LOCATE COMP "dip_sw[5]" SITE "AB31";
+LOCATE COMP "dip_sw[6]" SITE "AC31";
+LOCATE COMP "dip_sw[7]" SITE "AC30";
+
+IOBUF PORT "dip_sw[0]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[1]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[2]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[3]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[4]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[5]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[6]" IO_TYPE=SSTL135_I;
+IOBUF PORT "dip_sw[7]" IO_TYPE=SSTL135_I;
+
+LOCATE COMP "led[0]" SITE "C26";
+LOCATE COMP "led[1]" SITE "D26";
+LOCATE COMP "led[2]" SITE "A28";
+LOCATE COMP "led[3]" SITE "A29";
+LOCATE COMP "led[4]" SITE "A30";
+LOCATE COMP "led[5]" SITE "AK29";
+LOCATE COMP "led[6]" SITE "AH32";
+LOCATE COMP "led[7]" SITE "AH30";
+LOCATE COMP "led[8]" SITE "AH28";
+LOCATE COMP "led[9]" SITE "AG30";
+LOCATE COMP "led[10]" SITE "AG29";
+LOCATE COMP "led[11]" SITE "AK30";
+
+IOBUF PORT "led[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[4]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[5]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[6]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[7]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[8]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[9]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[10]" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+IOBUF PORT "led[11]" IO_TYPE=LVCMOS33 PULLMODE=NONE;