diff --git a/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib b/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib
index 1f9367d..732b848 100644
--- a/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib
+++ b/hardware/ecp5_mainboard/ecp5_mainboard-cache.lib
@@ -2446,6 +2446,7 @@ X GND 4 -450 0 200 R 50 50 1 1 W
 X B-/RX- 5 -450 -100 200 R 50 50 1 1 O
 X B+/RX+ 6 -450 -200 200 R 50 50 1 1 O
 X GND 7 -450 -300 200 R 50 50 1 1 W
+X ~ S 0 -500 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
diff --git a/hardware/ecp5_mainboard/serdes.sch b/hardware/ecp5_mainboard/serdes.sch
index 147b35b..608e91e 100644
--- a/hardware/ecp5_mainboard/serdes.sch
+++ b/hardware/ecp5_mainboard/serdes.sch
@@ -1099,16 +1099,16 @@ $EndComp
 $Comp
 L power:GND #PWR087
 U 1 1 5C4AE0D7
-P 2250 9100
-F 0 "#PWR087" H 2250 8850 50  0001 C CNN
-F 1 "GND" H 2255 8927 50  0000 C CNN
-F 2 "" H 2250 9100 50  0001 C CNN
-F 3 "" H 2250 9100 50  0001 C CNN
-	1    2250 9100
+P 2250 9300
+F 0 "#PWR087" H 2250 9050 50  0001 C CNN
+F 1 "GND" H 2255 9127 50  0000 C CNN
+F 2 "" H 2250 9300 50  0001 C CNN
+F 3 "" H 2250 9300 50  0001 C CNN
+	1    2250 9300
 	-1   0    0    -1  
 $EndComp
 Wire Wire Line
-	2250 9100 2250 8850
+	2250 9300 2250 9200
 Wire Wire Line
 	2250 7150 2100 7150
 Wire Wire Line
@@ -1125,7 +1125,7 @@ Wire Wire Line
 	2100 8250 2250 8250
 Connection ~ 2250 8250
 Wire Wire Line
-	2250 8250 2250 7750
+	2250 8250 2250 8050
 Wire Wire Line
 	2100 8550 2250 8550
 Connection ~ 2250 8550
@@ -1786,4 +1786,18 @@ F 3 "~" H 9950 6900 50  0001 C CNN
 $EndComp
 Wire Wire Line
 	9950 6900 9950 7150
+Wire Wire Line
+	1650 7950 1650 8050
+Wire Wire Line
+	1650 8050 2250 8050
+Connection ~ 2250 8050
+Wire Wire Line
+	2250 8050 2250 7750
+Wire Wire Line
+	1650 9050 1650 9200
+Wire Wire Line
+	1650 9200 2250 9200
+Connection ~ 2250 9200
+Wire Wire Line
+	2250 9200 2250 8850
 $EndSCHEMATC
diff --git a/hardware/lib/eco_connectors.lib b/hardware/lib/eco_connectors.lib
index d8dca36..a10d470 100644
--- a/hardware/lib/eco_connectors.lib
+++ b/hardware/lib/eco_connectors.lib
@@ -987,6 +987,7 @@ X GND 4 -450 0 200 R 50 50 1 1 W
 X B-/RX- 5 -450 -100 200 R 50 50 1 1 O
 X B+/RX+ 6 -450 -200 200 R 50 50 1 1 O
 X GND 7 -450 -300 200 R 50 50 1 1 W
+X ~ S 0 -500 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
diff --git a/hardware/lib/parts.pretty/Molex_SATA_047080-4001.kicad_mod b/hardware/lib/parts.pretty/Molex_SATA_047080-4001.kicad_mod
new file mode 100644
index 0000000..d8e3fe2
--- /dev/null
+++ b/hardware/lib/parts.pretty/Molex_SATA_047080-4001.kicad_mod
@@ -0,0 +1,29 @@
+(module Molex_SATA_047080-4001 (layer F.Cu) (tedit 5BF5688A)
+  (fp_text reference REF** (at 6.7 -1.6) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Molex_SATA_047080-4001 (at 0 5.9) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -6.1 10.8) (end 0.3 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -9.3 10.8) (end -9.3 9.2) (layer F.SilkS) (width 0.15))
+  (fp_line (start -6.4 10.8) (end -9.3 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -6.4 10.8) (end -6.1 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start 5.6 10.8) (end 6.6 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start 0.2 10.8) (end 5.6 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.3 10.8) (end 8.3 10) (layer F.SilkS) (width 0.15))
+  (fp_line (start 6.6 10.8) (end 8.3 10.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.3 -0.8) (end 4.4 -0.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start 8.3 10) (end 8.3 -0.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -9.3 -0.8) (end -4.5 -0.8) (layer F.SilkS) (width 0.15))
+  (fp_line (start -9.3 9.2) (end -9.3 -0.8) (layer F.SilkS) (width 0.15))
+  (pad S thru_hole rect (at -6.37 2.36) (size 2 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad S thru_hole rect (at 6.37 2.36) (size 2 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 7 smd rect (at -3.81 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at -2.54 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at -1.27 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at 0 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at 1.27 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at 2.54 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+  (pad 1 smd rect (at 3.81 0) (size 0.9 2) (layers F.Cu F.Paste F.Mask))
+)