David Shah
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3d800fdfc9
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hardware/mainboard: Route DDR3 bytes 2 and 3
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
6a2b83b439
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hardware/mainboard: Route DDR3 bytes 0 and 1
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
40d972ed2a
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hardware/mainboard: DDR3 Address routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
42b07d25fe
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hardware/mainboard: Swapping DDR3 groups
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
d94bc7e957
|
hardware/mainboard: Tidying up
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
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4c7e228c77
|
hardware/mainboard: All parts placed
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
280ce08a1b
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hardware/mainboard: All footprints assigned
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
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84b7f89054
|
hardware: Creating and assigning some misc footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
7b5840700f
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hardware/mainboard: Assign more footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
3a414a0ae2
|
hardware/mainboard: Assign some footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
f8249ec86b
|
hardware/mainboard: add microSD
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
01629ad67a
|
hardware/mainboard: Re-annotate and fix ERC
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
5c66af0294
|
hardware/mainboard: Connect FTDI and add quasi-dual-PMOD
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
86aff64669
|
hardware/mainboard: Add config, JTAG and boot flash
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
cfdf722db3
|
hardware/mainboard: Pin plan external IO FFCs
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
bab1a9d053
|
hardware/mainboard: Connecting more FPGA IO
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
0d90bf76c4
|
hardware/mainboard: Connect DDR3 IO to FPGA IO
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
