David Shah
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d88685b4ac
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hardware/mainboard: Route out DVI, RGMII, ULPI & PMOD signals from BGA
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
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0c88ae26f7
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hardware/mainboard: Route EXT2, remove EXT3
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
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ed7d02248b
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hardware/mainboard: Route first two IO connectors
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
8007953253
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hardware/mainboard: DDR3 power/Vref/Vtt routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
a6589d7071
|
hardware/mainboard: All DDR3 traces length matched
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
3d800fdfc9
|
hardware/mainboard: Route DDR3 bytes 2 and 3
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
6a2b83b439
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hardware/mainboard: Route DDR3 bytes 0 and 1
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
|
b150eb80ab
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hardware/mainboard: PCIe routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
d73c019780
|
hardware/mainboard: Misc routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
e40fd798ef
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hardware/mainboard: DDR3 CA traces length matched with squiggly bois
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
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David Shah
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0534c6a2f2
|
hardware/mainboard: DDR3 CA FPGA->chip0 length matching
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
92b0d1ad68
|
hardware/mainboard: Finish DDR3 CA routing inc termination
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
57f69b35b6
|
hardware/mainboard: More DDR3 address routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
40d972ed2a
|
hardware/mainboard: DDR3 Address routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
42b07d25fe
|
hardware/mainboard: Swapping DDR3 groups
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
d94bc7e957
|
hardware/mainboard: Tidying up
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
764ab0cdff
|
hardware/mainboard: FPGA power/ground routing
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
066b342b40
|
hardware/mainboard: Creating power/ground planes
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
dbb9064930
|
hardware/mainboard: Set up layers and design rules
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
b8390cb2dc
|
hardware/mainboard: Small design tweaks
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
d38e418733
|
hardware/mainboard: Tidy up silkscreen
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
446fb6784a
|
hardware/mainboard: Reduce refdes size to 0.8mm
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
e663874da6
|
hardware/mainboard: Complete 3D models, other footprint tweaks
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
61cf6c41d1
|
hardware/mainboard: Working on 3D
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
4c7e228c77
|
hardware/mainboard: All parts placed
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
2f1721e996
|
hardware/mainboard: Place DDR3 decoupling and termination
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
99ae0427ef
|
hardware/mainboard: Place FPGA decoupling
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
f50fd02eb8
|
hardware/mainboard: Configure some 3D shapes
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
5f81ea2739
|
hardware/mainboard: Change LEDs to larger Wurth 3528 LEDs
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
7c7cd6d8ad
|
hardware/mainboard: Power circuitry placed
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
b12b8e54f4
|
hardware/mainboard: Power related placement
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
9ef552855d
|
hardware/mainboard: Preliminary placement of some major components
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
e078793157
|
hardware.mainboard: Fixes from PCB import
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
280ce08a1b
|
hardware/mainboard: All footprints assigned
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
c19304da98
|
hardware/mainboard: More footprint assignment, other small tweaks
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
84b7f89054
|
hardware: Creating and assigning some misc footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
1ed4a15b2d
|
hardware: Add HDMI connector footprint
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
c0a61aa48e
|
hardware: Add SATA connector footprint
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
7b5840700f
|
hardware/mainboard: Assign more footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
9ada7cdb84
|
hardware: Adding USB-A and MagJack footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
0ff56a85e1
|
hardware: Add PCIe x4 edge connector footprint
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
62ffcba550
|
hardware: Add CABGA756 footprint
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
3a414a0ae2
|
hardware/mainboard: Assign some footprints
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
f8249ec86b
|
hardware/mainboard: add microSD
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
01629ad67a
|
hardware/mainboard: Re-annotate and fix ERC
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
5c66af0294
|
hardware/mainboard: Connect FTDI and add quasi-dual-PMOD
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
86aff64669
|
hardware/mainboard: Add config, JTAG and boot flash
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
cfdf722db3
|
hardware/mainboard: Pin plan external IO FFCs
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
bab1a9d053
|
hardware/mainboard: Connecting more FPGA IO
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
|
David Shah
|
0d90bf76c4
|
hardware/mainboard: Connect DDR3 IO to FPGA IO
Signed-off-by: David Shah <dave@ds0.me>
|
6 years ago |
