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37 lines
966 B
37 lines
966 B
// LED multiplex control
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module led_ctrl (
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// Fast clock (12MHz+)
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input clk,
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// Colour A inputs (yellow for 0-5, red for 6-11)
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input [11:0] led_in_yr,
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// Colour B inputs (blue for 0-5, green for 6-11)
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input [11:0] led_in_bg,
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// Output to LED pins
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output [11:0] led_pin
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);
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// Gives ~23kHz at 12MHz, ~195kHz at 100MHz
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localparam DIV_FACTOR = 9;
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reg [DIV_FACTOR-1:0] ctr;
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always @(posedge clk) ctr <= ctr + 1'b1;
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genvar i;
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wire [11:0] led_o, led_en;
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generate
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for (i = 0; i < 12; i = i + 1'b1) begin
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/*
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Only YR asserted : LED at constant 1'b0
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Both YR & BG asserted : blend colour by connecting LED to divider MSB
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Only BG asserted : LED at constant 1'b1
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Neither asserted : LED off (1'bz)
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*/
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assign led_o[i] = led_in_yr[i] ?
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(led_in_bg[i] ? ctr[DIV_FACTOR - 1] : 1'b0) :
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1'b1;
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assign led_en[i] = led_in_yr[i] || led_in_bg[i];
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assign led_pin[i] = led_en[i] ? led_o[i] : 1'bz;
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end
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endgenerate
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endmodule |