diff --git a/blinkey.bak b/blinkey.bak index 8e45367..8b06154 100644 --- a/blinkey.bak +++ b/blinkey.bak @@ -322,9 +322,33 @@ $EndComp Wire Wire Line 4400 2550 4250 2550 Wire Wire Line - 2750 2700 2750 3950 + 2750 2700 2750 2950 Wire Wire Line - 4250 2550 4250 4100 + 2750 2950 2750 3150 +Wire Wire Line + 2750 3150 2750 3350 +Wire Wire Line + 2750 3350 2750 3550 +Wire Wire Line + 2750 3550 2750 3750 +Wire Wire Line + 2750 3750 2750 3950 +Wire Wire Line + 4250 2550 4250 2750 +Wire Wire Line + 4250 2750 4250 2950 +Wire Wire Line + 4250 2950 4250 3150 +Wire Wire Line + 4250 3150 4250 3350 +Wire Wire Line + 4250 3350 4250 3550 +Wire Wire Line + 4250 3550 4250 3750 +Wire Wire Line + 4250 3750 4250 3950 +Wire Wire Line + 4250 3950 4250 4100 Wire Wire Line 4250 3950 4400 3950 Wire Wire Line diff --git a/gpdi.bak b/gpdi.bak index 7fa0c79..f41a6c3 100644 --- a/gpdi.bak +++ b/gpdi.bak @@ -426,35 +426,35 @@ Text GLabel 7000 2300 2 60 Input ~ 0 GPDI_SDA Text GLabel 5500 2100 0 60 Input ~ 0 GPDI_CEC -Text GLabel 7000 3400 2 60 Input ~ 0 +Text GLabel 8650 3250 2 60 Input ~ 0 LED0 -Text GLabel 7000 3600 2 60 Input ~ 0 +Text GLabel 8650 3550 2 60 Input ~ 0 LED1 -Text GLabel 7000 2500 2 60 Input ~ 0 +Text GLabel 8650 2500 2 60 Input ~ 0 LED2 -Text GLabel 7000 2700 2 60 Input ~ 0 +Text GLabel 8650 2650 2 60 Input ~ 0 LED3 -Text GLabel 7000 2900 2 60 Input ~ 0 +Text GLabel 8650 2800 2 60 Input ~ 0 LED4 -Text GLabel 7000 3100 2 60 Input ~ 0 +Text GLabel 8650 2950 2 60 Input ~ 0 LED5 -Text GLabel 7000 3300 2 60 Input ~ 0 +Text GLabel 8650 3100 2 60 Input ~ 0 LED6 -Text GLabel 7000 3500 2 60 Input ~ 0 +Text GLabel 8650 3400 2 60 Input ~ 0 LED7 Text GLabel 5500 3600 0 60 Input ~ 0 BTN_U -Text GLabel 5500 2300 0 60 Input ~ 0 +Text GLabel 3550 2800 0 60 Input ~ 0 BTN_D -Text GLabel 5500 2500 0 60 Input ~ 0 +Text GLabel 3550 2950 0 60 Input ~ 0 BTN_L -Text GLabel 5500 2700 0 60 Input ~ 0 +Text GLabel 3550 3100 0 60 Input ~ 0 BTN_R -Text GLabel 5500 2900 0 60 Input ~ 0 +Text GLabel 3550 3250 0 60 Input ~ 0 BTN_F1 -Text GLabel 5500 3100 0 60 Input ~ 0 +Text GLabel 3550 3400 0 60 Input ~ 0 BTN_F2 -Text GLabel 5500 3300 0 60 Input ~ 0 +Text GLabel 3550 3550 0 60 Input ~ 0 BTN_PWRn $Comp L Crystal_GND24 Y1 @@ -517,4 +517,32 @@ F 3 "" H 5200 3750 60 0000 C CNN 2 6250 2800 1 0 0 -1 $EndComp +Text GLabel 5500 2700 0 60 Input ~ 0 +J2_25- +Text GLabel 5500 2900 0 60 Input ~ 0 +J2_27- +Text GLabel 5500 3400 0 60 Input ~ 0 +J2_29- +Text GLabel 5500 2500 0 60 Input ~ 0 +J2_31- +Text GLabel 5500 2800 0 60 Input ~ 0 +J2_33- +Text GLabel 5500 3300 0 60 Input ~ 0 +J2_35- +Text GLabel 7000 3300 2 60 Input ~ 0 +J2_35+ +Text GLabel 7000 3400 2 60 Input ~ 0 +J2_29+ +Text GLabel 7000 2900 2 60 Input ~ 0 +J2_27+ +Text GLabel 7000 2800 2 60 Input ~ 0 +J2_33+ +Text GLabel 7000 2700 2 60 Input ~ 0 +J2_25+ +Text GLabel 7000 2500 2 60 Input ~ 0 +J2_31+ +Text GLabel 5500 3100 0 60 Input ~ 0 +J2_23- +Text GLabel 7000 3100 2 60 Input ~ 0 +J2_23+ $EndSCHEMATC diff --git a/gpdi.sch b/gpdi.sch index 7fa0c79..f41a6c3 100644 --- a/gpdi.sch +++ b/gpdi.sch @@ -426,35 +426,35 @@ Text GLabel 7000 2300 2 60 Input ~ 0 GPDI_SDA Text GLabel 5500 2100 0 60 Input ~ 0 GPDI_CEC -Text GLabel 7000 3400 2 60 Input ~ 0 +Text GLabel 8650 3250 2 60 Input ~ 0 LED0 -Text GLabel 7000 3600 2 60 Input ~ 0 +Text GLabel 8650 3550 2 60 Input ~ 0 LED1 -Text GLabel 7000 2500 2 60 Input ~ 0 +Text GLabel 8650 2500 2 60 Input ~ 0 LED2 -Text GLabel 7000 2700 2 60 Input ~ 0 +Text GLabel 8650 2650 2 60 Input ~ 0 LED3 -Text GLabel 7000 2900 2 60 Input ~ 0 +Text GLabel 8650 2800 2 60 Input ~ 0 LED4 -Text GLabel 7000 3100 2 60 Input ~ 0 +Text GLabel 8650 2950 2 60 Input ~ 0 LED5 -Text GLabel 7000 3300 2 60 Input ~ 0 +Text GLabel 8650 3100 2 60 Input ~ 0 LED6 -Text GLabel 7000 3500 2 60 Input ~ 0 +Text GLabel 8650 3400 2 60 Input ~ 0 LED7 Text GLabel 5500 3600 0 60 Input ~ 0 BTN_U -Text GLabel 5500 2300 0 60 Input ~ 0 +Text GLabel 3550 2800 0 60 Input ~ 0 BTN_D -Text GLabel 5500 2500 0 60 Input ~ 0 +Text GLabel 3550 2950 0 60 Input ~ 0 BTN_L -Text GLabel 5500 2700 0 60 Input ~ 0 +Text GLabel 3550 3100 0 60 Input ~ 0 BTN_R -Text GLabel 5500 2900 0 60 Input ~ 0 +Text GLabel 3550 3250 0 60 Input ~ 0 BTN_F1 -Text GLabel 5500 3100 0 60 Input ~ 0 +Text GLabel 3550 3400 0 60 Input ~ 0 BTN_F2 -Text GLabel 5500 3300 0 60 Input ~ 0 +Text GLabel 3550 3550 0 60 Input ~ 0 BTN_PWRn $Comp L Crystal_GND24 Y1 @@ -517,4 +517,32 @@ F 3 "" H 5200 3750 60 0000 C CNN 2 6250 2800 1 0 0 -1 $EndComp +Text GLabel 5500 2700 0 60 Input ~ 0 +J2_25- +Text GLabel 5500 2900 0 60 Input ~ 0 +J2_27- +Text GLabel 5500 3400 0 60 Input ~ 0 +J2_29- +Text GLabel 5500 2500 0 60 Input ~ 0 +J2_31- +Text GLabel 5500 2800 0 60 Input ~ 0 +J2_33- +Text GLabel 5500 3300 0 60 Input ~ 0 +J2_35- +Text GLabel 7000 3300 2 60 Input ~ 0 +J2_35+ +Text GLabel 7000 3400 2 60 Input ~ 0 +J2_29+ +Text GLabel 7000 2900 2 60 Input ~ 0 +J2_27+ +Text GLabel 7000 2800 2 60 Input ~ 0 +J2_33+ +Text GLabel 7000 2700 2 60 Input ~ 0 +J2_25+ +Text GLabel 7000 2500 2 60 Input ~ 0 +J2_31+ +Text GLabel 5500 3100 0 60 Input ~ 0 +J2_23- +Text GLabel 7000 3100 2 60 Input ~ 0 +J2_23+ $EndSCHEMATC diff --git a/gpio.bak b/gpio.bak index 3682114..ae4457b 100644 --- a/gpio.bak +++ b/gpio.bak @@ -536,25 +536,25 @@ Text GLabel 4150 4750 0 60 Input ~ 0 J1_31- Text GLabel 5650 4750 2 60 Input ~ 0 J1_31+ -Text GLabel 4150 4550 0 60 Input ~ 0 +Text GLabel 4150 4950 0 60 Input ~ 0 J1_29- -Text GLabel 5650 4550 2 60 Input ~ 0 +Text GLabel 5650 4950 2 60 Input ~ 0 J1_29+ -Text GLabel 4200 2700 0 60 Input ~ 0 +Text GLabel 4200 2300 0 60 Input ~ 0 J1_27- -Text GLabel 5700 2700 2 60 Input ~ 0 +Text GLabel 5700 2300 2 60 Input ~ 0 J1_27+ -Text GLabel 4200 2500 0 60 Input ~ 0 +Text GLabel 4150 4150 0 60 Input ~ 0 J1_25- -Text GLabel 5700 2500 2 60 Input ~ 0 +Text GLabel 5650 4150 2 60 Input ~ 0 J1_25+ -Text GLabel 4200 2800 0 60 Input ~ 0 +Text GLabel 4150 4350 0 60 Input ~ 0 J1_23- -Text GLabel 5700 2800 2 60 Input ~ 0 +Text GLabel 5650 4350 2 60 Input ~ 0 J1_23+ -Text GLabel 4200 2200 0 60 Input ~ 0 +Text GLabel 4200 2000 0 60 Input ~ 0 J1_17- -Text GLabel 5700 2200 2 60 Input ~ 0 +Text GLabel 5700 2000 2 60 Input ~ 0 J1_17+ $Comp L LFE5U-25F-6BG381C U1 @@ -578,4 +578,44 @@ F 3 "" H 3850 5700 60 0000 C CNN 6 4900 4750 1 0 0 -1 $EndComp +Text GLabel 4200 2900 0 60 Input ~ 0 +J1_5- +Text GLabel 4200 2100 0 60 Input ~ 0 +J1_7- +Text GLabel 4200 1800 0 60 Input ~ 0 +J1_9- +Text GLabel 4200 2600 0 60 Input ~ 0 +J1_13- +Text GLabel 5700 2900 2 60 Input ~ 0 +J1_5+ +Text GLabel 5700 2100 2 60 Input ~ 0 +J1_7+ +Text GLabel 5700 1800 2 60 Input ~ 0 +J1_9+ +Text GLabel 5700 2600 2 60 Input ~ 0 +J1_13+ +Text GLabel 5700 2400 2 60 Input ~ 0 +J1_15+ +Text GLabel 4200 2400 0 60 Input ~ 0 +J1_15- +Text GLabel 4200 1900 0 60 Input ~ 0 +J1_11- +Text GLabel 5700 1900 2 60 Input ~ 0 +J1_11+ +Text GLabel 4150 4050 0 60 Input ~ 0 +AUDIO_L0 +Text GLabel 4150 4250 0 60 Input ~ 0 +AUDIO_L1 +Text GLabel 4150 4450 0 60 Input ~ 0 +AUDIO_L2 +Text GLabel 4150 4650 0 60 Input ~ 0 +AUDIO_L3 +Text GLabel 5650 4050 2 60 Input ~ 0 +AUDIO_R0 +Text GLabel 5650 4250 2 60 Input ~ 0 +AUDIO_R1 +Text GLabel 5650 4450 2 60 Input ~ 0 +AUDIO_R2 +Text GLabel 5650 4650 2 60 Input ~ 0 +AUDIO_R3 $EndSCHEMATC diff --git a/gpio.sch b/gpio.sch index 3682114..ae4457b 100644 --- a/gpio.sch +++ b/gpio.sch @@ -536,25 +536,25 @@ Text GLabel 4150 4750 0 60 Input ~ 0 J1_31- Text GLabel 5650 4750 2 60 Input ~ 0 J1_31+ -Text GLabel 4150 4550 0 60 Input ~ 0 +Text GLabel 4150 4950 0 60 Input ~ 0 J1_29- -Text GLabel 5650 4550 2 60 Input ~ 0 +Text GLabel 5650 4950 2 60 Input ~ 0 J1_29+ -Text GLabel 4200 2700 0 60 Input ~ 0 +Text GLabel 4200 2300 0 60 Input ~ 0 J1_27- -Text GLabel 5700 2700 2 60 Input ~ 0 +Text GLabel 5700 2300 2 60 Input ~ 0 J1_27+ -Text GLabel 4200 2500 0 60 Input ~ 0 +Text GLabel 4150 4150 0 60 Input ~ 0 J1_25- -Text GLabel 5700 2500 2 60 Input ~ 0 +Text GLabel 5650 4150 2 60 Input ~ 0 J1_25+ -Text GLabel 4200 2800 0 60 Input ~ 0 +Text GLabel 4150 4350 0 60 Input ~ 0 J1_23- -Text GLabel 5700 2800 2 60 Input ~ 0 +Text GLabel 5650 4350 2 60 Input ~ 0 J1_23+ -Text GLabel 4200 2200 0 60 Input ~ 0 +Text GLabel 4200 2000 0 60 Input ~ 0 J1_17- -Text GLabel 5700 2200 2 60 Input ~ 0 +Text GLabel 5700 2000 2 60 Input ~ 0 J1_17+ $Comp L LFE5U-25F-6BG381C U1 @@ -578,4 +578,44 @@ F 3 "" H 3850 5700 60 0000 C CNN 6 4900 4750 1 0 0 -1 $EndComp +Text GLabel 4200 2900 0 60 Input ~ 0 +J1_5- +Text GLabel 4200 2100 0 60 Input ~ 0 +J1_7- +Text GLabel 4200 1800 0 60 Input ~ 0 +J1_9- +Text GLabel 4200 2600 0 60 Input ~ 0 +J1_13- +Text GLabel 5700 2900 2 60 Input ~ 0 +J1_5+ +Text GLabel 5700 2100 2 60 Input ~ 0 +J1_7+ +Text GLabel 5700 1800 2 60 Input ~ 0 +J1_9+ +Text GLabel 5700 2600 2 60 Input ~ 0 +J1_13+ +Text GLabel 5700 2400 2 60 Input ~ 0 +J1_15+ +Text GLabel 4200 2400 0 60 Input ~ 0 +J1_15- +Text GLabel 4200 1900 0 60 Input ~ 0 +J1_11- +Text GLabel 5700 1900 2 60 Input ~ 0 +J1_11+ +Text GLabel 4150 4050 0 60 Input ~ 0 +AUDIO_L0 +Text GLabel 4150 4250 0 60 Input ~ 0 +AUDIO_L1 +Text GLabel 4150 4450 0 60 Input ~ 0 +AUDIO_L2 +Text GLabel 4150 4650 0 60 Input ~ 0 +AUDIO_L3 +Text GLabel 5650 4050 2 60 Input ~ 0 +AUDIO_R0 +Text GLabel 5650 4250 2 60 Input ~ 0 +AUDIO_R1 +Text GLabel 5650 4450 2 60 Input ~ 0 +AUDIO_R2 +Text GLabel 5650 4650 2 60 Input ~ 0 +AUDIO_R3 $EndSCHEMATC diff --git a/ram.bak b/ram.bak index 71b056c..1549f08 100644 --- a/ram.bak +++ b/ram.bak @@ -233,9 +233,9 @@ Text GLabel 10050 2650 2 60 Input ~ 0 SDRAM_D2 Text GLabel 8550 2650 0 60 Input ~ 0 SDRAM_D3 -Text GLabel 8550 3350 0 60 Input ~ 0 +Text GLabel 8550 3650 0 60 Input ~ 0 SDRAM_D4 -Text GLabel 10050 3550 2 60 Input ~ 0 +Text GLabel 10050 3650 2 60 Input ~ 0 SDRAM_D5 Text GLabel 8550 5550 0 60 Input ~ 0 SDRAM_D6 @@ -295,28 +295,12 @@ Text GLabel 10050 2850 2 60 Input ~ 0 SDRAM_DQM1 Text GLabel 10050 4950 2 60 Input ~ 0 SDRAM_nRAS -Text GLabel 8550 4650 0 60 Input ~ 0 +Text GLabel 10050 4550 2 60 Input ~ 0 SDRAM_nCAS Text GLabel 10050 4750 2 60 Input ~ 0 SDRAM_nWE Text GLabel 8550 4750 0 60 Input ~ 0 SDRAM_nCS -Text GLabel 8550 5450 0 60 Input ~ 0 -SD_CMD -Text GLabel 8550 5850 0 60 Input ~ 0 -SD_D0 -Text GLabel 8550 5350 0 60 Input ~ 0 -SD_CLK -Text GLabel 8550 5650 0 60 Input ~ 0 -SD_D3 -Text GLabel 10050 5350 2 60 Input ~ 0 -SD_D1 -Text GLabel 10050 5450 2 60 Input ~ 0 -SD_D2 -Text GLabel 10050 5550 2 60 Input ~ 0 -SD_WP -Text GLabel 10050 5650 2 60 Input ~ 0 -SD_CD $Comp L LFE5U-25F-6BG381C U1 U 4 1 58EBA210 @@ -339,4 +323,36 @@ F 3 "" H 8250 4100 60 0000 C CNN 3 9300 3150 1 0 0 -1 $EndComp +Text GLabel 8550 4650 0 60 Input ~ 0 +J2_5- +Text GLabel 8550 5650 0 60 Input ~ 0 +J2_7- +Text GLabel 10050 5650 2 60 Input ~ 0 +J2_7+ +Text GLabel 10050 4650 2 60 Input ~ 0 +J2_5+ +Text GLabel 10050 5450 2 60 Input ~ 0 +J2_9+ +Text GLabel 8550 5450 0 60 Input ~ 0 +J2_9- +Text GLabel 8550 3550 0 60 Input ~ 0 +J2_13- +Text GLabel 8550 3750 0 60 Input ~ 0 +J2_15- +Text GLabel 8550 3950 0 60 Input ~ 0 +J2_17- +Text GLabel 10050 3550 2 60 Input ~ 0 +J2_13+ +Text GLabel 10050 3750 2 60 Input ~ 0 +J2_15+ +Text GLabel 10050 3950 2 60 Input ~ 0 +J2_17+ +Text GLabel 8550 3350 0 60 Input ~ 0 +J2_19- +Text GLabel 10050 3350 2 60 Input ~ 0 +J2_19+ +Text GLabel 8550 5850 0 60 Input ~ 0 +J2_11- +Text GLabel 10050 5850 2 60 Input ~ 0 +J2_11+ $EndSCHEMATC diff --git a/ram.sch b/ram.sch index 71b056c..1549f08 100644 --- a/ram.sch +++ b/ram.sch @@ -233,9 +233,9 @@ Text GLabel 10050 2650 2 60 Input ~ 0 SDRAM_D2 Text GLabel 8550 2650 0 60 Input ~ 0 SDRAM_D3 -Text GLabel 8550 3350 0 60 Input ~ 0 +Text GLabel 8550 3650 0 60 Input ~ 0 SDRAM_D4 -Text GLabel 10050 3550 2 60 Input ~ 0 +Text GLabel 10050 3650 2 60 Input ~ 0 SDRAM_D5 Text GLabel 8550 5550 0 60 Input ~ 0 SDRAM_D6 @@ -295,28 +295,12 @@ Text GLabel 10050 2850 2 60 Input ~ 0 SDRAM_DQM1 Text GLabel 10050 4950 2 60 Input ~ 0 SDRAM_nRAS -Text GLabel 8550 4650 0 60 Input ~ 0 +Text GLabel 10050 4550 2 60 Input ~ 0 SDRAM_nCAS Text GLabel 10050 4750 2 60 Input ~ 0 SDRAM_nWE Text GLabel 8550 4750 0 60 Input ~ 0 SDRAM_nCS -Text GLabel 8550 5450 0 60 Input ~ 0 -SD_CMD -Text GLabel 8550 5850 0 60 Input ~ 0 -SD_D0 -Text GLabel 8550 5350 0 60 Input ~ 0 -SD_CLK -Text GLabel 8550 5650 0 60 Input ~ 0 -SD_D3 -Text GLabel 10050 5350 2 60 Input ~ 0 -SD_D1 -Text GLabel 10050 5450 2 60 Input ~ 0 -SD_D2 -Text GLabel 10050 5550 2 60 Input ~ 0 -SD_WP -Text GLabel 10050 5650 2 60 Input ~ 0 -SD_CD $Comp L LFE5U-25F-6BG381C U1 U 4 1 58EBA210 @@ -339,4 +323,36 @@ F 3 "" H 8250 4100 60 0000 C CNN 3 9300 3150 1 0 0 -1 $EndComp +Text GLabel 8550 4650 0 60 Input ~ 0 +J2_5- +Text GLabel 8550 5650 0 60 Input ~ 0 +J2_7- +Text GLabel 10050 5650 2 60 Input ~ 0 +J2_7+ +Text GLabel 10050 4650 2 60 Input ~ 0 +J2_5+ +Text GLabel 10050 5450 2 60 Input ~ 0 +J2_9+ +Text GLabel 8550 5450 0 60 Input ~ 0 +J2_9- +Text GLabel 8550 3550 0 60 Input ~ 0 +J2_13- +Text GLabel 8550 3750 0 60 Input ~ 0 +J2_15- +Text GLabel 8550 3950 0 60 Input ~ 0 +J2_17- +Text GLabel 10050 3550 2 60 Input ~ 0 +J2_13+ +Text GLabel 10050 3750 2 60 Input ~ 0 +J2_15+ +Text GLabel 10050 3950 2 60 Input ~ 0 +J2_17+ +Text GLabel 8550 3350 0 60 Input ~ 0 +J2_19- +Text GLabel 10050 3350 2 60 Input ~ 0 +J2_19+ +Text GLabel 8550 5850 0 60 Input ~ 0 +J2_11- +Text GLabel 10050 5850 2 60 Input ~ 0 +J2_11+ $EndSCHEMATC diff --git a/sdcard.bak b/sdcard.bak index e2fd286..fe431a5 100644 --- a/sdcard.bak +++ b/sdcard.bak @@ -141,9 +141,9 @@ F 3 "" H 1700 6250 50 0000 C CNN 0 -1 -1 0 $EndComp Text GLabel 2300 5850 0 60 Input ~ 0 -SD_2 +SD_D2 Text GLabel 2300 5950 0 60 Input ~ 0 -SD_3 +SD_D3 Text GLabel 2300 6050 0 60 Input ~ 0 SD_CMD Text GLabel 2300 6350 0 60 Input ~ 0 diff --git a/sdcard.sch b/sdcard.sch index e2fd286..fe431a5 100644 --- a/sdcard.sch +++ b/sdcard.sch @@ -141,9 +141,9 @@ F 3 "" H 1700 6250 50 0000 C CNN 0 -1 -1 0 $EndComp Text GLabel 2300 5850 0 60 Input ~ 0 -SD_2 +SD_D2 Text GLabel 2300 5950 0 60 Input ~ 0 -SD_3 +SD_D3 Text GLabel 2300 6050 0 60 Input ~ 0 SD_CMD Text GLabel 2300 6350 0 60 Input ~ 0 diff --git a/ulx3s-cache.lib b/ulx3s-cache.lib index e79aec1..0176248 100644 --- a/ulx3s-cache.lib +++ b/ulx3s-cache.lib @@ -1031,7 +1031,7 @@ T 0 0 50 60 0 10 0 JTAG Normal 0 C C T 0 0 -550 60 0 1 1 BANK0 Normal 0 C C S -550 800 550 -500 1 1 0 N S -250 250 250 -250 1 1 0 N -S -200 200 -50 100 1 1 0 N +S -200 200 0 100 1 1 0 N X PT4A A6 -750 -400 200 R 50 50 1 1 I X PT4B B6 750 -400 200 L 50 50 1 1 I X PT11A C6 -750 -100 200 R 50 50 1 1 I @@ -1058,7 +1058,7 @@ X PCLKT0_0 B11 -750 700 200 R 50 50 1 1 I X PCLKC0_0 C11 750 700 200 L 50 50 1 1 I S -550 800 550 -900 2 1 0 N S -250 250 250 -250 2 1 0 N -S 50 200 200 100 2 1 0 N +S 0 200 200 100 2 1 0 N X PT67B B20 750 700 200 L 50 50 2 1 I X PCLKT1_1 D11 -750 -800 200 R 50 50 2 1 I X PCLKC1_1 E11 750 -800 200 L 50 50 2 1 I @@ -1093,7 +1093,7 @@ X PT67A A19 -750 700 200 R 50 50 2 1 I X PT65B B19 750 600 200 L 50 50 2 1 I S -550 800 550 -900 3 1 0 N S -250 250 250 -250 3 1 0 N -S 200 200 100 50 3 1 0 N +S 200 200 100 0 3 1 0 N X PR14A C20 -750 0 200 R 50 50 3 1 I X VREF1_2 D20 -750 100 200 R 50 50 3 1 I X PR17A E20 -750 200 200 R 50 50 3 1 I @@ -1128,7 +1128,7 @@ X PCLKT2_1 J19 -750 600 200 R 50 50 3 1 I X PCLKC2_1 K19 750 600 200 L 50 50 3 1 I S -550 800 550 -900 4 1 0 N S -250 250 250 -250 4 1 0 N -S 100 -50 200 -200 4 1 0 N +S 100 0 200 -200 4 1 0 N X PCLKT3_1 L20 -750 -800 200 R 50 50 4 1 I X PCLKC3_1 M20 750 -800 200 L 50 50 4 1 I X PR38B N20 750 0 200 L 50 50 4 1 I @@ -1163,42 +1163,42 @@ X PR44A T19 -750 400 200 R 50 50 4 1 I X PR44C U19 -750 500 200 R 50 50 4 1 I S -550 800 550 -900 5 1 0 N S -250 250 250 -250 5 1 0 N -S -200 -50 -100 -200 5 1 0 N -X PL32C H1 -750 500 200 R 50 50 5 1 I +S -200 0 -100 -200 5 1 0 N +X PCLKC6_1 F1 750 600 200 L 50 50 5 1 I +X PCLKC6_0 G1 750 700 200 L 50 50 5 1 I +X PL32C H1 -750 300 200 R 50 50 5 1 I X PL32B J1 750 200 200 L 50 50 5 1 I -X PL32B J1 750 400 200 L 50 50 5 1 I -X PL32D K1 750 500 200 L 50 50 5 1 I +X PL32D K1 750 300 200 L 50 50 5 1 I X PL44C L1 -750 -500 200 R 50 50 5 1 I X PL44B M1 750 -600 200 L 50 50 5 1 I X PL44D N1 750 -500 200 L 50 50 5 1 I X PL47A P1 -750 -800 200 R 50 50 5 1 I +X PCLKT6_1 G2 -750 600 200 R 50 50 5 1 I +X PCLKT6_0 H2 -750 700 200 R 50 50 5 1 I X PL32A K2 -750 200 200 R 50 50 5 1 I -X PL32A K2 -750 400 200 R 50 50 5 1 I X PL41D L2 750 -300 200 L 50 50 5 1 I X PL44A N2 -750 -600 200 R 50 50 5 1 I X PL47B P2 750 -800 200 L 50 50 5 1 I -X GR_PCLK6_1 J3 -750 700 200 R 50 50 5 1 I -X PL29D K3 750 700 200 L 50 50 5 1 I +X GR_PCLK6_1 J3 -750 500 200 R 50 50 5 1 I +X PL29D K3 750 500 200 L 50 50 5 1 I X PL41C L3 -750 -300 200 R 50 50 5 1 I X PL41B M3 750 -400 200 L 50 50 5 1 I X PL41A N3 -750 -400 200 R 50 50 5 1 I X GPLL0T_IN P3 -750 -700 200 R 50 50 5 1 I -X GR_PCLK6_0 J4 -750 600 200 R 50 50 5 1 I +X GR_PCLK6_0 J4 -750 400 200 R 50 50 5 1 I X PL35A K4 -750 0 200 R 50 50 5 1 I -X PL32C L4 -750 300 200 R 50 50 5 1 I X PL35C L4 -750 100 200 R 50 50 5 1 I X PL38A M4 -750 -200 200 R 50 50 5 1 I X PL38C N4 -750 -100 200 R 50 50 5 1 I X GPLL0C_IN P4 750 -700 200 L 50 50 5 1 I -X PL29B J5 750 600 200 L 50 50 5 1 I +X PL29B J5 750 400 200 L 50 50 5 1 I X VREF1_6 K5 750 0 200 L 50 50 5 1 I X PL35D L5 750 100 200 L 50 50 5 1 I -X PL35D L5 750 300 200 L 50 50 5 1 I X PL38B N5 750 -200 200 L 50 50 5 1 I X PL38D P5 750 -100 200 L 50 50 5 1 I S -550 800 550 -900 6 1 0 N S -250 250 250 -250 6 1 0 N -S -200 200 -100 50 6 1 0 N +S -200 200 -100 0 6 1 0 N X PL14B B1 750 -200 200 L 50 50 6 1 I X PL17A C1 -750 -400 200 R 50 50 6 1 I X PL17B D1 750 -400 200 L 50 50 6 1 I @@ -1233,7 +1233,7 @@ X PL20B G5 750 -600 200 L 50 50 6 1 I X GR_PCLK7_0 H5 -750 -500 200 R 50 50 6 1 I S -550 800 550 -900 7 1 0 N S -250 250 250 -250 7 1 0 N -S -200 -200 -50 -100 7 1 0 N +S -200 -200 0 -100 7 1 0 N X D7 R1 -750 700 200 R 50 50 7 1 I X D6 T1 750 700 200 L 50 50 7 1 I X D5/MISO2 U1 -750 600 200 R 50 50 7 1 I @@ -1256,7 +1256,7 @@ X CFG_1 T4 -750 -500 200 R 50 50 7 1 I X CFG_0 U4 -750 -600 200 R 50 50 7 1 I S -550 800 550 -900 8 1 0 N S -250 250 250 -250 8 1 0 N -S 200 -200 50 -100 8 1 0 N +S 200 -200 0 -100 8 1 0 N T 0 0 150 60 0 9 1 POWER Normal 0 C C S -5100 450 5050 -500 9 1 0 N S -250 250 250 -250 9 1 0 N diff --git a/ulx3s.bak b/ulx3s.bak index fe4c61a..3f23808 100644 --- a/ulx3s.bak +++ b/ulx3s.bak @@ -128,19 +128,8 @@ $EndComp $Comp L CONN_01X01 H2 U 1 1 58E6BACE -P 3700 6350 -F 0 "H2" H 3700 6450 50 0000 C CNN -F 1 "HOLE" V 3800 6350 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO14580_Pad" H 3700 6350 50 0001 C CNN -F 3 "" H 3700 6350 50 0000 C CNN - 1 3700 6350 - 0 -1 -1 0 -$EndComp -$Comp -L CONN_01X01 H3 -U 1 1 58E6BAEF P 4250 6350 -F 0 "H3" H 4250 6450 50 0000 C CNN +F 0 "H2" H 4250 6450 50 0000 C CNN F 1 "HOLE" V 4350 6350 50 0000 C CNN F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO14580_Pad" H 4250 6350 50 0001 C CNN F 3 "" H 4250 6350 50 0000 C CNN @@ -148,14 +137,25 @@ F 3 "" H 4250 6350 50 0000 C CNN 0 -1 -1 0 $EndComp $Comp +L CONN_01X01 H3 +U 1 1 58E6BAEF +P 4250 5650 +F 0 "H3" H 4250 5750 50 0000 C CNN +F 1 "HOLE" V 4350 5650 50 0000 C CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO14580_Pad" H 4250 5650 50 0001 C CNN +F 3 "" H 4250 5650 50 0000 C CNN + 1 4250 5650 + 0 -1 -1 0 +$EndComp +$Comp L CONN_01X01 H4 U 1 1 58E6BBE9 -P 4800 6350 -F 0 "H4" H 4800 6450 50 0000 C CNN -F 1 "HOLE" V 4900 6350 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO14580_Pad" H 4800 6350 50 0001 C CNN -F 3 "" H 4800 6350 50 0000 C CNN - 1 4800 6350 +P 3150 5600 +F 0 "H4" H 3150 5700 50 0000 C CNN +F 1 "HOLE" V 3250 5600 50 0000 C CNN +F 2 "Mounting_Holes:MountingHole_3.2mm_M3_ISO14580_Pad" H 3150 5600 50 0001 C CNN +F 3 "" H 3150 5600 50 0000 C CNN + 1 3150 5600 0 -1 -1 0 $EndComp $Comp @@ -172,19 +172,8 @@ $EndComp $Comp L GND #PWR02 U 1 1 58E6BC2E -P 3700 6550 -F 0 "#PWR02" H 3700 6300 50 0001 C CNN -F 1 "GND" H 3700 6400 50 0000 C CNN -F 2 "" H 3700 6550 50 0000 C CNN -F 3 "" H 3700 6550 50 0000 C CNN - 1 3700 6550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 58E6BC56 P 4250 6550 -F 0 "#PWR03" H 4250 6300 50 0001 C CNN +F 0 "#PWR02" H 4250 6300 50 0001 C CNN F 1 "GND" H 4250 6400 50 0000 C CNN F 2 "" H 4250 6550 50 0000 C CNN F 3 "" H 4250 6550 50 0000 C CNN @@ -192,14 +181,33 @@ F 3 "" H 4250 6550 50 0000 C CNN 1 0 0 -1 $EndComp $Comp +L GND #PWR03 +U 1 1 58E6BC56 +P 4250 5850 +F 0 "#PWR03" H 4250 5600 50 0001 C CNN +F 1 "GND" H 4250 5700 50 0000 C CNN +F 2 "" H 4250 5850 50 0000 C CNN +F 3 "" H 4250 5850 50 0000 C CNN + 1 4250 5850 + 1 0 0 -1 +$EndComp +$Comp L GND #PWR04 U 1 1 58E6BC72 -P 4800 6550 -F 0 "#PWR04" H 4800 6300 50 0001 C CNN -F 1 "GND" H 4800 6400 50 0000 C CNN -F 2 "" H 4800 6550 50 0000 C CNN -F 3 "" H 4800 6550 50 0000 C CNN - 1 4800 6550 +P 3150 5800 +F 0 "#PWR04" H 3150 5550 50 0001 C CNN +F 1 "GND" H 3150 5650 50 0000 C CNN +F 2 "" H 3150 5800 50 0000 C CNN +F 3 "" H 3150 5800 50 0000 C CNN + 1 3150 5800 1 0 0 -1 $EndComp +Wire Notes Line + 2950 5400 2950 6850 +Wire Notes Line + 2950 6850 4450 6850 +Wire Notes Line + 4450 6850 4450 5400 +Wire Notes Line + 4450 5400 2950 5400 $EndSCHEMATC diff --git a/ulx3s.kicad_pcb b/ulx3s.kicad_pcb index 6845ede..e09ce50 100644 --- a/ulx3s.kicad_pcb +++ b/ulx3s.kicad_pcb @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4) (general - (links 525) - (no_connects 454) + (links 555) + (no_connects 419) (area 93.949999 61.269999 188.230001 112.370001) (thickness 1.6) (drawings 6) - (tracks 623) + (tracks 564) (zones 0) (modules 113) - (nets 168) + (nets 201) ) (page A4) @@ -116,151 +116,184 @@ (net 20 /power/FB2) (net 21 "Net-(D9-Pad1)") (net 22 /power/VBAT) - (net 23 SD_3) - (net 24 JTAG_TDI) - (net 25 JTAG_TCK) - (net 26 JTAG_TMS) - (net 27 JTAG_TDO) - (net 28 /power/WAKEUPn) - (net 29 /power/WKUP) - (net 30 /power/SHUT) - (net 31 /power/WAKE) - (net 32 /power/HOLD) - (net 33 /power/WKn) - (net 34 /power/OSCI_32k) - (net 35 /power/OSCO_32k) - (net 36 FTDI_nSUSPEND) - (net 37 "Net-(Q2-Pad3)") - (net 38 SHUTDOWN) - (net 39 /analog/AUDIO_L) - (net 40 /analog/AUDIO_R) - (net 41 GPDI_5V_SCL) - (net 42 GPDI_5V_SDA) - (net 43 GPDI_SDA) - (net 44 GPDI_SCL) - (net 45 /gpdi/VREF2) - (net 46 /blinkey/BTNPU) - (net 47 SD_CMD) - (net 48 SD_CLK) - (net 49 SD_D0) - (net 50 SD_D1) - (net 51 USB5V) - (net 52 "Net-(BTN0-Pad1)") - (net 53 LED0) - (net 54 LED1) - (net 55 LED2) - (net 56 LED3) - (net 57 LED4) - (net 58 LED5) - (net 59 LED6) - (net 60 LED7) - (net 61 BTN_PWRn) - (net 62 GPDI_CEC) - (net 63 nRESET) - (net 64 /usb/FT3V3) - (net 65 FTDI_nDTR) - (net 66 SDRAM_CKE) - (net 67 SDRAM_A7) - (net 68 SDRAM_D15) - (net 69 SDRAM_BA1) - (net 70 SDRAM_D7) - (net 71 SDRAM_A6) - (net 72 SDRAM_CLK) - (net 73 SDRAM_D13) - (net 74 SDRAM_BA0) - (net 75 SDRAM_D6) - (net 76 SDRAM_A5) - (net 77 SDRAM_D14) - (net 78 SDRAM_A11) - (net 79 SDRAM_D12) - (net 80 SDRAM_D5) - (net 81 SDRAM_A4) - (net 82 SDRAM_A10) - (net 83 SDRAM_D11) - (net 84 SDRAM_A3) - (net 85 SDRAM_D4) - (net 86 SDRAM_D10) - (net 87 SDRAM_D9) - (net 88 SDRAM_A9) - (net 89 SDRAM_D3) - (net 90 SDRAM_D8) - (net 91 SDRAM_A8) - (net 92 SDRAM_A2) - (net 93 SDRAM_A1) - (net 94 SDRAM_A0) - (net 95 SDRAM_D2) - (net 96 SDRAM_D1) - (net 97 SDRAM_D0) - (net 98 SDRAM_DQM0) - (net 99 SDRAM_nCS) - (net 100 SDRAM_nRAS) - (net 101 SDRAM_DQM1) - (net 102 SDRAM_nCAS) - (net 103 SDRAM_nWE) - (net 104 /flash/FLASH_nWP) - (net 105 /flash/FLASH_nHOLD) - (net 106 /flash/FLASH_MOSI) - (net 107 /flash/FLASH_MISO) - (net 108 /flash/FLASH_SCK) - (net 109 /flash/FLASH_nCS) - (net 110 /flash/FPGA_PROGRAMN) - (net 111 /flash/FPGA_DONE) - (net 112 /flash/FPGA_INITN) - (net 113 OLED_MOSI) - (net 114 OLED_RES) - (net 115 OLED_DC) - (net 116 OLED_CS) - (net 117 AUDIO_L3) - (net 118 AUDIO_L2) - (net 119 AUDIO_L1) - (net 120 AUDIO_L0) - (net 121 AUDIO_R3) - (net 122 AUDIO_R2) - (net 123 AUDIO_R1) - (net 124 AUDIO_R0) - (net 125 WIFI_EN) - (net 126 FTDI_nRTS) - (net 127 WIFI_GPIO2) - (net 128 FTDI_TXD) - (net 129 FTDI_RXD) - (net 130 WIFI_RXD) - (net 131 WIFI_GPIO0) - (net 132 FTDI_nCTS) - (net 133 WIFI_TXD) - (net 134 FTDI_nRI) - (net 135 FTDI_nDCD) - (net 136 WIFI_GPIO15) - (net 137 /gpdi/CLK_25MHz) - (net 138 GPDI_ETH-) - (net 139 GPDI_ETH+) - (net 140 GPDI_D2+) - (net 141 GPDI_D2-) - (net 142 GPDI_D1+) - (net 143 GPDI_D1-) - (net 144 GPDI_D0+) - (net 145 GPDI_D0-) - (net 146 GPDI_CLK+) - (net 147 GPDI_CLK-) - (net 148 USB_FPGA_D+) - (net 149 USB_FPGA_D-) - (net 150 USB_FTDI_D+) - (net 151 USB_FTDI_D-) - (net 152 J1_17-) - (net 153 J1_17+) - (net 154 J1_23-) - (net 155 J1_23+) - (net 156 J1_25-) - (net 157 J1_25+) - (net 158 J1_27-) - (net 159 J1_27+) - (net 160 J1_29-) - (net 161 J1_29+) - (net 162 J1_31-) - (net 163 J1_31+) - (net 164 J1_33-) - (net 165 J1_33+) - (net 166 J1_35-) - (net 167 J1_35+) + (net 23 JTAG_TDI) + (net 24 JTAG_TCK) + (net 25 JTAG_TMS) + (net 26 JTAG_TDO) + (net 27 /power/WAKEUPn) + (net 28 /power/WKUP) + (net 29 /power/SHUT) + (net 30 /power/WAKE) + (net 31 /power/HOLD) + (net 32 /power/WKn) + (net 33 /power/OSCI_32k) + (net 34 /power/OSCO_32k) + (net 35 FTDI_nSUSPEND) + (net 36 "Net-(Q2-Pad3)") + (net 37 SHUTDOWN) + (net 38 /analog/AUDIO_L) + (net 39 /analog/AUDIO_R) + (net 40 GPDI_5V_SCL) + (net 41 GPDI_5V_SDA) + (net 42 GPDI_SDA) + (net 43 GPDI_SCL) + (net 44 /gpdi/VREF2) + (net 45 /blinkey/BTNPU) + (net 46 SD_CMD) + (net 47 SD_CLK) + (net 48 SD_D0) + (net 49 SD_D1) + (net 50 USB5V) + (net 51 "Net-(BTN0-Pad1)") + (net 52 GPDI_CEC) + (net 53 nRESET) + (net 54 /usb/FT3V3) + (net 55 FTDI_nDTR) + (net 56 SDRAM_CKE) + (net 57 SDRAM_A7) + (net 58 SDRAM_D15) + (net 59 SDRAM_BA1) + (net 60 SDRAM_D7) + (net 61 SDRAM_A6) + (net 62 SDRAM_CLK) + (net 63 SDRAM_D13) + (net 64 SDRAM_BA0) + (net 65 SDRAM_D6) + (net 66 SDRAM_A5) + (net 67 SDRAM_D14) + (net 68 SDRAM_A11) + (net 69 SDRAM_D12) + (net 70 SDRAM_D5) + (net 71 SDRAM_A4) + (net 72 SDRAM_A10) + (net 73 SDRAM_D11) + (net 74 SDRAM_A3) + (net 75 SDRAM_D4) + (net 76 SDRAM_D10) + (net 77 SDRAM_D9) + (net 78 SDRAM_A9) + (net 79 SDRAM_D3) + (net 80 SDRAM_D8) + (net 81 SDRAM_A8) + (net 82 SDRAM_A2) + (net 83 SDRAM_A1) + (net 84 SDRAM_A0) + (net 85 SDRAM_D2) + (net 86 SDRAM_D1) + (net 87 SDRAM_D0) + (net 88 SDRAM_DQM0) + (net 89 SDRAM_nCS) + (net 90 SDRAM_nRAS) + (net 91 SDRAM_DQM1) + (net 92 SDRAM_nCAS) + (net 93 SDRAM_nWE) + (net 94 /flash/FLASH_nWP) + (net 95 /flash/FLASH_nHOLD) + (net 96 /flash/FLASH_MOSI) + (net 97 /flash/FLASH_MISO) + (net 98 /flash/FLASH_SCK) + (net 99 /flash/FLASH_nCS) + (net 100 /flash/FPGA_PROGRAMN) + (net 101 /flash/FPGA_DONE) + (net 102 /flash/FPGA_INITN) + (net 103 OLED_RES) + (net 104 OLED_DC) + (net 105 OLED_CS) + (net 106 WIFI_EN) + (net 107 FTDI_nRTS) + (net 108 WIFI_GPIO2) + (net 109 FTDI_TXD) + (net 110 FTDI_RXD) + (net 111 WIFI_RXD) + (net 112 WIFI_GPIO0) + (net 113 FTDI_nCTS) + (net 114 WIFI_TXD) + (net 115 FTDI_nRI) + (net 116 FTDI_nDCD) + (net 117 /gpdi/CLK_25MHz) + (net 118 GPDI_ETH-) + (net 119 GPDI_ETH+) + (net 120 GPDI_D2+) + (net 121 GPDI_D2-) + (net 122 GPDI_D1+) + (net 123 GPDI_D1-) + (net 124 GPDI_D0+) + (net 125 GPDI_D0-) + (net 126 GPDI_CLK+) + (net 127 GPDI_CLK-) + (net 128 USB_FPGA_D+) + (net 129 USB_FPGA_D-) + (net 130 USB_FTDI_D+) + (net 131 USB_FTDI_D-) + (net 132 J1_17-) + (net 133 J1_17+) + (net 134 J1_23-) + (net 135 J1_23+) + (net 136 J1_25-) + (net 137 J1_25+) + (net 138 J1_27-) + (net 139 J1_27+) + (net 140 J1_29-) + (net 141 J1_29+) + (net 142 J1_31-) + (net 143 J1_31+) + (net 144 J1_33-) + (net 145 J1_33+) + (net 146 J1_35-) + (net 147 J1_35+) + (net 148 J2_5-) + (net 149 J2_5+) + (net 150 J2_7-) + (net 151 J2_7+) + (net 152 J2_9-) + (net 153 J2_9+) + (net 154 J2_13-) + (net 155 J2_13+) + (net 156 J2_17-) + (net 157 J2_17+) + (net 158 J2_11-) + (net 159 J2_11+) + (net 160 J2_23-) + (net 161 J2_23+) + (net 162 J1_5-) + (net 163 J1_5+) + (net 164 J1_7-) + (net 165 J1_7+) + (net 166 J1_9-) + (net 167 J1_9+) + (net 168 J1_11-) + (net 169 J1_11+) + (net 170 J1_13-) + (net 171 J1_13+) + (net 172 J1_15-) + (net 173 J1_15+) + (net 174 J2_15-) + (net 175 J2_15+) + (net 176 J2_25-) + (net 177 J2_25+) + (net 178 J2_27-) + (net 179 J2_27+) + (net 180 J2_29-) + (net 181 J2_29+) + (net 182 J2_31-) + (net 183 J2_31+) + (net 184 J2_33-) + (net 185 J2_33+) + (net 186 J2_35-) + (net 187 J2_35+) + (net 188 SD_D3) + (net 189 AUDIO_L3) + (net 190 AUDIO_L2) + (net 191 AUDIO_L1) + (net 192 AUDIO_L0) + (net 193 AUDIO_R3) + (net 194 AUDIO_R2) + (net 195 AUDIO_R1) + (net 196 AUDIO_R0) + (net 197 FTDI_nDSR) + (net 198 OLED_CLK) + (net 199 OLED_MOSI) + (net 200 WIFI_GPIO15) (net_class Default "This is the default net class." (clearance 0.127) @@ -293,6 +326,15 @@ (add_net /power/WKUP) (add_net /power/WKn) (add_net /usb/FT3V3) + (add_net AUDIO_L0) + (add_net AUDIO_L1) + (add_net AUDIO_L2) + (add_net AUDIO_L3) + (add_net AUDIO_R0) + (add_net AUDIO_R1) + (add_net AUDIO_R2) + (add_net AUDIO_R3) + (add_net FTDI_nDSR) (add_net GND) (add_net "Net-(BTN0-Pad1)") (add_net "Net-(D9-Pad1)") @@ -300,10 +342,13 @@ (add_net "Net-(L2-Pad1)") (add_net "Net-(L3-Pad1)") (add_net "Net-(Q2-Pad3)") + (add_net OLED_CLK) + (add_net OLED_MOSI) (add_net SHUTDOWN) (add_net USB5V) (add_net USB_FTDI_D+) (add_net USB_FTDI_D-) + (add_net WIFI_GPIO15) (add_net nRESET) ) @@ -324,19 +369,10 @@ (add_net /flash/FPGA_INITN) (add_net /flash/FPGA_PROGRAMN) (add_net /gpdi/CLK_25MHz) - (add_net AUDIO_L0) - (add_net AUDIO_L1) - (add_net AUDIO_L2) - (add_net AUDIO_L3) - (add_net AUDIO_R0) - (add_net AUDIO_R1) - (add_net AUDIO_R2) - (add_net AUDIO_R3) (add_net BTN_D) (add_net BTN_F1) (add_net BTN_F2) (add_net BTN_L) - (add_net BTN_PWRn) (add_net BTN_R) (add_net BTN_U) (add_net FTDI_RXD) @@ -362,6 +398,12 @@ (add_net GPDI_ETH-) (add_net GPDI_SCL) (add_net GPDI_SDA) + (add_net J1_11+) + (add_net J1_11-) + (add_net J1_13+) + (add_net J1_13-) + (add_net J1_15+) + (add_net J1_15-) (add_net J1_17+) (add_net J1_17-) (add_net J1_23+) @@ -378,21 +420,46 @@ (add_net J1_33-) (add_net J1_35+) (add_net J1_35-) + (add_net J1_5+) + (add_net J1_5-) + (add_net J1_7+) + (add_net J1_7-) + (add_net J1_9+) + (add_net J1_9-) + (add_net J2_11+) + (add_net J2_11-) + (add_net J2_13+) + (add_net J2_13-) + (add_net J2_15+) + (add_net J2_15-) + (add_net J2_17+) + (add_net J2_17-) + (add_net J2_23+) + (add_net J2_23-) + (add_net J2_25+) + (add_net J2_25-) + (add_net J2_27+) + (add_net J2_27-) + (add_net J2_29+) + (add_net J2_29-) + (add_net J2_31+) + (add_net J2_31-) + (add_net J2_33+) + (add_net J2_33-) + (add_net J2_35+) + (add_net J2_35-) + (add_net J2_5+) + (add_net J2_5-) + (add_net J2_7+) + (add_net J2_7-) + (add_net J2_9+) + (add_net J2_9-) (add_net JTAG_TCK) (add_net JTAG_TDI) (add_net JTAG_TDO) (add_net JTAG_TMS) - (add_net LED0) - (add_net LED1) - (add_net LED2) - (add_net LED3) - (add_net LED4) - (add_net LED5) - (add_net LED6) - (add_net LED7) (add_net OLED_CS) (add_net OLED_DC) - (add_net OLED_MOSI) (add_net OLED_RES) (add_net SDRAM_A0) (add_net SDRAM_A1) @@ -432,16 +499,15 @@ (add_net SDRAM_nCS) (add_net SDRAM_nRAS) (add_net SDRAM_nWE) - (add_net SD_3) (add_net SD_CLK) (add_net SD_CMD) (add_net SD_D0) (add_net SD_D1) + (add_net SD_D3) (add_net USB_FPGA_D+) (add_net USB_FPGA_D-) (add_net WIFI_EN) (add_net WIFI_GPIO0) - (add_net WIFI_GPIO15) (add_net WIFI_GPIO2) (add_net WIFI_RXD) (add_net WIFI_TXD) @@ -608,21 +674,21 @@ (fp_line (start -7 15.2) (end -7 0) (layer F.SilkS) (width 0.01016)) (fp_line (start -7 0) (end 7 0) (layer F.SilkS) (width 0.01016)) (pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 23 SD_3)) + (net 188 SD_D3)) (pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 47 SD_CMD)) + (net 46 SD_CMD)) (pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 48 SD_CLK)) + (net 47 SD_CLK)) (pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 49 SD_D0)) + (net 48 SD_D0)) (pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 50 SD_D1)) + (net 49 SD_D1)) (pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask)) (pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask)) (pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask)) @@ -781,9 +847,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -824,9 +890,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -867,9 +933,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -910,9 +976,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -953,9 +1019,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -996,9 +1062,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1038,8 +1104,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 53 LED0)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1082,8 +1147,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 54 LED1)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1126,8 +1190,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 55 LED2)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1170,8 +1233,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 56 LED3)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1214,8 +1276,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 57 LED4)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1258,8 +1319,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 58 LED5)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1302,8 +1362,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 59 LED6)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1346,8 +1405,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 60 LED7)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1735,7 +1793,7 @@ (pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) - (net 51 USB5V)) + (net 50 USB5V)) (model SMD_Packages.3dshapes/SMD-1206_Pol.wrl (at (xyz 0 0 0)) (scale (xyz 0.17 0.16 0.16)) @@ -1791,9 +1849,9 @@ (fp_line (start -2.54 -1.905) (end -2.54 1.905) (layer B.SilkS) (width 0.15)) (fp_line (start 2.54 -1.905) (end 2.54 1.905) (layer B.SilkS) (width 0.15)) (pad 1 smd oval (at -1.905 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 34 /power/OSCI_32k)) + (net 33 /power/OSCI_32k)) (pad 2 smd oval (at -0.635 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 35 /power/OSCO_32k)) + (net 34 /power/OSCO_32k)) (pad 3 smd oval (at 0.635 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 22 /power/VBAT)) (pad 4 smd oval (at 1.905 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) @@ -1801,7 +1859,7 @@ (pad 5 smd oval (at 1.905 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask)) (pad 6 smd oval (at 0.635 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask)) (pad 7 smd oval (at -0.635 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) (pad 8 smd oval (at -1.905 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 16 +2V5)) ) @@ -1831,7 +1889,7 @@ (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (model Capacitors_SMD.3dshapes/C_0805_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1868,9 +1926,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 31 /power/WAKE)) + (net 30 /power/WAKE)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D79A81) @@ -1902,7 +1960,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 /power/HOLD)) + (net 31 /power/HOLD)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -1936,9 +1994,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 SHUTDOWN)) + (net 37 SHUTDOWN)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D7A84D) @@ -1972,7 +2030,7 @@ (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 FTDI_nSUSPEND)) + (net 35 FTDI_nSUSPEND)) ) (module usb_otg:USB-MICRO-B-FCI-10118192-0001LF (layer B.Cu) (tedit 55D9BD68) (tstamp 58D81F93) @@ -2012,11 +2070,11 @@ (pad "" smd rect (at -1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad "" smd rect (at 1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 51 USB5V)) + (net 50 USB5V)) (pad 2 smd rect (at -0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 151 USB_FTDI_D-)) + (net 131 USB_FTDI_D-)) (pad 3 smd rect (at 0 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 150 USB_FTDI_D+)) + (net 130 USB_FTDI_D+)) (pad 4 smd rect (at 0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2063,9 +2121,9 @@ (pad 1 smd rect (at -1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(D9-Pad1)")) (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 149 USB_FPGA_D-)) + (net 129 USB_FPGA_D-)) (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 148 USB_FPGA_D+)) + (net 128 USB_FPGA_D+)) (pad 4 smd rect (at 0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2093,13 +2151,13 @@ (fp_line (start -8.5 -2.5) (end -8.5 2.5) (layer F.SilkS) (width 0.1524)) (fp_line (start -8.5 2.5) (end -7 2.5) (layer F.SilkS) (width 0.1524)) (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -2131,105 +2189,105 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 97 SDRAM_D0)) + (net 87 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 96 SDRAM_D1)) + (net 86 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 95 SDRAM_D2)) + (net 85 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 89 SDRAM_D3)) + (net 79 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_D4)) + (net 75 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D5)) + (net 70 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D6)) + (net 65 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D7)) + (net 60 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 98 SDRAM_DQM0)) + (net 88 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 103 SDRAM_nWE)) + (net 93 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 102 SDRAM_nCAS)) + (net 92 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 100 SDRAM_nRAS)) + (net 90 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 99 SDRAM_nCS)) + (net 89 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_BA0)) + (net 64 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_BA1)) + (net 59 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_A10)) + (net 72 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 94 SDRAM_A0)) + (net 84 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 93 SDRAM_A1)) + (net 83 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 92 SDRAM_A2)) + (net 82 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_A3)) + (net 74 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_A4)) + (net 71 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A5)) + (net 66 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A6)) + (net 61 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A7)) + (net 57 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 91 SDRAM_A8)) + (net 81 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 88 SDRAM_A9)) + (net 78 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_A11)) + (net 68 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_CKE)) + (net 56 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_CLK)) + (net 62 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 101 SDRAM_DQM1)) + (net 91 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 90 SDRAM_D8)) + (net 80 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 87 SDRAM_D9)) + (net 77 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_D10)) + (net 76 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_D11)) + (net 73 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D12)) + (net 69 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D13)) + (net 63 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_D14)) + (net 67 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D15)) + (net 58 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -2264,11 +2322,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 33 /power/WKn)) + (net 32 /power/WKn)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2301,11 +2359,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 37 "Net-(Q2-Pad3)")) + (net 36 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2435,7 +2493,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl @@ -2468,7 +2526,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 31 /power/WAKE)) + (net 30 /power/WAKE)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2534,7 +2592,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 /power/HOLD)) + (net 31 /power/HOLD)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2567,7 +2625,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2600,9 +2658,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 33 /power/WKn)) + (net 32 /power/WKn)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2635,7 +2693,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2668,7 +2726,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 37 "Net-(Q2-Pad3)")) + (net 36 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2699,9 +2757,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 63 nRESET)) + (net 53 nRESET)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2732,9 +2790,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 FTDI_nSUSPEND)) + (net 35 FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 65 FTDI_nDTR)) + (net 55 FTDI_nDTR)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2765,7 +2823,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 SHUTDOWN)) + (net 37 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2996,9 +3054,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 117 AUDIO_L3)) + (net 189 AUDIO_L3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3029,9 +3087,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 118 AUDIO_L2)) + (net 190 AUDIO_L2)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3062,9 +3120,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 119 AUDIO_L1)) + (net 191 AUDIO_L1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3095,9 +3153,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 120 AUDIO_L0)) + (net 192 AUDIO_L0)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3128,9 +3186,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 121 AUDIO_R3)) + (net 193 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3161,9 +3219,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 122 AUDIO_R2)) + (net 194 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3194,9 +3252,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 123 AUDIO_R1)) + (net 195 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3227,9 +3285,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 124 AUDIO_R0)) + (net 196 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3253,211 +3311,211 @@ (fp_line (start -8.4 -8.4) (end -8.4 8.4) (layer F.SilkS) (width 0.15)) (fp_line (start -7.6 -8.4) (end -8.4 -7.6) (layer F.SilkS) (width 0.15)) (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 140 J1_29-) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 191 AUDIO_L1) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 136 J1_25-) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 137 J1_25+) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 162 J1_5-) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 138 J1_27-) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 139 J1_27+) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 133 J1_17+) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 168 J1_11-) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 169 J1_11+) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 BTN_PWRn) (solder_mask_margin 0.04)) + (net 186 J2_35-) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 LED6) (solder_mask_margin 0.04)) + (net 187 J2_35+) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 GPDI_D2+) (solder_mask_margin 0.04)) + (net 120 GPDI_D2+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 GPDI_D1+) (solder_mask_margin 0.04)) + (net 122 GPDI_D1+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_D) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 GPDI_CLK+) (solder_mask_margin 0.04)) + (net 126 GPDI_CLK+) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 GPDI_CEC) (solder_mask_margin 0.04)) + (net 52 GPDI_CEC) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 141 J1_29+) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 195 AUDIO_R1) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 135 J1_23+) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 192 AUDIO_L0) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 163 J1_5+) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 173 J1_15+) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 164 J1_7-) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 132 J1_17-) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 166 J1_9-) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) + (net 117 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 GPDI_ETH+) (solder_mask_margin 0.04)) + (net 119 GPDI_ETH+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 184 J2_33-) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 GPDI_D1-) (solder_mask_margin 0.04)) + (net 123 GPDI_D1-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 GPDI_D0+) (solder_mask_margin 0.04)) + (net 124 GPDI_D0+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 43 GPDI_SDA) (solder_mask_margin 0.04)) + (net 42 GPDI_SDA) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 GPDI_CLK-) (solder_mask_margin 0.04)) + (net 127 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 44 GPDI_SCL) (solder_mask_margin 0.04)) + (net 43 GPDI_SCL) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 190 AUDIO_L2) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 134 J1_23-) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 196 AUDIO_R0) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 170 J1_13-) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 171 J1_13+) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 172 J1_15-) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 165 J1_7+) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 167 J1_9+) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 LED7) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 GPDI_ETH-) (solder_mask_margin 0.04)) + (net 118 GPDI_ETH-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 GPDI_D2-) (solder_mask_margin 0.04)) + (net 121 GPDI_D2-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 185 J2_33+) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_L) (solder_mask_margin 0.04)) + (net 182 J2_31-) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 GPDI_D0-) (solder_mask_margin 0.04)) + (net 125 GPDI_D0-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 156 J2_17-) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D15) (solder_mask_margin 0.04)) + (net 58 SDRAM_D15) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 194 AUDIO_R2) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 J1_29+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 J1_23+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 J1_27+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 J1_25+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 152 J1_17-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U) (solder_mask_margin 0.04)) (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 180 J2_29-) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_F2) (solder_mask_margin 0.04)) + (net 160 J2_23-) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_F1) (solder_mask_margin 0.04)) + (net 178 J2_27-) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 13 BTN_R) (solder_mask_margin 0.04)) + (net 176 J2_25-) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 LED2) (solder_mask_margin 0.04)) + (net 183 J2_31+) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 157 J2_17+) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 174 J2_15-) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_D14) (solder_mask_margin 0.04)) + (net 67 SDRAM_D14) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D13) (solder_mask_margin 0.04)) + (net 63 SDRAM_D13) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 J1_31+) (solder_mask_margin 0.04)) + (net 143 J1_31+) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 J1_29-) (solder_mask_margin 0.04)) - (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) + (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) + (net 189 AUDIO_L3) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 J1_23-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 J1_27-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 J1_25-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 153 J1_17+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 LED1) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 53 LED0) (solder_mask_margin 0.04)) + (net 181 J2_29+) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 LED5) (solder_mask_margin 0.04)) + (net 161 J2_23+) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 LED4) (solder_mask_margin 0.04)) + (net 179 J2_27+) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 LED3) (solder_mask_margin 0.04)) + (net 177 J2_25+) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 175 J2_15+) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 75 SDRAM_D4) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D12) (solder_mask_margin 0.04)) + (net 69 SDRAM_D12) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_D11) (solder_mask_margin 0.04)) + (net 73 SDRAM_D11) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 110 FTDI_RXD) (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 J1_33+) (solder_mask_margin 0.04)) + (net 145 J1_33+) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 J1_31-) (solder_mask_margin 0.04)) + (net 142 J1_31-) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 193 AUDIO_R3) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3481,23 +3539,23 @@ (pad F16 smd circle (at 4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 154 J2_13-) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 70 SDRAM_D5) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_D10) (solder_mask_margin 0.04)) + (net 76 SDRAM_D10) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 87 SDRAM_D9) (solder_mask_margin 0.04)) + (net 77 SDRAM_D9) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 109 FTDI_TXD) (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 111 WIFI_RXD) (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 J1_33-) (solder_mask_margin 0.04)) + (net 144 J1_33-) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 J1_35+) (solder_mask_margin 0.04)) + (net 147 J1_35+) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3523,19 +3581,19 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D5) (solder_mask_margin 0.04)) + (net 155 J2_13+) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 SDRAM_D8) (solder_mask_margin 0.04)) + (net 80 SDRAM_D8) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 91 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 131 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 200 WIFI_GPIO15) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 114 WIFI_TXD) (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 J1_35-) (solder_mask_margin 0.04)) + (net 146 J1_35-) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3563,21 +3621,21 @@ (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_D4) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 62 SDRAM_CLK) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 132 FTDI_nCTS) (solder_mask_margin 0.04)) + (net 198 OLED_CLK) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 133 WIFI_TXD) (solder_mask_margin 0.04)) + (net 112 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 WIFI_RXD) (solder_mask_margin 0.04)) + (net 108 WIFI_GPIO2) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 FTDI_RXD) (solder_mask_margin 0.04)) + (net 113 FTDI_nCTS) (solder_mask_margin 0.04)) (pad J6 smd circle (at -3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3603,21 +3661,21 @@ (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 SDRAM_D3) (solder_mask_margin 0.04)) + (net 79 SDRAM_D3) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 56 SDRAM_CKE) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_A11) (solder_mask_margin 0.04)) + (net 68 SDRAM_A11) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 55 FTDI_nDTR) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 WIFI_GPIO2) (solder_mask_margin 0.04)) + (net 199 OLED_MOSI) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 FTDI_TXD) (solder_mask_margin 0.04)) + (net 107 FTDI_nRTS) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 OLED_MOSI) (solder_mask_margin 0.04)) + (net 103 OLED_RES) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 FTDI_nRI) (solder_mask_margin 0.04)) + (net 104 OLED_DC) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3643,21 +3701,21 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 SDRAM_D2) (solder_mask_margin 0.04)) + (net 85 SDRAM_D2) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 88 SDRAM_A9) (solder_mask_margin 0.04)) + (net 78 SDRAM_A9) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 SDRAM_A8) (solder_mask_margin 0.04)) + (net 81 SDRAM_A8) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 AUDIO_L0) (solder_mask_margin 0.04)) + (net 48 SD_D0) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 116 FTDI_nDCD) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 116 OLED_CS) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 106 WIFI_EN) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 FTDI_nDCD) (solder_mask_margin 0.04)) + (net 197 FTDI_nDSR) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3679,23 +3737,23 @@ (pad L15 smd circle (at 3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L16 smd circle (at 4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SD_D0) (solder_mask_margin 0.04)) + (net 158 J2_11-) (solder_mask_margin 0.04)) (pad L17 smd circle (at 5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 159 J2_11+) (solder_mask_margin 0.04)) (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 SDRAM_D1) (solder_mask_margin 0.04)) + (net 86 SDRAM_D1) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A7) (solder_mask_margin 0.04)) + (net 57 SDRAM_A7) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A6) (solder_mask_margin 0.04)) + (net 61 SDRAM_A6) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 AUDIO_R1) (solder_mask_margin 0.04)) + (net 46 SD_CMD) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 USB_FPGA_D-) (solder_mask_margin 0.04)) + (net 129 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 OLED_DC) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M6 smd circle (at -3.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3721,21 +3779,21 @@ (pad M16 smd circle (at 4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 151 J2_7+) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 SDRAM_D0) (solder_mask_margin 0.04)) + (net 87 SDRAM_D0) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A5) (solder_mask_margin 0.04)) + (net 66 SDRAM_A5) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_A4) (solder_mask_margin 0.04)) + (net 71 SDRAM_A4) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 AUDIO_R0) (solder_mask_margin 0.04)) + (net 47 SD_CLK) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 AUDIO_L1) (solder_mask_margin 0.04)) + (net 49 SD_D1) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 USB_FPGA_D+) (solder_mask_margin 0.04)) + (net 128 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 OLED_RES) (solder_mask_margin 0.04)) + (net 105 OLED_CS) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N6 smd circle (at -3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3759,25 +3817,25 @@ (pad N15 smd circle (at 3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 150 J2_7-) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 47 SD_CMD) (solder_mask_margin 0.04)) + (net 152 J2_9-) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D6) (solder_mask_margin 0.04)) + (net 65 SDRAM_D6) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_A3) (solder_mask_margin 0.04)) + (net 74 SDRAM_A3) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 SDRAM_A2) (solder_mask_margin 0.04)) + (net 82 SDRAM_A2) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 117 AUDIO_L3) (solder_mask_margin 0.04)) + (net 188 SD_D3) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 AUDIO_R3) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 AUDIO_L2) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 AUDIO_R2) (solder_mask_margin 0.04)) - (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) + (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) + (net 115 FTDI_nRI) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3799,35 +3857,35 @@ (pad P15 smd circle (at 3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P16 smd circle (at 4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 153 J2_9+) (solder_mask_margin 0.04)) (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D7) (solder_mask_margin 0.04)) + (net 60 SDRAM_D7) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 SDRAM_A1) (solder_mask_margin 0.04)) + (net 83 SDRAM_A1) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 SDRAM_A0) (solder_mask_margin 0.04)) + (net 84 SDRAM_A0) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 99 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 24 JTAG_TDI) (solder_mask_margin 0.04)) + (net 23 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 48 SD_CLK) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SD_D1) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 88 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_A10) (solder_mask_margin 0.04)) + (net 72 SDRAM_A10) (solder_mask_margin 0.04)) (pad T1 smd circle (at -7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T2 smd circle (at -6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3837,7 +3895,7 @@ (pad T4 smd circle (at -5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T5 smd circle (at -4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 25 JTAG_TCK) (solder_mask_margin 0.04)) + (net 24 JTAG_TCK) (solder_mask_margin 0.04)) (pad T6 smd circle (at -3.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad T7 smd circle (at -2.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3861,23 +3919,23 @@ (pad T16 smd circle (at 4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 92 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 93 SDRAM_nWE) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 59 SDRAM_BA1) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 64 SDRAM_BA0) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 98 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 26 JTAG_TMS) (solder_mask_margin 0.04)) + (net 25 JTAG_TMS) (solder_mask_margin 0.04)) (pad U6 smd circle (at -3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U7 smd circle (at -2.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3901,21 +3959,21 @@ (pad U16 smd circle (at 4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 149 J2_5+) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 148 J2_5-) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 89 SDRAM_nCS) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 90 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 97 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 102 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 27 JTAG_TDO) (solder_mask_margin 0.04)) + (net 26 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad V6 smd circle (at -3.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3951,9 +4009,9 @@ (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 96 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 110 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 100 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3991,7 +4049,7 @@ (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 101 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4060,41 +4118,41 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 138 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 118 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 139 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 119 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 140 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 120 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 141 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 121 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 142 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 122 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 143 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 123 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 144 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 124 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 145 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 125 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 146 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 126 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 147 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 127 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 62 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 52 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 41 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 40 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 42 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 41 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) @@ -4130,19 +4188,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 109 /flash/FLASH_nCS)) + (net 99 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 107 /flash/FLASH_MISO)) + (net 97 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 104 /flash/FLASH_nWP)) + (net 94 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 106 /flash/FLASH_MOSI)) + (net 96 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 108 /flash/FLASH_SCK)) + (net 98 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 105 /flash/FLASH_nHOLD)) + (net 95 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -4218,17 +4276,17 @@ (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_SCL)) + (net 43 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_SDA)) + (net 42 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 42 GPDI_5V_SDA)) + (net 41 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 41 GPDI_5V_SCL)) + (net 40 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4265,7 +4323,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) ) @@ -4301,7 +4359,7 @@ (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) ) (module ESP32-footprints-Lib:ESP-32S (layer B.Cu) (tedit 58152DB7) (tstamp 58E56AFE) @@ -4329,37 +4387,36 @@ (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 WIFI_TXD)) + (net 114 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 130 WIFI_RXD)) + (net 111 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 26 JTAG_TMS)) + (net 25 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 27 JTAG_TDO)) + (net 26 JTAG_TDO)) (pad 31 smd oval (at 8.947434 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 24 JTAG_TDI)) + (net 23 JTAG_TDI)) (pad 30 smd oval (at 8.947434 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 25 JTAG_TCK)) + (net 24 JTAG_TCK)) (pad 29 smd oval (at 8.947434 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 28 smd oval (at 8.947434 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 WIFI_GPIO0)) + (net 112 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 127 WIFI_GPIO2)) + (net 108 WIFI_GPIO2)) (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 136 WIFI_GPIO15)) + (net 200 WIFI_GPIO15)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 50 SD_D1)) + (net 49 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 49 SD_D0)) + (net 48 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 48 SD_CLK)) + (net 47 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 47 SD_CMD)) - (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 23 SD_3)) + (net 46 SD_CMD)) + (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 16 smd oval (at -4.497566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 15 smd oval (at -5.767566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) @@ -4375,7 +4432,7 @@ (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4489,22 +4546,34 @@ (net 1 GND)) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 162 J1_5-)) + (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 163 J1_5+)) + (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 164 J1_7-)) + (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 165 J1_7+)) + (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 166 J1_9-)) + (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 167 J1_9+)) + (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 168 J1_11-)) + (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 169 J1_11+)) + (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 170 J1_13-)) + (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 171 J1_13+)) + (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 172 J1_15-)) + (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 173 J1_15+)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 152 J1_17-)) + (net 132 J1_17-)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 153 J1_17+)) + (net 133 J1_17+)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4514,33 +4583,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 154 J1_23-)) + (net 134 J1_23-)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 155 J1_23+)) + (net 135 J1_23+)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 156 J1_25-)) + (net 136 J1_25-)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 157 J1_25+)) + (net 137 J1_25+)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 158 J1_27-)) + (net 138 J1_27-)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 159 J1_27+)) + (net 139 J1_27+)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 160 J1_29-)) + (net 140 J1_29-)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 161 J1_29+)) + (net 141 J1_29+)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 162 J1_31-)) + (net 142 J1_31-)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 163 J1_31+)) + (net 143 J1_31+)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 164 J1_33-)) + (net 144 J1_33-)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 165 J1_33+)) + (net 145 J1_33+)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 166 J1_35-)) + (net 146 J1_35-)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 167 J1_35+)) + (net 147 J1_35+)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4662,20 +4731,34 @@ (net 1 GND)) (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 148 J2_5-)) + (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 149 J2_5+)) + (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 150 J2_7-)) + (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 151 J2_7+)) + (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 152 J2_9-)) + (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 153 J2_9+)) + (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 158 J2_11-)) + (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 159 J2_11+)) + (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 154 J2_13-)) + (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 155 J2_13+)) + (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 174 J2_15-)) + (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 175 J2_15+)) + (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 156 J2_17-)) + (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 157 J2_17+)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4684,20 +4767,34 @@ (net 1 GND)) (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 160 J2_23-)) + (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 161 J2_23+)) + (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 176 J2_25-)) + (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 177 J2_25+)) + (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 178 J2_27-)) + (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 179 J2_27+)) + (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 180 J2_29-)) + (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 181 J2_29+)) + (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 182 J2_31-)) + (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 183 J2_31+)) + (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 184 J2_33-)) + (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 185 J2_33+)) + (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 186 J2_35-)) + (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 187 J2_35+)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4815,9 +4912,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -4853,9 +4950,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58E794D9) @@ -4887,9 +4984,8 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) - (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 61 BTN_PWRn)) + (net 51 "Net-(BTN0-Pad1)")) + (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 58E794DF) @@ -4917,7 +5013,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4950,7 +5046,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_SDA)) + (net 42 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4983,7 +5079,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_SCL)) + (net 43 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5016,7 +5112,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5049,7 +5145,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 41 GPDI_5V_SCL)) + (net 40 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5082,7 +5178,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 GPDI_5V_SDA)) + (net 41 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5117,44 +5213,45 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 65 FTDI_nDTR)) + (net 55 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 126 FTDI_nRTS)) + (net 107 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (pad 4 smd rect (at -2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 129 FTDI_RXD)) + (net 110 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 134 FTDI_nRI)) + (net 115 FTDI_nRI)) (pad 6 smd rect (at -2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) - (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask)) + (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) + (net 197 FTDI_nDSR)) (pad 8 smd rect (at -2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 135 FTDI_nDCD)) + (net 116 FTDI_nDCD)) (pad 9 smd rect (at -2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 FTDI_nCTS)) + (net 113 FTDI_nCTS)) (pad 10 smd rect (at -2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 27 JTAG_TDO)) + (net 26 JTAG_TDO)) (pad 11 smd rect (at 2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 150 USB_FTDI_D+)) + (net 130 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 151 USB_FTDI_D-)) + (net 131 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (pad 14 smd rect (at 2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 63 nRESET)) + (net 53 nRESET)) (pad 15 smd rect (at 2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 17 smd rect (at 2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 24 JTAG_TDI)) + (net 23 JTAG_TDI)) (pad 18 smd rect (at 2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 25 JTAG_TCK)) + (net 24 JTAG_TCK)) (pad 19 smd rect (at 2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 26 JTAG_TMS)) + (net 25 JTAG_TMS)) (pad 20 smd rect (at 2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 128 FTDI_TXD)) + (net 109 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5187,7 +5284,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 104 /flash/FLASH_nWP)) + (net 94 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5220,7 +5317,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 105 /flash/FLASH_nHOLD)) + (net 95 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5253,7 +5350,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 106 /flash/FLASH_MOSI)) + (net 96 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5286,7 +5383,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 107 /flash/FLASH_MISO)) + (net 97 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5319,7 +5416,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 108 /flash/FLASH_SCK)) + (net 98 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5352,7 +5449,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 109 /flash/FLASH_nCS)) + (net 99 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5385,7 +5482,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 /flash/FPGA_PROGRAMN)) + (net 100 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5418,7 +5515,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 111 /flash/FPGA_DONE)) + (net 101 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5451,7 +5548,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 112 /flash/FPGA_INITN)) + (net 102 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5484,7 +5581,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5522,11 +5619,11 @@ (fp_line (start 0.9 1.8) (end -0.9 1.8) (layer B.SilkS) (width 0.15)) (fp_line (start -2.7 0.4) (end -2.7 -0.4) (layer B.SilkS) (width 0.15)) (pad 4 smd rect (at -2 1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask) - (net 35 /power/OSCO_32k)) + (net 34 /power/OSCO_32k)) (pad 3 smd rect (at 2 1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask)) (pad 2 smd rect (at 2 -1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -2 -1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask) - (net 34 /power/OSCI_32k)) + (net 33 /power/OSCI_32k)) ) (module oscxo:Crystal_SMD_7050_4Pads (layer B.Cu) (tedit 58EE0D05) (tstamp 58EE1137) @@ -5564,7 +5661,7 @@ (pad 2 smd rect (at 3.15 -1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) - (net 137 /gpdi/CLK_25MHz)) + (net 117 /gpdi/CLK_25MHz)) (pad 4 smd rect (at -3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -5592,7 +5689,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl @@ -5667,15 +5764,16 @@ (net 1 GND)) (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) - (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)) + (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) + (net 198 OLED_CLK)) (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 113 OLED_MOSI)) + (net 199 OLED_MOSI)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 114 OLED_RES)) + (net 103 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 115 OLED_DC)) + (net 104 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 116 OLED_CS)) + (net 105 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5712,628 +5810,569 @@ (gr_line (start 188.08 112.22) (end 188.08 61.42) (layer Edge.Cuts) (width 0.3)) (gr_line (start 94.1 112.22) (end 188.08 112.22) (layer Edge.Cuts) (width 0.3)) + (segment (start 141.037856 87) (end 141.042859 86.994997) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 139.28 87) (end 141.037856 87) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 141.042859 86.837141) (end 141.042859 86.994997) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 141.28 86.6) (end 141.042859 86.837141) (width 0.3) (layer F.Cu) (net 1)) + (via (at 141.042859 86.994997) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 1)) + (segment (start 139.68 87) (end 139.68 89) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 139.68 86.6) (end 139.68 87) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 139.68 87) (end 139.28 87) (width 0.3) (layer F.Cu) (net 1)) + (via (at 139.28 87) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 1)) + (segment (start 135.684597 86.995403) (end 135.789964 86.995403) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 135.68 87) (end 135.684597 86.995403) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 136.432016 86.995403) (end 136.11099 86.995403) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 137.284597 86.995403) (end 136.432016 86.995403) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 137.68 86.6) (end 137.284597 86.995403) (width 0.3) (layer B.Cu) (net 1)) + (via (at 136.11099 86.995403) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 1)) + (segment (start 135.789964 86.995403) (end 136.11099 86.995403) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 137.68 85) (end 137.68 86.6) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 137.68 86.6) (end 137.68 87) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 135.68 87) (end 135.68 86.6) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 135.68 87.4) (end 135.68 87) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 138.88 90.6) (end 138.88 91.09188) (width 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80.2) (end 144.48 79.139865) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 144.48 79.139865) (end 146.255616 77.364249) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 146.255616 77.364249) (end 146.255616 71.865616) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 146.255616 71.865616) (end 145.98 71.59) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 145.98 71.59) (end 145.98 70.6) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 145.98 70.6) (end 145.970211 70.6) (width 0.19) (layer F.Cu) (net 126)) + (segment (start 145.28 81) (end 144.88 80.6) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 144.88 79.263272) (end 146.633336 77.509936) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 146.827001 70.752999) (end 146.98 70.6) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 144.88 80.6) (end 144.88 79.263272) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 146.633336 71.884421) (end 146.827001 71.690756) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 146.633336 77.509936) (end 146.633336 71.884421) (width 0.19) (layer F.Cu) (net 127)) + (segment (start 146.827001 71.690756) (end 146.827001 70.752999) (width 0.19) (layer F.Cu) (net 127)) ) diff --git a/ulx3s.kicad_pcb-bak b/ulx3s.kicad_pcb-bak index e7f3f77..a937fbd 100644 --- a/ulx3s.kicad_pcb-bak +++ b/ulx3s.kicad_pcb-bak @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4) (general - (links 529) - (no_connects 458) - (area 71.010001 43.48 197.572001 118.732339) + (links 551) + (no_connects 415) + (area 93.949999 61.269999 188.230001 112.370001) (thickness 1.6) (drawings 6) - (tracks 623) + (tracks 564) (zones 0) (modules 113) - (nets 170) + (nets 198) ) (page A4) @@ -116,153 +116,181 @@ (net 20 /power/FB2) (net 21 "Net-(D9-Pad1)") (net 22 /power/VBAT) - (net 23 SD_3) - (net 24 JTAG_TDI) - (net 25 JTAG_TCK) - (net 26 JTAG_TMS) - (net 27 JTAG_TDO) - (net 28 /power/WAKEUPn) - (net 29 /power/WKUP) - (net 30 /power/SHUT) - (net 31 /power/WAKE) - (net 32 /power/HOLD) - (net 33 /power/WKn) - (net 34 /power/OSCI_32k) - (net 35 /power/OSCO_32k) - (net 36 FTDI_nSUSPEND) - (net 37 "Net-(Q2-Pad3)") - (net 38 SHUTDOWN) - (net 39 /analog/AUDIO_L) - (net 40 /analog/AUDIO_R) - (net 41 GPDI_5V_SCL) - (net 42 GPDI_5V_SDA) - (net 43 GPDI_SDA) - (net 44 GPDI_SCL) - (net 45 /gpdi/VREF2) - (net 46 /blinkey/BTNPU) - (net 47 SD_CMD) - (net 48 SD_CLK) - (net 49 SD_D0) - (net 50 SD_D1) - (net 51 USB5V) - (net 52 "Net-(BTN0-Pad1)") - (net 53 LED0) - (net 54 LED1) - (net 55 LED2) - (net 56 LED3) - (net 57 LED4) - (net 58 LED5) - (net 59 LED6) - (net 60 LED7) - (net 61 BTN_PWRn) - (net 62 GPDI_CEC) - (net 63 nRESET) - (net 64 /usb/FT3V3) - (net 65 FTDI_nDTR) - (net 66 SDRAM_CKE) - (net 67 SDRAM_A7) - (net 68 SDRAM_D15) - (net 69 SDRAM_BA1) - (net 70 SDRAM_D7) - (net 71 SDRAM_A6) - (net 72 SDRAM_CLK) - (net 73 SDRAM_D13) - (net 74 SDRAM_BA0) - (net 75 SDRAM_D6) - (net 76 SDRAM_A5) - (net 77 SDRAM_D14) - (net 78 SDRAM_A11) - (net 79 SDRAM_D12) - (net 80 SDRAM_D5) - (net 81 SDRAM_A4) - (net 82 SDRAM_A10) - (net 83 SDRAM_D11) - (net 84 SDRAM_A3) - (net 85 SDRAM_D4) - (net 86 SDRAM_D10) - (net 87 SDRAM_D9) - (net 88 SDRAM_A9) - (net 89 SDRAM_D3) - (net 90 SDRAM_D8) - (net 91 SDRAM_A8) - (net 92 SDRAM_A2) - (net 93 SDRAM_A1) - (net 94 SDRAM_A0) - (net 95 SDRAM_D2) - (net 96 SDRAM_D1) - (net 97 SDRAM_D0) - (net 98 SDRAM_DQM0) - (net 99 SDRAM_nCS) - (net 100 SDRAM_nRAS) - (net 101 SDRAM_DQM1) - (net 102 SDRAM_nCAS) - (net 103 SDRAM_nWE) - (net 104 /flash/FLASH_nWP) - (net 105 /flash/FLASH_nHOLD) - (net 106 /flash/FLASH_MOSI) - (net 107 /flash/FLASH_MISO) - (net 108 /flash/FLASH_SCK) - (net 109 /flash/FLASH_nCS) - (net 110 /flash/FPGA_PROGRAMN) - (net 111 /flash/FPGA_DONE) - (net 112 /flash/FPGA_INITN) - (net 113 OLED_MOSI) - (net 114 OLED_RES) - (net 115 OLED_DC) - (net 116 OLED_CS) - (net 117 AUDIO_L3) - (net 118 AUDIO_L2) - (net 119 AUDIO_L1) - (net 120 AUDIO_L0) - (net 121 AUDIO_R3) - (net 122 AUDIO_R2) - (net 123 AUDIO_R1) - (net 124 AUDIO_R0) - (net 125 WIFI_EN) - (net 126 FTDI_nRTS) - (net 127 WIFI_GPIO2) - (net 128 FTDI_TXD) - (net 129 FTDI_RXD) - (net 130 WIFI_RXD) - (net 131 WIFI_GPIO0) - (net 132 FTDI_nCTS) - (net 133 WIFI_TXD) - (net 134 FTDI_nRI) - (net 135 FTDI_nDCD) - (net 136 WIFI_GPIO15) - (net 137 /gpdi/CLK_25MHz) - (net 138 GPDI_ETH-) - (net 139 GPDI_ETH+) - (net 140 GPDI_D2+) - (net 141 GPDI_D2-) - (net 142 GPDI_D1+) - (net 143 GPDI_D1-) - (net 144 GPDI_D0+) - (net 145 GPDI_D0-) - (net 146 GPDI_CLK+) - (net 147 GPDI_CLK-) - (net 148 OLED_CLK) - (net 149 FTDI_nDSR) - (net 150 USB_FPGA_D+) - (net 151 USB_FPGA_D-) - (net 152 USB_FTDI_D+) - (net 153 USB_FTDI_D-) - (net 154 J1_17-) - (net 155 J1_17+) - (net 156 J1_23-) - (net 157 J1_23+) - (net 158 J1_25-) - (net 159 J1_25+) - (net 160 J1_27-) - (net 161 J1_27+) - (net 162 J1_29-) - (net 163 J1_29+) - (net 164 J1_31-) - (net 165 J1_31+) - (net 166 J1_33-) - (net 167 J1_33+) - (net 168 J1_35-) - (net 169 J1_35+) + (net 23 JTAG_TDI) + (net 24 JTAG_TCK) + (net 25 JTAG_TMS) + (net 26 JTAG_TDO) + (net 27 /power/WAKEUPn) + (net 28 /power/WKUP) + (net 29 /power/SHUT) + (net 30 /power/WAKE) + (net 31 /power/HOLD) + (net 32 /power/WKn) + (net 33 /power/OSCI_32k) + (net 34 /power/OSCO_32k) + (net 35 FTDI_nSUSPEND) + (net 36 "Net-(Q2-Pad3)") + (net 37 SHUTDOWN) + (net 38 /analog/AUDIO_L) + (net 39 /analog/AUDIO_R) + (net 40 GPDI_5V_SCL) + (net 41 GPDI_5V_SDA) + (net 42 GPDI_SDA) + (net 43 GPDI_SCL) + (net 44 /gpdi/VREF2) + (net 45 /blinkey/BTNPU) + (net 46 SD_CMD) + (net 47 SD_CLK) + (net 48 SD_D0) + (net 49 SD_D1) + (net 50 USB5V) + (net 51 "Net-(BTN0-Pad1)") + (net 52 GPDI_CEC) + (net 53 nRESET) + (net 54 /usb/FT3V3) + (net 55 FTDI_nDTR) + (net 56 SDRAM_CKE) + (net 57 SDRAM_A7) + (net 58 SDRAM_D15) + (net 59 SDRAM_BA1) + (net 60 SDRAM_D7) + (net 61 SDRAM_A6) + (net 62 SDRAM_CLK) + (net 63 SDRAM_D13) + (net 64 SDRAM_BA0) + (net 65 SDRAM_D6) + (net 66 SDRAM_A5) + (net 67 SDRAM_D14) + (net 68 SDRAM_A11) + (net 69 SDRAM_D12) + (net 70 SDRAM_D5) + (net 71 SDRAM_A4) + (net 72 SDRAM_A10) + (net 73 SDRAM_D11) + (net 74 SDRAM_A3) + (net 75 SDRAM_D4) + (net 76 SDRAM_D10) + (net 77 SDRAM_D9) + (net 78 SDRAM_A9) + (net 79 SDRAM_D3) + (net 80 SDRAM_D8) + (net 81 SDRAM_A8) + (net 82 SDRAM_A2) + (net 83 SDRAM_A1) + (net 84 SDRAM_A0) + (net 85 SDRAM_D2) + (net 86 SDRAM_D1) + (net 87 SDRAM_D0) + (net 88 SDRAM_DQM0) + (net 89 SDRAM_nCS) + (net 90 SDRAM_nRAS) + (net 91 SDRAM_DQM1) + (net 92 SDRAM_nCAS) + (net 93 SDRAM_nWE) + (net 94 /flash/FLASH_nWP) + (net 95 /flash/FLASH_nHOLD) + (net 96 /flash/FLASH_MOSI) + (net 97 /flash/FLASH_MISO) + (net 98 /flash/FLASH_SCK) + (net 99 /flash/FLASH_nCS) + (net 100 /flash/FPGA_PROGRAMN) + (net 101 /flash/FPGA_DONE) + (net 102 /flash/FPGA_INITN) + (net 103 OLED_RES) + (net 104 OLED_DC) + (net 105 OLED_CS) + (net 106 WIFI_EN) + (net 107 FTDI_nRTS) + (net 108 WIFI_GPIO2) + (net 109 FTDI_TXD) + (net 110 FTDI_RXD) + (net 111 WIFI_RXD) + (net 112 WIFI_GPIO0) + (net 113 FTDI_nCTS) + (net 114 WIFI_TXD) + (net 115 FTDI_nRI) + (net 116 FTDI_nDCD) + (net 117 /gpdi/CLK_25MHz) + (net 118 GPDI_ETH-) + (net 119 GPDI_ETH+) + (net 120 GPDI_D2+) + (net 121 GPDI_D2-) + (net 122 GPDI_D1+) + (net 123 GPDI_D1-) + (net 124 GPDI_D0+) + (net 125 GPDI_D0-) + (net 126 GPDI_CLK+) + (net 127 GPDI_CLK-) + (net 128 USB_FPGA_D+) + (net 129 USB_FPGA_D-) + (net 130 USB_FTDI_D+) + (net 131 USB_FTDI_D-) + (net 132 J1_17-) + (net 133 J1_17+) + (net 134 J1_23-) + (net 135 J1_23+) + (net 136 J1_25-) + (net 137 J1_25+) + (net 138 J1_27-) + (net 139 J1_27+) + (net 140 J1_29-) + (net 141 J1_29+) + (net 142 J1_31-) + (net 143 J1_31+) + (net 144 J1_33-) + (net 145 J1_33+) + (net 146 J1_35-) + (net 147 J1_35+) + (net 148 J2_5-) + (net 149 J2_5+) + (net 150 J2_7-) + (net 151 J2_7+) + (net 152 J2_9-) + (net 153 J2_9+) + (net 154 J2_13-) + (net 155 J2_13+) + (net 156 J2_17-) + (net 157 J2_17+) + (net 158 J2_11-) + (net 159 J2_11+) + (net 160 J2_23-) + (net 161 J2_23+) + (net 162 J1_5-) + (net 163 J1_5+) + (net 164 J1_7-) + (net 165 J1_7+) + (net 166 J1_9-) + (net 167 J1_9+) + (net 168 J1_11-) + (net 169 J1_11+) + (net 170 J1_13-) + (net 171 J1_13+) + (net 172 J1_15-) + (net 173 J1_15+) + (net 174 J2_15-) + (net 175 J2_15+) + (net 176 J2_25-) + (net 177 J2_25+) + (net 178 J2_27-) + (net 179 J2_27+) + (net 180 J2_29-) + (net 181 J2_29+) + (net 182 J2_31-) + (net 183 J2_31+) + (net 184 J2_33-) + (net 185 J2_33+) + (net 186 J2_35-) + (net 187 J2_35+) + (net 188 SD_D3) + (net 189 AUDIO_L3) + (net 190 AUDIO_L2) + (net 191 AUDIO_L1) + (net 192 AUDIO_L0) + (net 193 AUDIO_R3) + (net 194 AUDIO_R2) + (net 195 AUDIO_R1) + (net 196 AUDIO_R0) + (net 197 FTDI_nDSR) (net_class Default "This is the default net class." (clearance 0.127) @@ -295,6 +323,15 @@ (add_net /power/WKUP) (add_net /power/WKn) (add_net /usb/FT3V3) + (add_net AUDIO_L0) + (add_net AUDIO_L1) + (add_net AUDIO_L2) + (add_net AUDIO_L3) + (add_net AUDIO_R0) + (add_net AUDIO_R1) + (add_net AUDIO_R2) + (add_net AUDIO_R3) + (add_net FTDI_nDSR) (add_net GND) (add_net "Net-(BTN0-Pad1)") (add_net "Net-(D9-Pad1)") @@ -326,26 +363,16 @@ (add_net /flash/FPGA_INITN) (add_net /flash/FPGA_PROGRAMN) (add_net /gpdi/CLK_25MHz) - (add_net AUDIO_L0) - (add_net AUDIO_L1) - (add_net AUDIO_L2) - (add_net AUDIO_L3) - (add_net AUDIO_R0) - (add_net AUDIO_R1) - (add_net AUDIO_R2) - (add_net AUDIO_R3) (add_net BTN_D) (add_net BTN_F1) (add_net BTN_F2) (add_net BTN_L) - (add_net BTN_PWRn) (add_net BTN_R) (add_net BTN_U) (add_net FTDI_RXD) (add_net FTDI_TXD) (add_net FTDI_nCTS) (add_net FTDI_nDCD) - (add_net FTDI_nDSR) (add_net FTDI_nDTR) (add_net FTDI_nRI) (add_net FTDI_nRTS) @@ -365,6 +392,12 @@ (add_net GPDI_ETH-) (add_net GPDI_SCL) (add_net GPDI_SDA) + (add_net J1_11+) + (add_net J1_11-) + (add_net J1_13+) + (add_net J1_13-) + (add_net J1_15+) + (add_net J1_15-) (add_net J1_17+) (add_net J1_17-) (add_net J1_23+) @@ -381,22 +414,46 @@ (add_net J1_33-) (add_net J1_35+) (add_net J1_35-) + (add_net J1_5+) + (add_net J1_5-) + (add_net J1_7+) + (add_net J1_7-) + (add_net J1_9+) + (add_net J1_9-) + (add_net J2_11+) + (add_net J2_11-) + (add_net J2_13+) + (add_net J2_13-) + (add_net J2_15+) + (add_net J2_15-) + (add_net J2_17+) + (add_net J2_17-) + (add_net J2_23+) + (add_net J2_23-) + (add_net J2_25+) + (add_net J2_25-) + (add_net J2_27+) + (add_net J2_27-) + (add_net J2_29+) + (add_net J2_29-) + (add_net J2_31+) + (add_net J2_31-) + (add_net J2_33+) + (add_net J2_33-) + (add_net J2_35+) + (add_net J2_35-) + (add_net J2_5+) + (add_net J2_5-) + (add_net J2_7+) + (add_net J2_7-) + (add_net J2_9+) + (add_net J2_9-) (add_net JTAG_TCK) (add_net JTAG_TDI) (add_net JTAG_TDO) (add_net JTAG_TMS) - (add_net LED0) - (add_net LED1) - (add_net LED2) - (add_net LED3) - (add_net LED4) - (add_net LED5) - (add_net LED6) - (add_net LED7) - (add_net OLED_CLK) (add_net OLED_CS) (add_net OLED_DC) - (add_net OLED_MOSI) (add_net OLED_RES) (add_net SDRAM_A0) (add_net SDRAM_A1) @@ -436,16 +493,15 @@ (add_net SDRAM_nCS) (add_net SDRAM_nRAS) (add_net SDRAM_nWE) - (add_net SD_3) (add_net SD_CLK) (add_net SD_CMD) (add_net SD_D0) (add_net SD_D1) + (add_net SD_D3) (add_net USB_FPGA_D+) (add_net USB_FPGA_D-) (add_net WIFI_EN) (add_net WIFI_GPIO0) - (add_net WIFI_GPIO15) (add_net WIFI_GPIO2) (add_net WIFI_RXD) (add_net WIFI_TXD) @@ -612,21 +668,21 @@ (fp_line (start -7 15.2) (end -7 0) (layer F.SilkS) (width 0.01016)) (fp_line (start -7 0) (end 7 0) (layer F.SilkS) (width 0.01016)) (pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 23 SD_3)) + (net 188 SD_D3)) (pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 47 SD_CMD)) + (net 46 SD_CMD)) (pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 48 SD_CLK)) + (net 47 SD_CLK)) (pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 49 SD_D0)) + (net 48 SD_D0)) (pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 50 SD_D1)) + (net 49 SD_D1)) (pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask)) (pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask)) (pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask)) @@ -785,9 +841,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -828,9 +884,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -871,9 +927,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -914,9 +970,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -957,9 +1013,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1000,9 +1056,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1042,8 +1098,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 53 LED0)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1086,8 +1141,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 54 LED1)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1130,8 +1184,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 55 LED2)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1174,8 +1227,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 56 LED3)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1218,8 +1270,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 57 LED4)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1262,8 +1313,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 58 LED5)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1306,8 +1356,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 59 LED6)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1350,8 +1399,7 @@ (fp_line (start 1.9 0.95) (end -1.9 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 60 LED7)) + (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1739,7 +1787,7 @@ (pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) - (net 51 USB5V)) + (net 50 USB5V)) (model SMD_Packages.3dshapes/SMD-1206_Pol.wrl (at (xyz 0 0 0)) (scale (xyz 0.17 0.16 0.16)) @@ -1795,9 +1843,9 @@ (fp_line (start -2.54 -1.905) (end -2.54 1.905) (layer B.SilkS) (width 0.15)) (fp_line (start 2.54 -1.905) (end 2.54 1.905) (layer B.SilkS) (width 0.15)) (pad 1 smd oval (at -1.905 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 34 /power/OSCI_32k)) + (net 33 /power/OSCI_32k)) (pad 2 smd oval (at -0.635 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 35 /power/OSCO_32k)) + (net 34 /power/OSCO_32k)) (pad 3 smd oval (at 0.635 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 22 /power/VBAT)) (pad 4 smd oval (at 1.905 -2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) @@ -1805,7 +1853,7 @@ (pad 5 smd oval (at 1.905 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask)) (pad 6 smd oval (at 0.635 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask)) (pad 7 smd oval (at -0.635 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) (pad 8 smd oval (at -1.905 2.794 270) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 16 +2V5)) ) @@ -1835,7 +1883,7 @@ (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (model Capacitors_SMD.3dshapes/C_0805_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1872,9 +1920,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 31 /power/WAKE)) + (net 30 /power/WAKE)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D79A81) @@ -1906,7 +1954,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 /power/HOLD)) + (net 31 /power/HOLD)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -1940,9 +1988,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 SHUTDOWN)) + (net 37 SHUTDOWN)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D7A84D) @@ -1976,7 +2024,7 @@ (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 FTDI_nSUSPEND)) + (net 35 FTDI_nSUSPEND)) ) (module usb_otg:USB-MICRO-B-FCI-10118192-0001LF (layer B.Cu) (tedit 55D9BD68) (tstamp 58D81F93) @@ -2016,11 +2064,11 @@ (pad "" smd rect (at -1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad "" smd rect (at 1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 51 USB5V)) + (net 50 USB5V)) (pad 2 smd rect (at -0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 153 USB_FTDI_D-)) + (net 131 USB_FTDI_D-)) (pad 3 smd rect (at 0 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 152 USB_FTDI_D+)) + (net 130 USB_FTDI_D+)) (pad 4 smd rect (at 0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2067,9 +2115,9 @@ (pad 1 smd rect (at -1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(D9-Pad1)")) (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 151 USB_FPGA_D-)) + (net 129 USB_FPGA_D-)) (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 150 USB_FPGA_D+)) + (net 128 USB_FPGA_D+)) (pad 4 smd rect (at 0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2097,13 +2145,13 @@ (fp_line (start -8.5 -2.5) (end -8.5 2.5) (layer F.SilkS) (width 0.1524)) (fp_line (start -8.5 2.5) (end -7 2.5) (layer F.SilkS) (width 0.1524)) (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -2135,105 +2183,105 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 97 SDRAM_D0)) + (net 87 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 96 SDRAM_D1)) + (net 86 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 95 SDRAM_D2)) + (net 85 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 89 SDRAM_D3)) + (net 79 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_D4)) + (net 75 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D5)) + (net 70 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D6)) + (net 65 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D7)) + (net 60 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 98 SDRAM_DQM0)) + (net 88 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 103 SDRAM_nWE)) + (net 93 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 102 SDRAM_nCAS)) + (net 92 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 100 SDRAM_nRAS)) + (net 90 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 99 SDRAM_nCS)) + (net 89 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_BA0)) + (net 64 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_BA1)) + (net 59 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_A10)) + (net 72 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 94 SDRAM_A0)) + (net 84 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 93 SDRAM_A1)) + (net 83 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 92 SDRAM_A2)) + (net 82 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_A3)) + (net 74 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_A4)) + (net 71 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A5)) + (net 66 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A6)) + (net 61 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A7)) + (net 57 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 91 SDRAM_A8)) + (net 81 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 88 SDRAM_A9)) + (net 78 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_A11)) + (net 68 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_CKE)) + (net 56 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_CLK)) + (net 62 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 101 SDRAM_DQM1)) + (net 91 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 90 SDRAM_D8)) + (net 80 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 87 SDRAM_D9)) + (net 77 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_D10)) + (net 76 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_D11)) + (net 73 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D12)) + (net 69 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D13)) + (net 63 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_D14)) + (net 67 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D15)) + (net 58 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -2268,11 +2316,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 33 /power/WKn)) + (net 32 /power/WKn)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2305,11 +2353,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 37 "Net-(Q2-Pad3)")) + (net 36 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2439,7 +2487,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl @@ -2472,7 +2520,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 31 /power/WAKE)) + (net 30 /power/WAKE)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2538,7 +2586,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 /power/HOLD)) + (net 31 /power/HOLD)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2571,7 +2619,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -2604,9 +2652,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 33 /power/WKn)) + (net 32 /power/WKn)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2639,7 +2687,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 /blinkey/BTNPU)) + (net 45 /blinkey/BTNPU)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2672,7 +2720,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 37 "Net-(Q2-Pad3)")) + (net 36 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2703,9 +2751,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 63 nRESET)) + (net 53 nRESET)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2736,9 +2784,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 FTDI_nSUSPEND)) + (net 35 FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 65 FTDI_nDTR)) + (net 55 FTDI_nDTR)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2769,7 +2817,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 SHUTDOWN)) + (net 37 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -3000,9 +3048,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 117 AUDIO_L3)) + (net 189 AUDIO_L3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3033,9 +3081,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 118 AUDIO_L2)) + (net 190 AUDIO_L2)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3066,9 +3114,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 119 AUDIO_L1)) + (net 191 AUDIO_L1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3099,9 +3147,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 120 AUDIO_L0)) + (net 192 AUDIO_L0)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 /analog/AUDIO_L)) + (net 38 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3132,9 +3180,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 121 AUDIO_R3)) + (net 193 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3165,9 +3213,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 122 AUDIO_R2)) + (net 194 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3198,9 +3246,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 123 AUDIO_R1)) + (net 195 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3231,9 +3279,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 124 AUDIO_R0)) + (net 196 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /analog/AUDIO_R)) + (net 39 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3243,7 +3291,7 @@ (module lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm (layer F.Cu) (tedit 58D8FE92) (tstamp 58D8D57E) (at 138.48 87.8) - (path /56AC389C/56AC4242) + (path /56AC389C/58F23D91) (attr smd) (fp_text reference U1 (at -7.6 -9.2) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) @@ -3257,211 +3305,211 @@ (fp_line (start -8.4 -8.4) (end -8.4 8.4) (layer F.SilkS) (width 0.15)) (fp_line (start -7.6 -8.4) (end -8.4 -7.6) (layer F.SilkS) (width 0.15)) (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 140 J1_29-) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 191 AUDIO_L1) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 136 J1_25-) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 137 J1_25+) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 162 J1_5-) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 138 J1_27-) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 139 J1_27+) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 133 J1_17+) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 168 J1_11-) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 169 J1_11+) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 BTN_PWRn) (solder_mask_margin 0.04)) + (net 186 J2_35-) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 LED6) (solder_mask_margin 0.04)) + (net 187 J2_35+) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 GPDI_D2+) (solder_mask_margin 0.04)) + (net 120 GPDI_D2+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 GPDI_D1+) (solder_mask_margin 0.04)) + (net 122 GPDI_D1+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_D) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 GPDI_CLK+) (solder_mask_margin 0.04)) + (net 126 GPDI_CLK+) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 GPDI_CEC) (solder_mask_margin 0.04)) + (net 52 GPDI_CEC) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 141 J1_29+) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 195 AUDIO_R1) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 135 J1_23+) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 192 AUDIO_L0) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 163 J1_5+) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 173 J1_15+) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 164 J1_7-) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 132 J1_17-) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 166 J1_9-) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) + (net 117 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 GPDI_ETH+) (solder_mask_margin 0.04)) + (net 119 GPDI_ETH+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 184 J2_33-) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 GPDI_D1-) (solder_mask_margin 0.04)) + (net 123 GPDI_D1-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 GPDI_D0+) (solder_mask_margin 0.04)) + (net 124 GPDI_D0+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 43 GPDI_SDA) (solder_mask_margin 0.04)) + (net 42 GPDI_SDA) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 GPDI_CLK-) (solder_mask_margin 0.04)) + (net 127 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 44 GPDI_SCL) (solder_mask_margin 0.04)) + (net 43 GPDI_SCL) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 190 AUDIO_L2) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 134 J1_23-) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 196 AUDIO_R0) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 170 J1_13-) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 171 J1_13+) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 172 J1_15-) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 165 J1_7+) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 167 J1_9+) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 LED7) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 GPDI_ETH-) (solder_mask_margin 0.04)) + (net 118 GPDI_ETH-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 GPDI_D2-) (solder_mask_margin 0.04)) + (net 121 GPDI_D2-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 185 J2_33+) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_L) (solder_mask_margin 0.04)) + (net 182 J2_31-) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 GPDI_D0-) (solder_mask_margin 0.04)) + (net 125 GPDI_D0-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 156 J2_17-) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D15) (solder_mask_margin 0.04)) + (net 58 SDRAM_D15) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 194 AUDIO_R2) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 J1_29+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 J1_23+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 J1_27+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 J1_25+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 J1_17-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U) (solder_mask_margin 0.04)) (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 180 J2_29-) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_F2) (solder_mask_margin 0.04)) + (net 160 J2_23-) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_F1) (solder_mask_margin 0.04)) + (net 178 J2_27-) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 13 BTN_R) (solder_mask_margin 0.04)) + (net 176 J2_25-) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 LED2) (solder_mask_margin 0.04)) + (net 183 J2_31+) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 157 J2_17+) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 174 J2_15-) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_D14) (solder_mask_margin 0.04)) + (net 67 SDRAM_D14) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D13) (solder_mask_margin 0.04)) + (net 63 SDRAM_D13) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 J1_31+) (solder_mask_margin 0.04)) + (net 143 J1_31+) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 J1_29-) (solder_mask_margin 0.04)) - (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) + (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) + (net 189 AUDIO_L3) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 J1_23-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 J1_27-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 J1_25-) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 J1_17+) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 LED1) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 53 LED0) (solder_mask_margin 0.04)) + (net 181 J2_29+) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 LED5) (solder_mask_margin 0.04)) + (net 161 J2_23+) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 LED4) (solder_mask_margin 0.04)) + (net 179 J2_27+) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 LED3) (solder_mask_margin 0.04)) + (net 177 J2_25+) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 175 J2_15+) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 75 SDRAM_D4) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D12) (solder_mask_margin 0.04)) + (net 69 SDRAM_D12) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_D11) (solder_mask_margin 0.04)) + (net 73 SDRAM_D11) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 WIFI_RXD) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 J1_33+) (solder_mask_margin 0.04)) + (net 145 J1_33+) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 J1_31-) (solder_mask_margin 0.04)) + (net 142 J1_31-) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 193 AUDIO_R3) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3485,23 +3533,23 @@ (pad F16 smd circle (at 4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 154 J2_13-) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 70 SDRAM_D5) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_D10) (solder_mask_margin 0.04)) + (net 76 SDRAM_D10) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 87 SDRAM_D9) (solder_mask_margin 0.04)) + (net 77 SDRAM_D9) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 133 WIFI_TXD) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 FTDI_RXD) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 J1_33-) (solder_mask_margin 0.04)) + (net 144 J1_33-) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 169 J1_35+) (solder_mask_margin 0.04)) + (net 147 J1_35+) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3527,19 +3575,19 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D5) (solder_mask_margin 0.04)) + (net 155 J2_13+) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 SDRAM_D8) (solder_mask_margin 0.04)) + (net 80 SDRAM_D8) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 91 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 65 FTDI_nDTR) (solder_mask_margin 0.04)) + (net 112 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 FTDI_TXD) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 168 J1_35-) (solder_mask_margin 0.04)) + (net 146 J1_35-) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3567,21 +3615,21 @@ (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_D4) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 62 SDRAM_CLK) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 125 WIFI_EN) (solder_mask_margin 0.04)) + (net 113 FTDI_nCTS) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 114 WIFI_TXD) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 132 FTDI_nCTS) (solder_mask_margin 0.04)) + (net 111 WIFI_RXD) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 WIFI_GPIO2) (solder_mask_margin 0.04)) + (net 110 FTDI_RXD) (solder_mask_margin 0.04)) (pad J6 smd circle (at -3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3607,21 +3655,21 @@ (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 SDRAM_D3) (solder_mask_margin 0.04)) + (net 79 SDRAM_D3) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 56 SDRAM_CKE) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_A11) (solder_mask_margin 0.04)) + (net 68 SDRAM_A11) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 107 FTDI_nRTS) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 FTDI_nDSR) (solder_mask_margin 0.04)) + (net 108 WIFI_GPIO2) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 131 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 109 FTDI_TXD) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 FTDI_nRI) (solder_mask_margin 0.04)) + (net 103 OLED_RES) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 OLED_MOSI) (solder_mask_margin 0.04)) + (net 104 OLED_DC) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3647,21 +3695,21 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 SDRAM_D2) (solder_mask_margin 0.04)) + (net 85 SDRAM_D2) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 88 SDRAM_A9) (solder_mask_margin 0.04)) + (net 78 SDRAM_A9) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 SDRAM_A8) (solder_mask_margin 0.04)) + (net 81 SDRAM_A8) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 AUDIO_R0) (solder_mask_margin 0.04)) + (net 48 SD_D0) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 116 OLED_CS) (solder_mask_margin 0.04)) + (net 116 FTDI_nDCD) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 FTDI_nDCD) (solder_mask_margin 0.04)) + (net 106 WIFI_EN) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 OLED_CLK) (solder_mask_margin 0.04)) + (net 197 FTDI_nDSR) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3683,21 +3731,21 @@ (pad L15 smd circle (at 3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L16 smd circle (at 4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SD_D0) (solder_mask_margin 0.04)) + (net 158 J2_11-) (solder_mask_margin 0.04)) (pad L17 smd circle (at 5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 159 J2_11+) (solder_mask_margin 0.04)) (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 SDRAM_D1) (solder_mask_margin 0.04)) + (net 86 SDRAM_D1) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A7) (solder_mask_margin 0.04)) + (net 57 SDRAM_A7) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A6) (solder_mask_margin 0.04)) + (net 61 SDRAM_A6) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 AUDIO_L1) (solder_mask_margin 0.04)) + (net 46 SD_CMD) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 150 USB_FPGA_D+) (solder_mask_margin 0.04)) + (net 129 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3725,23 +3773,23 @@ (pad M16 smd circle (at 4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 151 J2_7+) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 SDRAM_D0) (solder_mask_margin 0.04)) + (net 87 SDRAM_D0) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A5) (solder_mask_margin 0.04)) + (net 66 SDRAM_A5) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_A4) (solder_mask_margin 0.04)) + (net 71 SDRAM_A4) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 AUDIO_L0) (solder_mask_margin 0.04)) + (net 47 SD_CLK) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 AUDIO_R1) (solder_mask_margin 0.04)) + (net 49 SD_D1) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 151 USB_FPGA_D-) (solder_mask_margin 0.04)) + (net 128 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 105 OLED_CS) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 OLED_DC) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad N6 smd circle (at -3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N7 smd circle (at -2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3763,25 +3811,25 @@ (pad N15 smd circle (at 3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 150 J2_7-) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 47 SD_CMD) (solder_mask_margin 0.04)) + (net 152 J2_9-) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D6) (solder_mask_margin 0.04)) + (net 65 SDRAM_D6) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_A3) (solder_mask_margin 0.04)) + (net 74 SDRAM_A3) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 SDRAM_A2) (solder_mask_margin 0.04)) + (net 82 SDRAM_A2) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 AUDIO_R3) (solder_mask_margin 0.04)) + (net 188 SD_D3) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 117 AUDIO_L3) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 AUDIO_R2) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 AUDIO_L2) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 OLED_RES) (solder_mask_margin 0.04)) + (net 115 FTDI_nRI) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3803,35 +3851,35 @@ (pad P15 smd circle (at 3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P16 smd circle (at 4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 153 J2_9+) (solder_mask_margin 0.04)) (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D7) (solder_mask_margin 0.04)) + (net 60 SDRAM_D7) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 SDRAM_A1) (solder_mask_margin 0.04)) + (net 83 SDRAM_A1) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 SDRAM_A0) (solder_mask_margin 0.04)) + (net 84 SDRAM_A0) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 99 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 24 JTAG_TDI) (solder_mask_margin 0.04)) + (net 23 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 48 SD_CLK) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SD_D1) (solder_mask_margin 0.04)) + (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 88 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_A10) (solder_mask_margin 0.04)) + (net 72 SDRAM_A10) (solder_mask_margin 0.04)) (pad T1 smd circle (at -7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T2 smd circle (at -6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3841,7 +3889,7 @@ (pad T4 smd circle (at -5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T5 smd circle (at -4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 25 JTAG_TCK) (solder_mask_margin 0.04)) + (net 24 JTAG_TCK) (solder_mask_margin 0.04)) (pad T6 smd circle (at -3.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad T7 smd circle (at -2.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3865,23 +3913,23 @@ (pad T16 smd circle (at 4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 92 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 93 SDRAM_nWE) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 59 SDRAM_BA1) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 64 SDRAM_BA0) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 98 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 26 JTAG_TMS) (solder_mask_margin 0.04)) + (net 25 JTAG_TMS) (solder_mask_margin 0.04)) (pad U6 smd circle (at -3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U7 smd circle (at -2.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3905,21 +3953,21 @@ (pad U16 smd circle (at 4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 149 J2_5+) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 148 J2_5-) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 89 SDRAM_nCS) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 90 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 97 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 102 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 27 JTAG_TDO) (solder_mask_margin 0.04)) + (net 26 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad V6 smd circle (at -3.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3955,9 +4003,9 @@ (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 96 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 110 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 100 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3995,7 +4043,7 @@ (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 101 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4064,41 +4112,41 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 138 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 118 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 139 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 119 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 140 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 120 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 141 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 121 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 142 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 122 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 143 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 123 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 144 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 124 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 145 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 125 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 146 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 126 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 147 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 127 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 62 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 52 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 41 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 40 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 42 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 41 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) @@ -4134,19 +4182,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 109 /flash/FLASH_nCS)) + (net 99 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 107 /flash/FLASH_MISO)) + (net 97 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 104 /flash/FLASH_nWP)) + (net 94 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 106 /flash/FLASH_MOSI)) + (net 96 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 108 /flash/FLASH_SCK)) + (net 98 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 105 /flash/FLASH_nHOLD)) + (net 95 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -4222,17 +4270,17 @@ (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_SCL)) + (net 43 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_SDA)) + (net 42 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 42 GPDI_5V_SDA)) + (net 41 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 41 GPDI_5V_SCL)) + (net 40 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4269,7 +4317,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKUP)) + (net 28 /power/WKUP)) (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) ) @@ -4305,7 +4353,7 @@ (pad 1 smd rect (at -1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.05 0) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 30 /power/SHUT)) + (net 29 /power/SHUT)) ) (module ESP32-footprints-Lib:ESP-32S (layer B.Cu) (tedit 58152DB7) (tstamp 58E56AFE) @@ -4333,37 +4381,35 @@ (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 WIFI_TXD)) + (net 114 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 130 WIFI_RXD)) + (net 111 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 26 JTAG_TMS)) + (net 25 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 27 JTAG_TDO)) + (net 26 JTAG_TDO)) (pad 31 smd oval (at 8.947434 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 24 JTAG_TDI)) + (net 23 JTAG_TDI)) (pad 30 smd oval (at 8.947434 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 25 JTAG_TCK)) + (net 24 JTAG_TCK)) (pad 29 smd oval (at 8.947434 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 28 smd oval (at 8.947434 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 WIFI_GPIO0)) + (net 112 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 127 WIFI_GPIO2)) - (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 136 WIFI_GPIO15)) + (net 108 WIFI_GPIO2)) + (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 50 SD_D1)) + (net 49 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 49 SD_D0)) + (net 48 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 48 SD_CLK)) + (net 47 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 47 SD_CMD)) - (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 23 SD_3)) + (net 46 SD_CMD)) + (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 16 smd oval (at -4.497566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) (pad 15 smd oval (at -5.767566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) @@ -4379,7 +4425,7 @@ (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4493,22 +4539,34 @@ (net 1 GND)) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 162 J1_5-)) + (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 163 J1_5+)) + (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 164 J1_7-)) + (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 165 J1_7+)) + (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 166 J1_9-)) + (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 167 J1_9+)) + (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 168 J1_11-)) + (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 169 J1_11+)) + (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 170 J1_13-)) + (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 171 J1_13+)) + (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 172 J1_15-)) + (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 173 J1_15+)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 154 J1_17-)) + (net 132 J1_17-)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 155 J1_17+)) + (net 133 J1_17+)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4518,33 +4576,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 156 J1_23-)) + (net 134 J1_23-)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 157 J1_23+)) + (net 135 J1_23+)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 158 J1_25-)) + (net 136 J1_25-)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 159 J1_25+)) + (net 137 J1_25+)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 160 J1_27-)) + (net 138 J1_27-)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 161 J1_27+)) + (net 139 J1_27+)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 162 J1_29-)) + (net 140 J1_29-)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 163 J1_29+)) + (net 141 J1_29+)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 164 J1_31-)) + (net 142 J1_31-)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 165 J1_31+)) + (net 143 J1_31+)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 166 J1_33-)) + (net 144 J1_33-)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 167 J1_33+)) + (net 145 J1_33+)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 168 J1_35-)) + (net 146 J1_35-)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 169 J1_35+)) + (net 147 J1_35+)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4666,20 +4724,34 @@ (net 1 GND)) (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 148 J2_5-)) + (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 149 J2_5+)) + (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 150 J2_7-)) + (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 151 J2_7+)) + (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 152 J2_9-)) + (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 153 J2_9+)) + (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 158 J2_11-)) + (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 159 J2_11+)) + (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 154 J2_13-)) + (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 155 J2_13+)) + (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 174 J2_15-)) + (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 175 J2_15+)) + (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 156 J2_17-)) + (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 157 J2_17+)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4688,20 +4760,34 @@ (net 1 GND)) (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) - (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) - (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)) + (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 160 J2_23-)) + (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 161 J2_23+)) + (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 176 J2_25-)) + (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 177 J2_25+)) + (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 178 J2_27-)) + (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 179 J2_27+)) + (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 180 J2_29-)) + (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 181 J2_29+)) + (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 182 J2_31-)) + (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 183 J2_31+)) + (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 184 J2_33-)) + (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 185 J2_33+)) + (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 186 J2_35-)) + (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) + (net 187 J2_35+)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4819,9 +4905,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -4857,9 +4943,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/WAKEUPn)) + (net 27 /power/WAKEUPn)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58E794D9) @@ -4891,9 +4977,8 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) - (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 61 BTN_PWRn)) + (net 51 "Net-(BTN0-Pad1)")) + (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 58E794DF) @@ -4921,7 +5006,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 52 "Net-(BTN0-Pad1)")) + (net 51 "Net-(BTN0-Pad1)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4954,7 +5039,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_SDA)) + (net 42 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4987,7 +5072,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_SCL)) + (net 43 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5020,7 +5105,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 45 /gpdi/VREF2)) + (net 44 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5053,7 +5138,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 41 GPDI_5V_SCL)) + (net 40 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5086,7 +5171,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 GPDI_5V_SDA)) + (net 41 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5121,45 +5206,45 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 65 FTDI_nDTR)) + (net 55 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 126 FTDI_nRTS)) + (net 107 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (pad 4 smd rect (at -2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 129 FTDI_RXD)) + (net 110 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 134 FTDI_nRI)) + (net 115 FTDI_nRI)) (pad 6 smd rect (at -2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 149 FTDI_nDSR)) + (net 197 FTDI_nDSR)) (pad 8 smd rect (at -2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 135 FTDI_nDCD)) + (net 116 FTDI_nDCD)) (pad 9 smd rect (at -2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 FTDI_nCTS)) + (net 113 FTDI_nCTS)) (pad 10 smd rect (at -2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 27 JTAG_TDO)) + (net 26 JTAG_TDO)) (pad 11 smd rect (at 2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 152 USB_FTDI_D+)) + (net 130 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 153 USB_FTDI_D-)) + (net 131 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 64 /usb/FT3V3)) + (net 54 /usb/FT3V3)) (pad 14 smd rect (at 2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 63 nRESET)) + (net 53 nRESET)) (pad 15 smd rect (at 2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 17 smd rect (at 2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 24 JTAG_TDI)) + (net 23 JTAG_TDI)) (pad 18 smd rect (at 2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 25 JTAG_TCK)) + (net 24 JTAG_TCK)) (pad 19 smd rect (at 2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 26 JTAG_TMS)) + (net 25 JTAG_TMS)) (pad 20 smd rect (at 2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 128 FTDI_TXD)) + (net 109 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5192,7 +5277,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 104 /flash/FLASH_nWP)) + (net 94 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5225,7 +5310,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 105 /flash/FLASH_nHOLD)) + (net 95 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5258,7 +5343,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 106 /flash/FLASH_MOSI)) + (net 96 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5291,7 +5376,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 107 /flash/FLASH_MISO)) + (net 97 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5324,7 +5409,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 108 /flash/FLASH_SCK)) + (net 98 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5357,7 +5442,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 109 /flash/FLASH_nCS)) + (net 99 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5390,7 +5475,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 /flash/FPGA_PROGRAMN)) + (net 100 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5423,7 +5508,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 111 /flash/FPGA_DONE)) + (net 101 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5456,7 +5541,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 112 /flash/FPGA_INITN)) + (net 102 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5489,7 +5574,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5527,11 +5612,11 @@ (fp_line (start 0.9 1.8) (end -0.9 1.8) (layer B.SilkS) (width 0.15)) (fp_line (start -2.7 0.4) (end -2.7 -0.4) (layer B.SilkS) (width 0.15)) (pad 4 smd rect (at -2 1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask) - (net 35 /power/OSCO_32k)) + (net 34 /power/OSCO_32k)) (pad 3 smd rect (at 2 1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask)) (pad 2 smd rect (at 2 -1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -2 -1.2) (size 1.8 1.2) (layers B.Cu B.Paste B.Mask) - (net 34 /power/OSCI_32k)) + (net 33 /power/OSCI_32k)) ) (module oscxo:Crystal_SMD_7050_4Pads (layer B.Cu) (tedit 58EE0D05) (tstamp 58EE1137) @@ -5569,7 +5654,7 @@ (pad 2 smd rect (at 3.15 -1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) - (net 137 /gpdi/CLK_25MHz)) + (net 117 /gpdi/CLK_25MHz)) (pad 4 smd rect (at -3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -5597,7 +5682,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 125 WIFI_EN)) + (net 106 WIFI_EN)) (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl @@ -5672,16 +5757,14 @@ (net 1 GND)) (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) - (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 148 OLED_CLK)) - (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 113 OLED_MOSI)) + (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)) + (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 114 OLED_RES)) + (net 103 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 115 OLED_DC)) + (net 104 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 116 OLED_CS)) + (net 105 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5718,628 +5801,569 @@ (gr_line (start 188.08 112.22) (end 188.08 61.42) (layer Edge.Cuts) (width 0.3)) (gr_line (start 94.1 112.22) (end 188.08 112.22) (layer Edge.Cuts) (width 0.3)) + (segment (start 141.037856 87) (end 141.042859 86.994997) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 139.28 87) (end 141.037856 87) (width 0.3) (layer B.Cu) (net 1)) + (segment (start 141.042859 86.837141) (end 141.042859 86.994997) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 141.28 86.6) (end 141.042859 86.837141) (width 0.3) (layer F.Cu) (net 1)) + (via (at 141.042859 86.994997) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 1)) + (segment (start 139.68 87) (end 139.68 89) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 139.68 86.6) (end 139.68 87) (width 0.3) (layer F.Cu) (net 1)) + (segment (start 139.68 87) (end 139.28 87) (width 0.3) (layer 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-395,33 +395,17 @@ Text GLabel 8650 1650 0 60 Input ~ 0 WIFI_GPIO2 Text GLabel 8650 1750 0 60 Input ~ 0 WIFI_GPIO15 -Text GLabel 8650 1850 0 60 Input ~ 0 +Text GLabel 8650 1950 0 60 Input ~ 0 WIFI_EN -Text GLabel 8650 2550 0 60 Input ~ 0 -AUDIO_L0 -Text GLabel 8650 2650 0 60 Input ~ 0 -AUDIO_L1 -Text GLabel 8650 2750 0 60 Input ~ 0 -AUDIO_L2 -Text GLabel 8650 2850 0 60 Input ~ 0 -AUDIO_L3 -Text GLabel 10150 2550 2 60 Input ~ 0 -AUDIO_R0 -Text GLabel 10150 2650 2 60 Input ~ 0 -AUDIO_R1 -Text GLabel 10150 2750 2 60 Input ~ 0 -AUDIO_R2 -Text GLabel 10150 2850 2 60 Input ~ 0 -AUDIO_R3 -Text GLabel 8650 2150 0 60 Input ~ 0 -OLED_RES Text GLabel 8650 2050 0 60 Input ~ 0 +OLED_RES +Text GLabel 8650 1850 0 60 Input ~ 0 OLED_MOSI -Text GLabel 8650 1950 0 60 Input ~ 0 +Text GLabel 10150 1850 2 60 Input ~ 0 OLED_CLK -Text GLabel 8650 2250 0 60 Input ~ 0 +Text GLabel 10150 2050 2 60 Input ~ 0 OLED_DC -Text GLabel 8650 2350 0 60 Input ~ 0 +Text GLabel 8650 2150 0 60 Input ~ 0 OLED_CS Text GLabel 10150 2450 2 60 Input ~ 0 USB_FPGA_D- @@ -438,4 +422,20 @@ F 3 "" H 8350 3000 60 0000 C CNN 5 9400 2050 1 0 0 -1 $EndComp +Text GLabel 8650 2550 0 60 Input ~ 0 +SD_D0 +Text GLabel 8650 2650 0 60 Input ~ 0 +SD_D1 +Text GLabel 8650 2750 0 60 Input ~ 0 +SD_D2 +Text GLabel 8650 2850 0 60 Input ~ 0 +SD_D3 +Text GLabel 10150 2550 2 60 Input ~ 0 +SD_CLK +Text GLabel 10150 2650 2 60 Input ~ 0 +SD_CMD +Text GLabel 10150 2750 2 60 Input ~ 0 +SD_WP +Text GLabel 10150 2850 2 60 Input ~ 0 +SD_CD $EndSCHEMATC diff --git a/usb.sch b/usb.sch index 348f023..358f820 100644 --- a/usb.sch +++ b/usb.sch @@ -379,11 +379,11 @@ Text GLabel 10150 1650 2 60 Input ~ 0 FTDI_nCTS Text GLabel 10150 1750 2 60 Input ~ 0 FTDI_nDTR -Text GLabel 10150 1950 2 60 Input ~ 0 +Text GLabel 10150 2350 2 60 Input ~ 0 FTDI_nDCD -Text GLabel 10150 1850 2 60 Input ~ 0 +Text GLabel 10150 1950 2 60 Input ~ 0 FTDI_nDSR -Text GLabel 10150 2050 2 60 Input ~ 0 +Text GLabel 10150 2150 2 60 Input ~ 0 FTDI_nRI Text GLabel 8650 1350 0 60 Input ~ 0 WIFI_TXD @@ -395,33 +395,17 @@ Text GLabel 8650 1650 0 60 Input ~ 0 WIFI_GPIO2 Text GLabel 8650 1750 0 60 Input ~ 0 WIFI_GPIO15 -Text GLabel 8650 1850 0 60 Input ~ 0 +Text GLabel 8650 1950 0 60 Input ~ 0 WIFI_EN -Text GLabel 8650 2550 0 60 Input ~ 0 -AUDIO_L0 -Text GLabel 8650 2650 0 60 Input ~ 0 -AUDIO_L1 -Text GLabel 8650 2750 0 60 Input ~ 0 -AUDIO_L2 -Text GLabel 8650 2850 0 60 Input ~ 0 -AUDIO_L3 -Text GLabel 10150 2550 2 60 Input ~ 0 -AUDIO_R0 -Text GLabel 10150 2650 2 60 Input ~ 0 -AUDIO_R1 -Text GLabel 10150 2750 2 60 Input ~ 0 -AUDIO_R2 -Text GLabel 10150 2850 2 60 Input ~ 0 -AUDIO_R3 -Text GLabel 8650 2150 0 60 Input ~ 0 -OLED_RES Text GLabel 8650 2050 0 60 Input ~ 0 +OLED_RES +Text GLabel 8650 1850 0 60 Input ~ 0 OLED_MOSI -Text GLabel 8650 1950 0 60 Input ~ 0 +Text GLabel 10150 1850 2 60 Input ~ 0 OLED_CLK -Text GLabel 8650 2250 0 60 Input ~ 0 +Text GLabel 10150 2050 2 60 Input ~ 0 OLED_DC -Text GLabel 8650 2350 0 60 Input ~ 0 +Text GLabel 8650 2150 0 60 Input ~ 0 OLED_CS Text GLabel 10150 2450 2 60 Input ~ 0 USB_FPGA_D- @@ -438,4 +422,20 @@ F 3 "" H 8350 3000 60 0000 C CNN 5 9400 2050 1 0 0 -1 $EndComp +Text GLabel 8650 2550 0 60 Input ~ 0 +SD_D0 +Text GLabel 8650 2650 0 60 Input ~ 0 +SD_D1 +Text GLabel 8650 2750 0 60 Input ~ 0 +SD_D2 +Text GLabel 8650 2850 0 60 Input ~ 0 +SD_D3 +Text GLabel 10150 2550 2 60 Input ~ 0 +SD_CLK +Text GLabel 10150 2650 2 60 Input ~ 0 +SD_CMD +Text GLabel 10150 2750 2 60 Input ~ 0 +SD_WP +Text GLabel 10150 2850 2 60 Input ~ 0 +SD_CD $EndSCHEMATC