From 32bd7673a847ea4a68a6375606bc87b14913a20b Mon Sep 17 00:00:00 2001
From: davor <davor@ssd.lan>
Date: Tue, 27 Feb 2018 23:57:44 +0100
Subject: [PATCH] schematics: v1.7.14

---
 ulx3s.sch | 2 +-
 usb.bak   | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/ulx3s.sch b/ulx3s.sch
index 68e00e2..4a85d2b 100644
--- a/ulx3s.sch
+++ b/ulx3s.sch
@@ -49,7 +49,7 @@ encoding utf-8
 Sheet 1 11
 Title "ULX3S"
 Date ""
-Rev "1.7.12"
+Rev "1.7.14"
 Comp "FER+RIZ+RADIONA"
 Comment1 "Root sheet"
 Comment2 ""
diff --git a/usb.bak b/usb.bak
index b9d35ae..b8e95e5 100644
--- a/usb.bak
+++ b/usb.bak
@@ -754,10 +754,6 @@ Wire Wire Line
 	2400 4650 2750 4650
 Wire Wire Line
 	2400 5250 2750 5250
-Text Label 2450 5250 0    60   ~ 0
-FPD-
-Text Label 2450 4650 0    60   ~ 0
-FPD+
 Text Notes 650  4450 0    60   ~ 0
 USB pull lines connected to\nBANK0 on "gpio" sheet
 $Comp
@@ -832,4 +828,8 @@ Wire Wire Line
 	2600 2850 2600 2900
 Wire Wire Line
 	2700 2750 2700 2900
+Text GLabel 2750 4650 2    60   Input ~ 0
+USB_FPGA_D+
+Text GLabel 2750 5250 2    60   Input ~ 0
+USB_FPGA_D-
 $EndSCHEMATC