From 483906c0527bb44253e203a2ac67776c33838611 Mon Sep 17 00:00:00 2001 From: Emard Date: Tue, 14 Nov 2017 18:31:43 +0100 Subject: [PATCH] PCB: change according to schematics 1.2V->1.1V --- ulx3s.kicad_pcb | 8920 +++++++++++++++++++++--------------------- ulx3s.kicad_pcb-bak | 8926 +++++++++++++++++++++---------------------- 2 files changed, 8923 insertions(+), 8923 deletions(-) diff --git a/ulx3s.kicad_pcb b/ulx3s.kicad_pcb index 0578ec7..78512b0 100644 --- a/ulx3s.kicad_pcb +++ b/ulx3s.kicad_pcb @@ -3,7 +3,7 @@ (general (links 722) (no_connects 0) - (area 71.010001 43.48 197.572001 118.732339) + (area 93.949999 61.269999 188.230001 112.370001) (thickness 1.6) (drawings 361) (tracks 4280) @@ -41,7 +41,7 @@ (setup (last_trace_width 0.3) (trace_clearance 0.127) - (zone_clearance 0.254) + (zone_clearance 0.127) (zone_45_only no) (trace_min 0.127) (segment_width 0.2) @@ -99,250 +99,250 @@ (net 3 /gpio/IN5V) (net 4 /gpio/OUT5V) (net 5 +3V3) - (net 6 +1V2) - (net 7 BTN_D) - (net 8 BTN_F1) - (net 9 BTN_F2) - (net 10 BTN_L) - (net 11 BTN_R) - (net 12 BTN_U) - (net 13 /power/FB1) - (net 14 +2V5) - (net 15 /power/PWREN) - (net 16 /power/FB3) - (net 17 /power/FB2) - (net 18 "Net-(D9-Pad1)") - (net 19 /power/VBAT) - (net 20 JTAG_TDI) - (net 21 JTAG_TCK) - (net 22 JTAG_TMS) - (net 23 JTAG_TDO) - (net 24 /power/WAKEUPn) - (net 25 /power/WKUP) - (net 26 /power/SHUT) - (net 27 /power/WAKE) - (net 28 /power/HOLD) - (net 29 /power/WKn) - (net 30 /power/OSCI_32k) - (net 31 /power/OSCO_32k) - (net 32 "Net-(Q2-Pad3)") - (net 33 SHUTDOWN) - (net 34 /analog/AUDIO_L) - (net 35 /analog/AUDIO_R) - (net 36 GPDI_5V_SCL) - (net 37 GPDI_5V_SDA) - (net 38 GPDI_SDA) - (net 39 GPDI_SCL) - (net 40 /gpdi/VREF2) - (net 41 SD_CMD) - (net 42 SD_CLK) - (net 43 SD_D0) - (net 44 SD_D1) - (net 45 USB5V) - (net 46 GPDI_CEC) - (net 47 nRESET) - (net 48 FTDI_nDTR) - (net 49 SDRAM_CKE) - (net 50 SDRAM_A7) - (net 51 SDRAM_D15) - (net 52 SDRAM_BA1) - (net 53 SDRAM_D7) - (net 54 SDRAM_A6) - (net 55 SDRAM_CLK) - (net 56 SDRAM_D13) - (net 57 SDRAM_BA0) - (net 58 SDRAM_D6) - (net 59 SDRAM_A5) - (net 60 SDRAM_D14) - (net 61 SDRAM_A11) - (net 62 SDRAM_D12) - (net 63 SDRAM_D5) - (net 64 SDRAM_A4) - (net 65 SDRAM_A10) - (net 66 SDRAM_D11) - (net 67 SDRAM_A3) - (net 68 SDRAM_D4) - (net 69 SDRAM_D10) - (net 70 SDRAM_D9) - (net 71 SDRAM_A9) - (net 72 SDRAM_D3) - (net 73 SDRAM_D8) - (net 74 SDRAM_A8) - (net 75 SDRAM_A2) - (net 76 SDRAM_A1) - (net 77 SDRAM_A0) - (net 78 SDRAM_D2) - (net 79 SDRAM_D1) - (net 80 SDRAM_D0) - (net 81 SDRAM_DQM0) - (net 82 SDRAM_nCS) - (net 83 SDRAM_nRAS) - (net 84 SDRAM_DQM1) - (net 85 SDRAM_nCAS) - (net 86 SDRAM_nWE) - (net 87 /flash/FLASH_nWP) - (net 88 /flash/FLASH_nHOLD) - (net 89 /flash/FLASH_MOSI) - (net 90 /flash/FLASH_MISO) - (net 91 /flash/FLASH_SCK) - (net 92 /flash/FLASH_nCS) - (net 93 /flash/FPGA_PROGRAMN) - (net 94 /flash/FPGA_DONE) - (net 95 /flash/FPGA_INITN) - (net 96 OLED_RES) - (net 97 OLED_DC) - (net 98 OLED_CS) - (net 99 WIFI_EN) - (net 100 FTDI_nRTS) - (net 101 FTDI_TXD) - (net 102 FTDI_RXD) - (net 103 WIFI_RXD) - (net 104 WIFI_GPIO0) - (net 105 WIFI_TXD) - (net 106 GPDI_ETH-) - (net 107 GPDI_ETH+) - (net 108 GPDI_D2+) - (net 109 GPDI_D2-) - (net 110 GPDI_D1+) - (net 111 GPDI_D1-) - (net 112 GPDI_D0+) - (net 113 GPDI_D0-) - (net 114 GPDI_CLK+) - (net 115 GPDI_CLK-) - (net 116 USB_FTDI_D+) - (net 117 USB_FTDI_D-) - (net 118 J1_17-) - (net 119 J1_17+) - (net 120 J1_23-) - (net 121 J1_23+) - (net 122 J1_25-) - (net 123 J1_25+) - (net 124 J1_27-) - (net 125 J1_27+) - (net 126 J1_29-) - (net 127 J1_29+) - (net 128 J1_31-) - (net 129 J1_31+) - (net 130 J1_33-) - (net 131 J1_33+) - (net 132 J1_35-) - (net 133 J1_35+) - (net 134 J2_5-) - (net 135 J2_5+) - (net 136 J2_7-) - (net 137 J2_7+) - (net 138 J2_9-) - (net 139 J2_9+) - (net 140 J2_13-) - (net 141 J2_13+) - (net 142 J2_17-) - (net 143 J2_17+) - (net 144 J2_11-) - (net 145 J2_11+) - (net 146 J2_23-) - (net 147 J2_23+) - (net 148 J1_5-) - (net 149 J1_5+) - (net 150 J1_7-) - (net 151 J1_7+) - (net 152 J1_9-) - (net 153 J1_9+) - (net 154 J1_11-) - (net 155 J1_11+) - (net 156 J1_13-) - (net 157 J1_13+) - (net 158 J1_15-) - (net 159 J1_15+) - (net 160 J2_15-) - (net 161 J2_15+) - (net 162 J2_25-) - (net 163 J2_25+) - (net 164 J2_27-) - (net 165 J2_27+) - (net 166 J2_29-) - (net 167 J2_29+) - (net 168 J2_31-) - (net 169 J2_31+) - (net 170 J2_33-) - (net 171 J2_33+) - (net 172 J2_35-) - (net 173 J2_35+) - (net 174 SD_D3) - (net 175 AUDIO_L3) - (net 176 AUDIO_L2) - (net 177 AUDIO_L1) - (net 178 AUDIO_L0) - (net 179 AUDIO_R3) - (net 180 AUDIO_R2) - (net 181 AUDIO_R1) - (net 182 AUDIO_R0) - (net 183 OLED_CLK) - (net 184 OLED_MOSI) - (net 185 LED0) - (net 186 LED1) - (net 187 LED2) - (net 188 LED3) - (net 189 LED4) - (net 190 LED5) - (net 191 LED6) - (net 192 LED7) - (net 193 BTN_PWRn) - (net 194 FTDI_nTXLED) - (net 195 FTDI_nSLEEP) - (net 196 /blinkey/LED_PWREN) - (net 197 /blinkey/LED_TXLED) - (net 198 FT3V3) - (net 199 /sdcard/SD3V3) - (net 200 SD_D2) - (net 201 CLK_25MHz) - (net 202 /blinkey/BTNPUL) - (net 203 /blinkey/BTNPUR) - (net 204 USB_FPGA_D+) - (net 205 /power/FTDI_nSUSPEND) - (net 206 /blinkey/ALED0) - (net 207 /blinkey/ALED1) - (net 208 /blinkey/ALED2) - (net 209 /blinkey/ALED3) - (net 210 /blinkey/ALED4) - (net 211 /blinkey/ALED5) - (net 212 /blinkey/ALED6) - (net 213 /blinkey/ALED7) - (net 214 /usb/FTD-) - (net 215 /usb/FTD+) - (net 216 ADC_MISO) - (net 217 ADC_MOSI) - (net 218 ADC_CSn) - (net 219 ADC_SCLK) - (net 220 "Net-(R51-Pad2)") - (net 221 SW3) - (net 222 SW2) - (net 223 SW1) - (net 224 SW0) - (net 225 USB_FPGA_D-) - (net 226 /usb/FPD+) - (net 227 /usb/FPD-) - (net 228 WIFI_GPIO16) - (net 229 WIFI_GPIO15) - (net 230 /usb/ANT_433MHz) - (net 231 /power/PWRBTn) - (net 232 PROG_DONE) - (net 233 /power/P1V2) - (net 234 /power/P3V3) - (net 235 /power/P2V5) - (net 236 /power/L1) - (net 237 /power/L3) - (net 238 /power/L2) - (net 239 FTDI_TXDEN) - (net 240 /wifi/WIFIOFF) - (net 241 SDRAM_A12) - (net 242 /analog/AUDIO_V) - (net 243 AUDIO_V3) - (net 244 AUDIO_V2) - (net 245 AUDIO_V1) - (net 246 AUDIO_V0) - (net 247 /gpdi/FPGA_CEC) - (net 248 /blinkey/LED_WIFI) - (net 249 WIFI_GPIO2) + (net 6 BTN_D) + (net 7 BTN_F1) + (net 8 BTN_F2) + (net 9 BTN_L) + (net 10 BTN_R) + (net 11 BTN_U) + (net 12 /power/FB1) + (net 13 +2V5) + (net 14 /power/PWREN) + (net 15 /power/FB3) + (net 16 /power/FB2) + (net 17 "Net-(D9-Pad1)") + (net 18 /power/VBAT) + (net 19 JTAG_TDI) + (net 20 JTAG_TCK) + (net 21 JTAG_TMS) + (net 22 JTAG_TDO) + (net 23 /power/WAKEUPn) + (net 24 /power/WKUP) + (net 25 /power/SHUT) + (net 26 /power/WAKE) + (net 27 /power/HOLD) + (net 28 /power/WKn) + (net 29 /power/OSCI_32k) + (net 30 /power/OSCO_32k) + (net 31 "Net-(Q2-Pad3)") + (net 32 SHUTDOWN) + (net 33 /analog/AUDIO_L) + (net 34 /analog/AUDIO_R) + (net 35 GPDI_5V_SCL) + (net 36 GPDI_5V_SDA) + (net 37 GPDI_SDA) + (net 38 GPDI_SCL) + (net 39 /gpdi/VREF2) + (net 40 SD_CMD) + (net 41 SD_CLK) + (net 42 SD_D0) + (net 43 SD_D1) + (net 44 USB5V) + (net 45 GPDI_CEC) + (net 46 nRESET) + (net 47 FTDI_nDTR) + (net 48 SDRAM_CKE) + (net 49 SDRAM_A7) + (net 50 SDRAM_D15) + (net 51 SDRAM_BA1) + (net 52 SDRAM_D7) + (net 53 SDRAM_A6) + (net 54 SDRAM_CLK) + (net 55 SDRAM_D13) + (net 56 SDRAM_BA0) + (net 57 SDRAM_D6) + (net 58 SDRAM_A5) + (net 59 SDRAM_D14) + (net 60 SDRAM_A11) + (net 61 SDRAM_D12) + (net 62 SDRAM_D5) + (net 63 SDRAM_A4) + (net 64 SDRAM_A10) + (net 65 SDRAM_D11) + (net 66 SDRAM_A3) + (net 67 SDRAM_D4) + (net 68 SDRAM_D10) + (net 69 SDRAM_D9) + (net 70 SDRAM_A9) + (net 71 SDRAM_D3) + (net 72 SDRAM_D8) + (net 73 SDRAM_A8) + (net 74 SDRAM_A2) + (net 75 SDRAM_A1) + (net 76 SDRAM_A0) + (net 77 SDRAM_D2) + (net 78 SDRAM_D1) + (net 79 SDRAM_D0) + (net 80 SDRAM_DQM0) + (net 81 SDRAM_nCS) + (net 82 SDRAM_nRAS) + (net 83 SDRAM_DQM1) + (net 84 SDRAM_nCAS) + (net 85 SDRAM_nWE) + (net 86 /flash/FLASH_nWP) + (net 87 /flash/FLASH_nHOLD) + (net 88 /flash/FLASH_MOSI) + (net 89 /flash/FLASH_MISO) + (net 90 /flash/FLASH_SCK) + (net 91 /flash/FLASH_nCS) + (net 92 /flash/FPGA_PROGRAMN) + (net 93 /flash/FPGA_DONE) + (net 94 /flash/FPGA_INITN) + (net 95 OLED_RES) + (net 96 OLED_DC) + (net 97 OLED_CS) + (net 98 WIFI_EN) + (net 99 FTDI_nRTS) + (net 100 FTDI_TXD) + (net 101 FTDI_RXD) + (net 102 WIFI_RXD) + (net 103 WIFI_GPIO0) + (net 104 WIFI_TXD) + (net 105 GPDI_ETH-) + (net 106 GPDI_ETH+) + (net 107 GPDI_D2+) + (net 108 GPDI_D2-) + (net 109 GPDI_D1+) + (net 110 GPDI_D1-) + (net 111 GPDI_D0+) + (net 112 GPDI_D0-) + (net 113 GPDI_CLK+) + (net 114 GPDI_CLK-) + (net 115 USB_FTDI_D+) + (net 116 USB_FTDI_D-) + (net 117 J1_17-) + (net 118 J1_17+) + (net 119 J1_23-) + (net 120 J1_23+) + (net 121 J1_25-) + (net 122 J1_25+) + (net 123 J1_27-) + (net 124 J1_27+) + (net 125 J1_29-) + (net 126 J1_29+) + (net 127 J1_31-) + (net 128 J1_31+) + (net 129 J1_33-) + (net 130 J1_33+) + (net 131 J1_35-) + (net 132 J1_35+) + (net 133 J2_5-) + (net 134 J2_5+) + (net 135 J2_7-) + (net 136 J2_7+) + (net 137 J2_9-) + (net 138 J2_9+) + (net 139 J2_13-) + (net 140 J2_13+) + (net 141 J2_17-) + (net 142 J2_17+) + (net 143 J2_11-) + (net 144 J2_11+) + (net 145 J2_23-) + (net 146 J2_23+) + (net 147 J1_5-) + (net 148 J1_5+) + (net 149 J1_7-) + (net 150 J1_7+) + (net 151 J1_9-) + (net 152 J1_9+) + (net 153 J1_11-) + (net 154 J1_11+) + (net 155 J1_13-) + (net 156 J1_13+) + (net 157 J1_15-) + (net 158 J1_15+) + (net 159 J2_15-) + (net 160 J2_15+) + (net 161 J2_25-) + (net 162 J2_25+) + (net 163 J2_27-) + (net 164 J2_27+) + (net 165 J2_29-) + (net 166 J2_29+) + (net 167 J2_31-) + (net 168 J2_31+) + (net 169 J2_33-) + (net 170 J2_33+) + (net 171 J2_35-) + (net 172 J2_35+) + (net 173 SD_D3) + (net 174 AUDIO_L3) + (net 175 AUDIO_L2) + (net 176 AUDIO_L1) + (net 177 AUDIO_L0) + (net 178 AUDIO_R3) + (net 179 AUDIO_R2) + (net 180 AUDIO_R1) + (net 181 AUDIO_R0) + (net 182 OLED_CLK) + (net 183 OLED_MOSI) + (net 184 LED0) + (net 185 LED1) + (net 186 LED2) + (net 187 LED3) + (net 188 LED4) + (net 189 LED5) + (net 190 LED6) + (net 191 LED7) + (net 192 BTN_PWRn) + (net 193 FTDI_nTXLED) + (net 194 FTDI_nSLEEP) + (net 195 /blinkey/LED_PWREN) + (net 196 /blinkey/LED_TXLED) + (net 197 FT3V3) + (net 198 /sdcard/SD3V3) + (net 199 SD_D2) + (net 200 CLK_25MHz) + (net 201 /blinkey/BTNPUL) + (net 202 /blinkey/BTNPUR) + (net 203 USB_FPGA_D+) + (net 204 /power/FTDI_nSUSPEND) + (net 205 /blinkey/ALED0) + (net 206 /blinkey/ALED1) + (net 207 /blinkey/ALED2) + (net 208 /blinkey/ALED3) + (net 209 /blinkey/ALED4) + (net 210 /blinkey/ALED5) + (net 211 /blinkey/ALED6) + (net 212 /blinkey/ALED7) + (net 213 /usb/FTD-) + (net 214 /usb/FTD+) + (net 215 ADC_MISO) + (net 216 ADC_MOSI) + (net 217 ADC_CSn) + (net 218 ADC_SCLK) + (net 219 "Net-(R51-Pad2)") + (net 220 SW3) + (net 221 SW2) + (net 222 SW1) + (net 223 SW0) + (net 224 USB_FPGA_D-) + (net 225 /usb/FPD+) + (net 226 /usb/FPD-) + (net 227 WIFI_GPIO16) + (net 228 WIFI_GPIO15) + (net 229 /usb/ANT_433MHz) + (net 230 /power/PWRBTn) + (net 231 PROG_DONE) + (net 232 /power/P3V3) + (net 233 /power/P2V5) + (net 234 /power/L1) + (net 235 /power/L3) + (net 236 /power/L2) + (net 237 FTDI_TXDEN) + (net 238 /wifi/WIFIOFF) + (net 239 SDRAM_A12) + (net 240 /analog/AUDIO_V) + (net 241 AUDIO_V3) + (net 242 AUDIO_V2) + (net 243 AUDIO_V1) + (net 244 AUDIO_V0) + (net 245 /gpdi/FPGA_CEC) + (net 246 /blinkey/LED_WIFI) + (net 247 WIFI_GPIO2) + (net 248 /power/P1V1) + (net 249 +1V1) (net_class Default "This is the default net class." (clearance 0.127) @@ -351,7 +351,7 @@ (via_drill 0.2) (uvia_dia 0.3) (uvia_drill 0.1) - (add_net +1V2) + (add_net +1V1) (add_net +2V5) (add_net +3V3) (add_net +5V) @@ -384,7 +384,7 @@ (add_net /power/L3) (add_net /power/OSCI_32k) (add_net /power/OSCO_32k) - (add_net /power/P1V2) + (add_net /power/P1V1) (add_net /power/P2V5) (add_net /power/P3V3) (add_net /power/PWRBTn) @@ -727,33 +727,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 148 J1_5-)) + (net 147 J1_5-)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 149 J1_5+)) + (net 148 J1_5+)) (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 150 J1_7-)) + (net 149 J1_7-)) (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 151 J1_7+)) + (net 150 J1_7+)) (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 152 J1_9-)) + (net 151 J1_9-)) (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 153 J1_9+)) + (net 152 J1_9+)) (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 154 J1_11-)) + (net 153 J1_11-)) (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 155 J1_11+)) + (net 154 J1_11+)) (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 156 J1_13-)) + (net 155 J1_13-)) (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 157 J1_13+)) + (net 156 J1_13+)) (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 158 J1_15-)) + (net 157 J1_15-)) (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 159 J1_15+)) + (net 158 J1_15+)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 118 J1_17-)) + (net 117 J1_17-)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 119 J1_17+)) + (net 118 J1_17+)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -763,33 +763,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 120 J1_23-)) + (net 119 J1_23-)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 121 J1_23+)) + (net 120 J1_23+)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 122 J1_25-)) + (net 121 J1_25-)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 123 J1_25+)) + (net 122 J1_25+)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 124 J1_27-)) + (net 123 J1_27-)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 125 J1_27+)) + (net 124 J1_27+)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 126 J1_29-)) + (net 125 J1_29-)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 127 J1_29+)) + (net 126 J1_29+)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 128 J1_31-)) + (net 127 J1_31-)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 129 J1_31+)) + (net 128 J1_31+)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 130 J1_33-)) + (net 129 J1_33-)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 131 J1_33+)) + (net 130 J1_33+)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 132 J1_35-)) + (net 131 J1_35-)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 133 J1_35+)) + (net 132 J1_35+)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -817,7 +817,7 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 0.5 0.5) (layers B.Cu F.Paste F.Mask) - (net 230 /usb/ANT_433MHz)) + (net 229 /usb/ANT_433MHz)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 590C5C33) @@ -843,7 +843,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -871,9 +871,9 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 6 +1V2)) + (net 249 +1V1)) ) (module ESP32-footprints-Lib:ESP-32S (layer B.Cu) (tedit 59DF4284) (tstamp 58E56AFE) @@ -907,69 +907,69 @@ (pad 38 smd oval (at 8.947434 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 232 PROG_DONE)) + (net 231 PROG_DONE)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 105 WIFI_TXD)) + (net 104 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 103 WIFI_RXD)) + (net 102 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 31 smd oval (at 8.947434 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (pad 30 smd oval (at 8.947434 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 29 smd oval (at 8.947434 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 28 smd oval (at 8.947434 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 228 WIFI_GPIO16)) + (net 227 WIFI_GPIO16)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 104 WIFI_GPIO0)) + (net 103 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 249 WIFI_GPIO2)) + (net 247 WIFI_GPIO2)) (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 229 WIFI_GPIO15)) + (net 228 WIFI_GPIO15)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 44 SD_D1)) + (net 43 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 43 SD_D0)) + (net 42 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 42 SD_CLK)) + (net 41 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 41 SD_CMD)) + (net 40 SD_CMD)) (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 174 SD_D3)) + (net 173 SD_D3)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 200 SD_D2)) + (net 199 SD_D2)) (pad 16 smd oval (at -4.497566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 124 J1_27-)) + (net 123 J1_27-)) (pad 15 smd oval (at -5.767566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 14 smd oval (at -9.052566 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 J1_27+)) + (net 124 J1_27+)) (pad 13 smd oval (at -9.052566 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 126 J1_29-)) + (net 125 J1_29-)) (pad 12 smd oval (at -9.052566 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 127 J1_29+)) + (net 126 J1_29+)) (pad 11 smd oval (at -9.052566 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 128 J1_31-)) + (net 127 J1_31-)) (pad 10 smd oval (at -9.052566 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 129 J1_31+)) + (net 128 J1_31+)) (pad 9 smd oval (at -9.052566 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 130 J1_33-)) + (net 129 J1_33-)) (pad 8 smd oval (at -9.052566 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 J1_33+)) + (net 130 J1_33+)) (pad 7 smd oval (at -9.052566 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 132 J1_35-)) + (net 131 J1_35-)) (pad 6 smd oval (at -9.052566 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 J1_35+)) + (net 132 J1_35+)) (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -1051,7 +1051,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1082,9 +1082,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 236 /power/L1)) + (net 234 /power/L1)) (pad 2 smd rect (at 2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1107,15 +1107,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 236 /power/L1)) + (net 234 /power/L1)) (pad 4 smd rect (at 0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1146,9 +1146,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 237 /power/L3)) + (net 235 /power/L3)) (pad 2 smd rect (at 2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1171,15 +1171,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 237 /power/L3)) + (net 235 /power/L3)) (pad 4 smd rect (at 0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1210,9 +1210,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 238 /power/L2)) + (net 236 /power/L2)) (pad 2 smd rect (at 2 0) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1235,15 +1235,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 238 /power/L2)) + (net 236 /power/L2)) (pad 4 smd rect (at 0.95 1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1307,7 +1307,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1340,7 +1340,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1406,7 +1406,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1439,7 +1439,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1505,7 +1505,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1538,7 +1538,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1566,19 +1566,19 @@ (fp_line (start -2.54 -1.905) (end -2.54 1.905) (layer B.SilkS) (width 0.15)) (fp_line (start 2.54 -1.905) (end 2.54 1.905) (layer B.SilkS) (width 0.15)) (pad 1 smd oval (at -1.905 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 30 /power/OSCI_32k)) + (net 29 /power/OSCI_32k)) (pad 2 smd oval (at -0.635 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 31 /power/OSCO_32k)) + (net 30 /power/OSCO_32k)) (pad 3 smd oval (at 0.635 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 4 smd oval (at 1.905 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd oval (at 1.905 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (pad 6 smd oval (at 0.635 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (pad 7 smd oval (at -0.635 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (pad 8 smd oval (at -1.905 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -1613,7 +1613,7 @@ (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model Capacitors_SMD.3dshapes/C_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1645,106 +1645,106 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D0)) + (net 79 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D1)) + (net 78 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_D2)) + (net 77 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_D3)) + (net 71 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D4)) + (net 67 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D5)) + (net 62 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D6)) + (net 57 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D7)) + (net 52 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_DQM0)) + (net 80 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_nWE)) + (net 85 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_nCAS)) + (net 84 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_nRAS)) + (net 82 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_nCS)) + (net 81 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_BA0)) + (net 56 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA1)) + (net 51 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_A10)) + (net 64 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_A0)) + (net 76 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A1)) + (net 75 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_A2)) + (net 74 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A3)) + (net 66 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_A4)) + (net 63 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A5)) + (net 58 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A6)) + (net 53 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_A7)) + (net 49 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_A8)) + (net 73 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A9)) + (net 70 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_A11)) + (net 60 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 241 SDRAM_A12)) + (net 239 SDRAM_A12)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_CKE)) + (net 48 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_CLK)) + (net 54 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_DQM1)) + (net 83 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D8)) + (net 72 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D9)) + (net 69 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_D10)) + (net 68 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_D11)) + (net 65 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_D12)) + (net 61 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_D13)) + (net 55 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_D14)) + (net 59 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D15)) + (net 50 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -1784,11 +1784,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKn)) + (net 28 /power/WKn)) (pad 2 smd rect (at -1.5 -0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 3 smd rect (at 1.5 0 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1821,11 +1821,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 32 "Net-(Q2-Pad3)")) + (net 31 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1856,9 +1856,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1889,9 +1889,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1922,9 +1922,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1955,7 +1955,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl @@ -1988,9 +1988,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 27 /power/WAKE)) + (net 26 /power/WAKE)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2021,7 +2021,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2054,9 +2054,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/HOLD)) + (net 27 /power/HOLD)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2087,7 +2087,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2120,9 +2120,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKn)) + (net 28 /power/WKn)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2155,7 +2155,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2186,9 +2186,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 "Net-(Q2-Pad3)")) + (net 31 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2219,9 +2219,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 47 nRESET)) + (net 46 nRESET)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2252,9 +2252,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 205 /power/FTDI_nSUSPEND)) + (net 204 /power/FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2285,7 +2285,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 33 SHUTDOWN)) + (net 32 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2318,9 +2318,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2351,9 +2351,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2384,9 +2384,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2403,7 +2403,7 @@ (fp_text reference RB1 (at 3.302 0 270) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (fp_text value 15k (at 3.302 -0.127 270) (layer B.Fab) + (fp_text value 18k (at 3.302 -0.127 270) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) @@ -2419,7 +2419,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2452,7 +2452,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2490,7 +2490,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2521,9 +2521,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 175 AUDIO_L3)) + (net 174 AUDIO_L3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2554,9 +2554,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 176 AUDIO_L2)) + (net 175 AUDIO_L2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2587,9 +2587,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 177 AUDIO_L1)) + (net 176 AUDIO_L1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2620,9 +2620,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 178 AUDIO_L0)) + (net 177 AUDIO_L0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2653,9 +2653,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 179 AUDIO_R3)) + (net 178 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2686,9 +2686,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 180 AUDIO_R2)) + (net 179 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2719,9 +2719,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 181 AUDIO_R1)) + (net 180 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2752,9 +2752,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 182 AUDIO_R0)) + (net 181 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2791,19 +2791,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 92 /flash/FLASH_nCS)) + (net 91 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 90 /flash/FLASH_MISO)) + (net 89 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 87 /flash/FLASH_nWP)) + (net 86 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 89 /flash/FLASH_MOSI)) + (net 88 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 91 /flash/FLASH_SCK)) + (net 90 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 88 /flash/FLASH_nHOLD)) + (net 87 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -2836,7 +2836,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl @@ -2879,17 +2879,17 @@ (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 37 GPDI_5V_SDA)) + (net 36 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 36 GPDI_5V_SCL)) + (net 35 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3004,33 +3004,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 134 J2_5-)) + (net 133 J2_5-)) (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 135 J2_5+)) + (net 134 J2_5+)) (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 136 J2_7-)) + (net 135 J2_7-)) (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 137 J2_7+)) + (net 136 J2_7+)) (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 138 J2_9-)) + (net 137 J2_9-)) (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 139 J2_9+)) + (net 138 J2_9+)) (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 144 J2_11-)) + (net 143 J2_11-)) (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 145 J2_11+)) + (net 144 J2_11+)) (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 140 J2_13-)) + (net 139 J2_13-)) (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 141 J2_13+)) + (net 140 J2_13+)) (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 160 J2_15-)) + (net 159 J2_15-)) (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 161 J2_15+)) + (net 160 J2_15+)) (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 142 J2_17-)) + (net 141 J2_17-)) (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 143 J2_17+)) + (net 142 J2_17+)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -3040,33 +3040,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 146 J2_23-)) + (net 145 J2_23-)) (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 147 J2_23+)) + (net 146 J2_23+)) (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 162 J2_25-)) + (net 161 J2_25-)) (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 163 J2_25+)) + (net 162 J2_25+)) (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 164 J2_27-)) + (net 163 J2_27-)) (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 165 J2_27+)) + (net 164 J2_27+)) (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 166 J2_29-)) + (net 165 J2_29-)) (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 167 J2_29+)) + (net 166 J2_29+)) (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 168 J2_31-)) + (net 167 J2_31-)) (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 169 J2_31+)) + (net 168 J2_31+)) (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 170 J2_33-)) + (net 169 J2_33-)) (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 171 J2_33+)) + (net 170 J2_33+)) (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 172 J2_35-)) + (net 171 J2_35-)) (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 173 J2_35+)) + (net 172 J2_35+)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -3175,7 +3175,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3208,7 +3208,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3241,7 +3241,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3274,7 +3274,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3307,7 +3307,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 GPDI_5V_SCL)) + (net 35 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3340,7 +3340,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 37 GPDI_5V_SDA)) + (net 36 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3375,44 +3375,44 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 48 FTDI_nDTR)) + (net 47 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 100 FTDI_nRTS)) + (net 99 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (pad 4 smd rect (at -2.9 0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 102 FTDI_RXD)) + (net 101 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 6 smd rect (at -2.9 -0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 7 smd rect (at -2.9 -0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 8 smd rect (at -2.9 -1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 9 smd rect (at -2.9 -2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (pad 10 smd rect (at -2.9 -2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 194 FTDI_nTXLED)) + (net 193 FTDI_nTXLED)) (pad 11 smd rect (at 2.9 -2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 116 USB_FTDI_D+)) + (net 115 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 117 USB_FTDI_D-)) + (net 116 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (pad 14 smd rect (at 2.9 -0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 47 nRESET)) + (net 46 nRESET)) (pad 15 smd rect (at 2.9 -0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 17 smd rect (at 2.9 0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask)) (pad 18 smd rect (at 2.9 1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 239 FTDI_TXDEN)) + (net 237 FTDI_TXDEN)) (pad 19 smd rect (at 2.9 2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (pad 20 smd rect (at 2.9 2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 101 FTDI_TXD)) + (net 100 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3445,7 +3445,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 87 /flash/FLASH_nWP)) + (net 86 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3483,7 +3483,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 88 /flash/FLASH_nHOLD)) + (net 87 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3516,7 +3516,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 89 /flash/FLASH_MOSI)) + (net 88 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3549,7 +3549,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 90 /flash/FLASH_MISO)) + (net 89 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3582,7 +3582,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 91 /flash/FLASH_SCK)) + (net 90 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3615,7 +3615,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 92 /flash/FLASH_nCS)) + (net 91 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3648,7 +3648,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 93 /flash/FPGA_PROGRAMN)) + (net 92 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3681,7 +3681,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 94 /flash/FPGA_DONE)) + (net 93 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3714,7 +3714,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 95 /flash/FPGA_INITN)) + (net 94 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3747,7 +3747,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3790,7 +3790,7 @@ (pad 2 smd rect (at 3.15 1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 -1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) - (net 201 CLK_25MHz)) + (net 200 CLK_25MHz)) (pad 4 smd rect (at -3.15 -1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (model Crystals.3dshapes/Crystal_SMD_SeikoEpson_MC306-4pin_8.0x3.2mm_HandSoldering.wrl @@ -3823,7 +3823,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 240 /wifi/WIFIOFF)) + (net 238 /wifi/WIFIOFF)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl @@ -3856,9 +3856,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 240 /wifi/WIFIOFF)) + (net 238 /wifi/WIFIOFF)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3889,7 +3889,7 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 196 /blinkey/LED_PWREN)) + (net 195 /blinkey/LED_PWREN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -3922,9 +3922,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 194 FTDI_nTXLED)) + (net 193 FTDI_nTXLED)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 197 /blinkey/LED_TXLED)) + (net 196 /blinkey/LED_TXLED)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3971,11 +3971,11 @@ (pad 6 smd rect (at 1.2 0 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 45 USB5V)) + (net 44 USB5V)) (pad 2 smd rect (at -0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 214 /usb/FTD-)) + (net 213 /usb/FTD-)) (pad 3 smd rect (at 0 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 215 /usb/FTD+)) + (net 214 /usb/FTD+)) (pad 4 smd rect (at 0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 1 GND)) @@ -4029,11 +4029,11 @@ (pad 6 smd rect (at 1.2 0 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 18 "Net-(D9-Pad1)")) + (net 17 "Net-(D9-Pad1)")) (pad 2 smd rect (at -0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 3 smd rect (at 0 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 4 smd rect (at 0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 1 GND)) @@ -4106,7 +4106,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4137,7 +4137,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -4176,13 +4176,13 @@ (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 3 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x03.wrl (at (xyz 0.1 -0.05 0)) (scale (xyz 1 1 1)) @@ -4213,9 +4213,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 185 LED0)) + (net 184 LED0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 206 /blinkey/ALED0)) + (net 205 /blinkey/ALED0)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4251,9 +4251,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 186 LED1)) + (net 185 LED1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 207 /blinkey/ALED1)) + (net 206 /blinkey/ALED1)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4289,9 +4289,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 187 LED2)) + (net 186 LED2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 208 /blinkey/ALED2)) + (net 207 /blinkey/ALED2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4327,9 +4327,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 188 LED3)) + (net 187 LED3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 209 /blinkey/ALED3)) + (net 208 /blinkey/ALED3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4365,9 +4365,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 189 LED4)) + (net 188 LED4)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 210 /blinkey/ALED4)) + (net 209 /blinkey/ALED4)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4403,9 +4403,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 190 LED5)) + (net 189 LED5)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 211 /blinkey/ALED5)) + (net 210 /blinkey/ALED5)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4441,9 +4441,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 191 LED6)) + (net 190 LED6)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 212 /blinkey/ALED6)) + (net 211 /blinkey/ALED6)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4479,9 +4479,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 192 LED7)) + (net 191 LED7)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 213 /blinkey/ALED7)) + (net 212 /blinkey/ALED7)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4517,7 +4517,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 270) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 6 +1V2)) + (net 249 +1V1)) (pad 2 smd rect (at 1.25 0 270) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -4550,7 +4550,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 14 +2V5)) + (net 13 +2V5)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -4649,9 +4649,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 117 USB_FTDI_D-)) + (net 116 USB_FTDI_D-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 214 /usb/FTD-)) + (net 213 /usb/FTD-)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4682,9 +4682,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 116 USB_FTDI_D+)) + (net 115 USB_FTDI_D+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 215 /usb/FTD+)) + (net 214 /usb/FTD+)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4721,15 +4721,15 @@ (fp_line (start 2.625 2.625) (end 1.875 2.625) (layer F.SilkS) (width 0.15)) (fp_line (start 2.625 -2.625) (end 1.875 -2.625) (layer F.SilkS) (width 0.15)) (pad 1 smd oval (at -2.45 -1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 137 J2_7+)) + (net 136 J2_7+)) (pad 2 smd oval (at -2.45 -1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 138 J2_9-)) + (net 137 J2_9-)) (pad 3 smd oval (at -2.45 -0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 139 J2_9+)) + (net 138 J2_9+)) (pad 4 smd oval (at -2.45 0 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 144 J2_11-)) + (net 143 J2_11-)) (pad 5 smd oval (at -2.45 0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 145 J2_11+)) + (net 144 J2_11+)) (pad 6 smd oval (at -2.45 1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd oval (at -2.45 1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) @@ -4756,24 +4756,24 @@ (pad 18 smd oval (at 2.45 0 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 19 smd oval (at 2.45 -0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 219 ADC_SCLK)) + (net 218 ADC_SCLK)) (pad 20 smd oval (at 2.45 -1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 218 ADC_CSn)) + (net 217 ADC_CSn)) (pad 21 smd oval (at 2.45 -1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 217 ADC_MOSI)) + (net 216 ADC_MOSI)) (pad 22 smd oval (at 1.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 23 smd oval (at 1 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 24 smd oval (at 0.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 216 ADC_MISO)) + (net 215 ADC_MISO)) (pad 25 smd oval (at 0 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)) (pad 26 smd oval (at -0.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 134 J2_5-)) + (net 133 J2_5-)) (pad 27 smd oval (at -1 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 135 J2_5+)) + (net 134 J2_5+)) (pad 28 smd oval (at -1.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 136 J2_7-)) + (net 135 J2_7-)) (pad 29 smd rect (at 0.8375 0.8375 180) (size 1.675 1.675) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_paste_margin_ratio -0.2)) (pad 29 smd rect (at 0.8375 -0.8375 180) (size 1.675 1.675) (layers F.Cu F.Paste F.Mask) @@ -4815,9 +4815,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 225 USB_FPGA_D-)) + (net 224 USB_FPGA_D-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4851,9 +4851,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 204 USB_FPGA_D+)) + (net 203 USB_FPGA_D+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4927,15 +4927,15 @@ (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 183 OLED_CLK)) + (net 182 OLED_CLK)) (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 184 OLED_MOSI)) + (net 183 OLED_MOSI)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 96 OLED_RES)) + (net 95 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 97 OLED_DC)) + (net 96 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 98 OLED_CS)) + (net 97 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4969,12 +4969,12 @@ (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -5020,43 +5020,43 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 108 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 107 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 109 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 108 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 110 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 109 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 111 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 110 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 112 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 111 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 113 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 112 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 114 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 113 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 115 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 114 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 46 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 45 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 107 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 106 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 36 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 35 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 37 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 36 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 106 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 105 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) ) @@ -5096,9 +5096,9 @@ (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl @@ -5141,13 +5141,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1)) + (net 7 BTN_F1)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1)) + (net 7 BTN_F1)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5188,13 +5188,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2)) + (net 8 BTN_F2)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2)) + (net 8 BTN_F2)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5235,13 +5235,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U)) + (net 11 BTN_U)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U)) + (net 11 BTN_U)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5282,13 +5282,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D)) + (net 6 BTN_D)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D)) + (net 6 BTN_D)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5329,13 +5329,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L)) + (net 9 BTN_L)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L)) + (net 9 BTN_L)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5376,13 +5376,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R)) + (net 10 BTN_R)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R)) + (net 10 BTN_R)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5417,11 +5417,11 @@ (fp_line (start -4.4 -2.2) (end 4.4 -2.2) (layer B.CrtYd) (width 0.15)) (fp_line (start -4.4 2.2) (end 4.4 2.2) (layer B.CrtYd) (width 0.15)) (pad 4 smd rect (at -2.8 1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask) - (net 31 /power/OSCO_32k)) + (net 30 /power/OSCO_32k)) (pad 3 smd rect (at 2.8 1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)) (pad 2 smd rect (at 2.8 -1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -2.8 -1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask) - (net 30 /power/OSCI_32k)) + (net 29 /power/OSCI_32k)) (model Crystals.3dshapes/Crystal_SMD_SeikoEpson_MC306-4pin_8.0x3.2mm_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5495,21 +5495,21 @@ (fp_line (start 5.8 6.3) (end 5.8 -6.3) (layer F.CrtYd) (width 0.05)) (fp_line (start 5.8 -6.3) (end -5.8 -6.3) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -4.305 -3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 221 SW3)) + (net 220 SW3)) (pad 5 smd rect (at 4.305 3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 2 smd rect (at -4.305 -1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 222 SW2)) + (net 221 SW2)) (pad 6 smd rect (at 4.305 1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 3 smd rect (at -4.305 1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 223 SW1)) + (net 222 SW1)) (pad 7 smd rect (at 4.305 -1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 4 smd rect (at -4.305 3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 224 SW0)) + (net 223 SW0)) (pad 8 smd rect (at 4.305 -3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (model Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl (at (xyz 0 0.15 0)) (scale (xyz 1 1 1)) @@ -5558,7 +5558,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -5603,7 +5603,7 @@ (pad 1 smd rect (at -2.5 0) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 2.5 0) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) - (net 45 USB5V)) + (net 44 USB5V)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SMA.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5644,7 +5644,7 @@ (fp_line (start -4.4 -1.65) (end 2.5 -1.65) (layer B.SilkS) (width 0.12)) (fp_line (start -4.4 1.65) (end 2.5 1.65) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -2.5 0 180) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) - (net 18 "Net-(D9-Pad1)")) + (net 17 "Net-(D9-Pad1)")) (pad 2 smd rect (at 2.5 0 180) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SMA.wrl @@ -5725,137 +5725,137 @@ (fp_line (start 8.6 -8.6) (end 8.6 8.6) (layer F.SilkS) (width 0.15)) (fp_line (start -8.6 -8.6) (end 8.6 -8.6) (layer F.SilkS) (width 0.15)) (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 125 J1_27+) (solder_mask_margin 0.04)) + (net 124 J1_27+) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 179 AUDIO_R3) (solder_mask_margin 0.04)) + (net 178 AUDIO_R3) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 J1_25+) (solder_mask_margin 0.04)) + (net 122 J1_25+) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 J1_25-) (solder_mask_margin 0.04)) + (net 121 J1_25-) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 J1_23+) (solder_mask_margin 0.04)) + (net 120 J1_23+) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 J1_13+) (solder_mask_margin 0.04)) + (net 156 J1_13+) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 J1_13-) (solder_mask_margin 0.04)) + (net 155 J1_13-) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 153 J1_9+) (solder_mask_margin 0.04)) + (net 152 J1_9+) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 151 J1_7+) (solder_mask_margin 0.04)) + (net 150 J1_7+) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 150 J1_7-) (solder_mask_margin 0.04)) + (net 149 J1_7-) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 GPDI_D2+) (solder_mask_margin 0.04)) + (net 107 GPDI_D2+) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 GPDI_D2-) (solder_mask_margin 0.04)) + (net 108 GPDI_D2-) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 110 GPDI_D1+) (solder_mask_margin 0.04)) + (net 109 GPDI_D1+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 GPDI_D0+) (solder_mask_margin 0.04)) + (net 111 GPDI_D0+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 GPDI_CLK+) (solder_mask_margin 0.04)) + (net 113 GPDI_CLK+) (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 247 /gpdi/FPGA_CEC) (solder_mask_margin 0.04)) + (net 245 /gpdi/FPGA_CEC) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 GPDI_ETH+) (solder_mask_margin 0.04)) + (net 106 GPDI_ETH+) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 J1_27-) (solder_mask_margin 0.04)) + (net 123 J1_27-) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 185 LED0) (solder_mask_margin 0.04)) + (net 184 LED0) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 178 AUDIO_L0) (solder_mask_margin 0.04)) + (net 177 AUDIO_L0) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 J1_29-) (solder_mask_margin 0.04)) + (net 125 J1_29-) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 180 AUDIO_R2) (solder_mask_margin 0.04)) + (net 179 AUDIO_R2) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 J1_23-) (solder_mask_margin 0.04)) + (net 119 J1_23-) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 J1_15-) (solder_mask_margin 0.04)) + (net 157 J1_15-) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 J1_11+) (solder_mask_margin 0.04)) + (net 154 J1_11+) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 152 J1_9-) (solder_mask_margin 0.04)) + (net 151 J1_9-) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 J1_5+) (solder_mask_margin 0.04)) + (net 148 J1_5+) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 171 J2_33+) (solder_mask_margin 0.04)) + (net 170 J2_33+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 169 J2_31+) (solder_mask_margin 0.04)) + (net 168 J2_31+) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 GPDI_D0-) (solder_mask_margin 0.04)) + (net 112 GPDI_D0-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 J2_27+) (solder_mask_margin 0.04)) + (net 164 J2_27+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 GPDI_CLK-) (solder_mask_margin 0.04)) + (net 114 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 38 GPDI_SDA) (solder_mask_margin 0.04)) + (net 37 GPDI_SDA) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 GPDI_ETH-) (solder_mask_margin 0.04)) + (net 105 GPDI_ETH-) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 187 LED2) (solder_mask_margin 0.04)) + (net 186 LED2) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 186 LED1) (solder_mask_margin 0.04)) + (net 185 LED1) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 177 AUDIO_L1) (solder_mask_margin 0.04)) + (net 176 AUDIO_L1) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 J1_29+) (solder_mask_margin 0.04)) + (net 126 J1_29+) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 182 AUDIO_R0) (solder_mask_margin 0.04)) + (net 181 AUDIO_R0) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 J1_17+) (solder_mask_margin 0.04)) + (net 118 J1_17+) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 J1_17-) (solder_mask_margin 0.04)) + (net 117 J1_17-) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 J1_15+) (solder_mask_margin 0.04)) + (net 158 J1_15+) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 J1_11-) (solder_mask_margin 0.04)) + (net 153 J1_11-) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 J1_5-) (solder_mask_margin 0.04)) + (net 147 J1_5-) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 39 GPDI_SCL) (solder_mask_margin 0.04)) + (net 38 GPDI_SCL) (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 170 J2_33-) (solder_mask_margin 0.04)) + (net 169 J2_33-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 GPDI_D1-) (solder_mask_margin 0.04)) + (net 110 GPDI_D1-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 168 J2_31-) (solder_mask_margin 0.04)) + (net 167 J2_31-) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 J2_29+) (solder_mask_margin 0.04)) + (net 166 J2_29+) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 J2_27-) (solder_mask_margin 0.04)) + (net 163 J2_27-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 J2_23+) (solder_mask_margin 0.04)) + (net 146 J2_23+) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_D11) (solder_mask_margin 0.04)) + (net 65 SDRAM_D11) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 189 LED4) (solder_mask_margin 0.04)) + (net 188 LED4) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 188 LED3) (solder_mask_margin 0.04)) + (net 187 LED3) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 176 AUDIO_L2) (solder_mask_margin 0.04)) + (net 175 AUDIO_L2) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 181 AUDIO_R1) (solder_mask_margin 0.04)) + (net 180 AUDIO_R1) (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 193 BTN_PWRn) (solder_mask_margin 0.04)) + (net 192 BTN_PWRn) (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 222 SW2) (solder_mask_margin 0.04)) + (net 221 SW2) (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 223 SW1) (solder_mask_margin 0.04)) + (net 222 SW1) (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5865,37 +5865,37 @@ (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 173 J2_35+) (solder_mask_margin 0.04)) + (net 172 J2_35+) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 J2_25+) (solder_mask_margin 0.04)) + (net 162 J2_25+) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 J2_29-) (solder_mask_margin 0.04)) + (net 165 J2_29-) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 J2_23-) (solder_mask_margin 0.04)) + (net 145 J2_23-) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 J2_17+) (solder_mask_margin 0.04)) + (net 142 J2_17+) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_D10) (solder_mask_margin 0.04)) + (net 68 SDRAM_D10) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D9) (solder_mask_margin 0.04)) + (net 69 SDRAM_D9) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 191 LED6) (solder_mask_margin 0.04)) + (net 190 LED6) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 190 LED5) (solder_mask_margin 0.04)) + (net 189 LED5) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 J1_31-) (solder_mask_margin 0.04)) + (net 127 J1_31-) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 175 AUDIO_L3) (solder_mask_margin 0.04)) + (net 174 AUDIO_L3) (solder_mask_margin 0.04)) (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 246 AUDIO_V0) (solder_mask_margin 0.04)) + (net 244 AUDIO_V0) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 221 SW3) (solder_mask_margin 0.04)) + (net 220 SW3) (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 224 SW0) (solder_mask_margin 0.04)) + (net 223 SW0) (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5905,33 +5905,33 @@ (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 172 J2_35-) (solder_mask_margin 0.04)) + (net 171 J2_35-) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 J2_25-) (solder_mask_margin 0.04)) + (net 161 J2_25-) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 204 USB_FPGA_D+) (solder_mask_margin 0.04)) + (net 203 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 J2_17-) (solder_mask_margin 0.04)) + (net 141 J2_17-) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_D12) (solder_mask_margin 0.04)) + (net 61 SDRAM_D12) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D8) (solder_mask_margin 0.04)) + (net 72 SDRAM_D8) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 83 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 WIFI_EN) (solder_mask_margin 0.04)) + (net 98 WIFI_EN) (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 244 AUDIO_V2) (solder_mask_margin 0.04)) + (net 242 AUDIO_V2) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 J1_33-) (solder_mask_margin 0.04)) + (net 129 J1_33-) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 J1_31+) (solder_mask_margin 0.04)) + (net 128 J1_31+) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 245 AUDIO_V1) (solder_mask_margin 0.04)) + (net 243 AUDIO_V1) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad F8 smd circle (at -2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5949,27 +5949,27 @@ (pad F14 smd circle (at 2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad F15 smd circle (at 3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad F16 smd circle (at 4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 225 USB_FPGA_D-) (solder_mask_margin 0.04)) + (net 224 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 J2_15+) (solder_mask_margin 0.04)) + (net 160 J2_15+) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_D13) (solder_mask_margin 0.04)) + (net 55 SDRAM_D13) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 54 SDRAM_CLK) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 48 SDRAM_CKE) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 230 /usb/ANT_433MHz) (solder_mask_margin 0.04)) + (net 229 /usb/ANT_433MHz) (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 201 CLK_25MHz) (solder_mask_margin 0.04)) + (net 200 CLK_25MHz) (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 131 J1_33+) (solder_mask_margin 0.04)) + (net 130 J1_33+) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 132 J1_35-) (solder_mask_margin 0.04)) + (net 131 J1_35-) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5995,37 +5995,37 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 J2_15-) (solder_mask_margin 0.04)) + (net 159 J2_15-) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 241 SDRAM_A12) (solder_mask_margin 0.04)) + (net 239 SDRAM_A12) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_A11) (solder_mask_margin 0.04)) + (net 60 SDRAM_A11) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 174 SD_D3) (solder_mask_margin 0.04)) + (net 173 SD_D3) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 200 SD_D2) (solder_mask_margin 0.04)) + (net 199 SD_D2) (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 192 LED7) (solder_mask_margin 0.04)) + (net 191 LED7) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 133 J1_35+) (solder_mask_margin 0.04)) + (net 132 J1_35+) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 243 AUDIO_V3) (solder_mask_margin 0.04)) + (net 241 AUDIO_V3) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H7 smd circle (at -2.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H8 smd circle (at -2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H9 smd circle (at -1.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H10 smd circle (at -0.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H11 smd circle (at 0.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H12 smd circle (at 1.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H13 smd circle (at 2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H14 smd circle (at 2.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H15 smd circle (at 3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6033,19 +6033,19 @@ (pad H16 smd circle (at 4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 J2_13-) (solder_mask_margin 0.04)) + (net 139 J2_13-) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 J2_13+) (solder_mask_margin 0.04)) + (net 140 J2_13+) (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A9) (solder_mask_margin 0.04)) + (net 70 SDRAM_A9) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 42 SD_CLK) (solder_mask_margin 0.04)) + (net 41 SD_CLK) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 41 SD_CMD) (solder_mask_margin 0.04)) + (net 40 SD_CMD) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6055,7 +6055,7 @@ (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J8 smd circle (at -2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad J9 smd circle (at -1.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J10 smd circle (at -0.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6065,29 +6065,29 @@ (pad J12 smd circle (at 1.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J13 smd circle (at 2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad J14 smd circle (at 2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J15 smd circle (at 3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J16 smd circle (at 4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D0) (solder_mask_margin 0.04)) + (net 79 SDRAM_D0) (solder_mask_margin 0.04)) (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D15) (solder_mask_margin 0.04)) + (net 50 SDRAM_D15) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_D14) (solder_mask_margin 0.04)) + (net 59 SDRAM_D14) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_A8) (solder_mask_margin 0.04)) + (net 73 SDRAM_A8) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_A7) (solder_mask_margin 0.04)) + (net 49 SDRAM_A7) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 44 SD_D1) (solder_mask_margin 0.04)) + (net 43 SD_D1) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 43 SD_D0) (solder_mask_margin 0.04)) + (net 42 SD_D0) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 WIFI_RXD) (solder_mask_margin 0.04)) + (net 102 WIFI_RXD) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 105 WIFI_TXD) (solder_mask_margin 0.04)) + (net 104 WIFI_TXD) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6095,7 +6095,7 @@ (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K8 smd circle (at -2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad K9 smd circle (at -1.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K10 smd circle (at -0.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6105,7 +6105,7 @@ (pad K12 smd circle (at 1.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K13 smd circle (at 2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad K14 smd circle (at 2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K15 smd circle (at 3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6115,19 +6115,19 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A6) (solder_mask_margin 0.04)) + (net 53 SDRAM_A6) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A5) (solder_mask_margin 0.04)) + (net 58 SDRAM_A5) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_A4) (solder_mask_margin 0.04)) + (net 63 SDRAM_A4) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 228 WIFI_GPIO16) (solder_mask_margin 0.04)) + (net 227 WIFI_GPIO16) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 104 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 103 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 239 FTDI_TXDEN) (solder_mask_margin 0.04)) + (net 237 FTDI_TXDEN) (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 FTDI_RXD) (solder_mask_margin 0.04)) + (net 101 FTDI_RXD) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6135,7 +6135,7 @@ (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L8 smd circle (at -2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad L9 smd circle (at -1.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad L10 smd circle (at -0.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6145,27 +6145,27 @@ (pad L12 smd circle (at 1.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad L13 smd circle (at 2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad L14 smd circle (at 2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L15 smd circle (at 3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L16 smd circle (at 4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 J2_11+) (solder_mask_margin 0.04)) + (net 144 J2_11+) (solder_mask_margin 0.04)) (pad L17 smd circle (at 5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 J2_11-) (solder_mask_margin 0.04)) + (net 143 J2_11-) (solder_mask_margin 0.04)) (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D1) (solder_mask_margin 0.04)) + (net 78 SDRAM_D1) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A3) (solder_mask_margin 0.04)) + (net 66 SDRAM_A3) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_A2) (solder_mask_margin 0.04)) + (net 74 SDRAM_A2) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 FTDI_TXD) (solder_mask_margin 0.04)) + (net 100 FTDI_TXD) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 99 FTDI_nRTS) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6175,7 +6175,7 @@ (pad M7 smd circle (at -2.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M8 smd circle (at -2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad M9 smd circle (at -1.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M10 smd circle (at -0.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6185,7 +6185,7 @@ (pad M12 smd circle (at 1.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M13 smd circle (at 2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad M14 smd circle (at 2.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M15 smd circle (at 3.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6193,19 +6193,19 @@ (pad M16 smd circle (at 4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 J2_9-) (solder_mask_margin 0.04)) + (net 137 J2_9-) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_D2) (solder_mask_margin 0.04)) + (net 77 SDRAM_D2) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A1) (solder_mask_margin 0.04)) + (net 75 SDRAM_A1) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_A0) (solder_mask_margin 0.04)) + (net 76 SDRAM_A0) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 48 FTDI_nDTR) (solder_mask_margin 0.04)) + (net 47 FTDI_nDTR) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 OLED_CS) (solder_mask_margin 0.04)) + (net 97 OLED_CS) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 229 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 228 WIFI_GPIO15) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6215,43 +6215,43 @@ (pad N7 smd circle (at -2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N8 smd circle (at -2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N9 smd circle (at -1.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N10 smd circle (at -0.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N11 smd circle (at 0.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N12 smd circle (at 1.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N13 smd circle (at 2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N14 smd circle (at 2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N15 smd circle (at 3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 J2_9+) (solder_mask_margin 0.04)) + (net 138 J2_9+) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 J2_7+) (solder_mask_margin 0.04)) + (net 136 J2_7+) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_D3) (solder_mask_margin 0.04)) + (net 71 SDRAM_D3) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_A10) (solder_mask_margin 0.04)) + (net 64 SDRAM_A10) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 51 SDRAM_BA1) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 OLED_DC) (solder_mask_margin 0.04)) + (net 96 OLED_DC) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 OLED_RES) (solder_mask_margin 0.04)) + (net 95 OLED_RES) (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 184 OLED_MOSI) (solder_mask_margin 0.04)) + (net 183 OLED_MOSI) (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 183 OLED_CLK) (solder_mask_margin 0.04)) + (net 182 OLED_CLK) (solder_mask_margin 0.04)) (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad P8 smd circle (at -2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6269,39 +6269,39 @@ (pad P14 smd circle (at 2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad P15 smd circle (at 3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad P16 smd circle (at 4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 J2_7-) (solder_mask_margin 0.04)) + (net 135 J2_7-) (solder_mask_margin 0.04)) (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 219 ADC_SCLK) (solder_mask_margin 0.04)) + (net 218 ADC_SCLK) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D4) (solder_mask_margin 0.04)) + (net 67 SDRAM_D4) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 56 SDRAM_BA0) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 81 SDRAM_nCS) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1) (solder_mask_margin 0.04)) + (net 7 BTN_F1) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 91 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 20 JTAG_TDI) (solder_mask_margin 0.04)) + (net 19 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 217 ADC_MOSI) (solder_mask_margin 0.04)) + (net 216 ADC_MOSI) (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 218 ADC_CSn) (solder_mask_margin 0.04)) + (net 217 ADC_CSn) (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 82 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad T1 smd circle (at -7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2) (solder_mask_margin 0.04)) + (net 8 BTN_F2) (solder_mask_margin 0.04)) (pad T2 smd circle (at -6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T3 smd circle (at -6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6309,7 +6309,7 @@ (pad T4 smd circle (at -5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T5 smd circle (at -4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 21 JTAG_TCK) (solder_mask_margin 0.04)) + (net 20 JTAG_TCK) (solder_mask_margin 0.04)) (pad T6 smd circle (at -3.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad T7 smd circle (at -2.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6333,23 +6333,23 @@ (pad T16 smd circle (at 4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D6) (solder_mask_margin 0.04)) + (net 57 SDRAM_D6) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D5) (solder_mask_margin 0.04)) + (net 62 SDRAM_D5) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 84 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 85 SDRAM_nWE) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L) (solder_mask_margin 0.04)) + (net 9 BTN_L) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 90 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 22 JTAG_TMS) (solder_mask_margin 0.04)) + (net 21 JTAG_TMS) (solder_mask_margin 0.04)) (pad U6 smd circle (at -3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U7 smd circle (at -2.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6371,23 +6371,23 @@ (pad U15 smd circle (at 3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U16 smd circle (at 4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 216 ADC_MISO) (solder_mask_margin 0.04)) + (net 215 ADC_MISO) (solder_mask_margin 0.04)) (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 J2_5-) (solder_mask_margin 0.04)) + (net 133 J2_5-) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 J2_5+) (solder_mask_margin 0.04)) + (net 134 J2_5+) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 80 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D7) (solder_mask_margin 0.04)) + (net 52 SDRAM_D7) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D) (solder_mask_margin 0.04)) + (net 6 BTN_D) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 89 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 94 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 23 JTAG_TDO) (solder_mask_margin 0.04)) + (net 22 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad V6 smd circle (at -3.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6421,11 +6421,11 @@ (pad V20 smd circle (at 7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U) (solder_mask_margin 0.04)) + (net 11 BTN_U) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 88 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 92 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6461,9 +6461,9 @@ (pad W20 smd circle (at 7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R) (solder_mask_margin 0.04)) + (net 10 BTN_R) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 93 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6519,7 +6519,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6555,7 +6555,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6591,7 +6591,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6627,7 +6627,7 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -6663,9 +6663,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 94 /flash/FPGA_DONE)) + (net 93 /flash/FPGA_DONE)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 232 PROG_DONE)) + (net 231 PROG_DONE)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6701,21 +6701,21 @@ (fp_line (start 6.15 -7.95) (end -6.15 -7.95) (layer F.Fab) (width 0.15)) (fp_line (start 6.15 8) (end 6.15 -7.95) (layer F.Fab) (width 0.15)) (pad 1 smd rect (at 3.2 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 200 SD_D2)) + (net 199 SD_D2)) (pad 2 smd rect (at 2.1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 174 SD_D3)) + (net 173 SD_D3)) (pad 3 smd rect (at 1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 41 SD_CMD)) + (net 40 SD_CMD)) (pad 4 smd rect (at -0.1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 5 smd rect (at -1.2 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 42 SD_CLK)) + (net 41 SD_CLK)) (pad 6 smd rect (at -2.3 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -3.4 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 43 SD_D0)) + (net 42 SD_D0)) (pad 8 smd rect (at -4.5 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 44 SD_D1)) + (net 43 SD_D1)) (pad 10 smd rect (at 6.875 6.5 180) (size 1.45 0.9) (layers F.Cu F.Paste F.Mask)) (pad 11 smd rect (at -6.875 -5.15 270) (size 0.9 1.45) (layers F.Cu F.Paste F.Mask)) (pad 9 smd rect (at -6.875 4.8 180) (size 1.45 2) (layers F.Cu F.Paste F.Mask) @@ -6940,9 +6940,9 @@ (fp_line (start -4 6.7) (end -4 6) (layer B.Fab) (width 0.1)) (fp_line (start -4 6.7) (end 4 6.7) (layer B.Fab) (width 0.1)) (pad 1 smd rect (at -7.9 0 180) (size 3.5 3.3) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 1 smd rect (at 7.9 0 180) (size 3.5 3.3) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 2 smd circle (at 0 0 180) (size 9 9) (layers B.Cu B.Mask) (net 1 GND)) (model Battery_Holders.3dshapes/Keystone_3000_1x12mm-CoinCell.wrl @@ -6985,7 +6985,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7028,7 +7028,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7071,9 +7071,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 27 /power/WAKE)) + (net 26 /power/WAKE)) (pad 2 smd rect (at 1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7114,7 +7114,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 28 /power/HOLD)) + (net 27 /power/HOLD)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7157,9 +7157,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 205 /power/FTDI_nSUSPEND)) + (net 204 /power/FTDI_nSUSPEND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7200,7 +7200,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (pad 2 smd rect (at 1.25 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7245,7 +7245,7 @@ (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7286,9 +7286,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 33 SHUTDOWN)) + (net 32 SHUTDOWN)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7329,9 +7329,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7372,9 +7372,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 193 BTN_PWRn)) + (net 192 BTN_PWRn)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7395,9 +7395,9 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 14 +2V5)) + (net 13 +2V5)) ) (module jumper:SOLDER-JUMPER_1-WAY (layer B.Cu) (tedit 59DFC21C) (tstamp 59DFBD6B) @@ -7413,7 +7413,7 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 0.6 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -7446,7 +7446,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 239 FTDI_TXDEN)) + (net 237 FTDI_TXDEN)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7560,9 +7560,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 243 AUDIO_V3)) + (net 241 AUDIO_V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7596,9 +7596,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 244 AUDIO_V2)) + (net 242 AUDIO_V2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7632,9 +7632,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 245 AUDIO_V1)) + (net 243 AUDIO_V1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7668,9 +7668,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 246 AUDIO_V0)) + (net 244 AUDIO_V0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7704,9 +7704,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_CEC)) + (net 45 GPDI_CEC)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 247 /gpdi/FPGA_CEC)) + (net 245 /gpdi/FPGA_CEC)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7745,9 +7745,9 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 249 WIFI_GPIO2)) + (net 247 WIFI_GPIO2)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 248 /blinkey/LED_WIFI)) + (net 246 /blinkey/LED_WIFI)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7781,7 +7781,7 @@ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 248 /blinkey/LED_WIFI)) + (net 246 /blinkey/LED_WIFI)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl @@ -7822,9 +7822,9 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 196 /blinkey/LED_PWREN)) + (net 195 /blinkey/LED_PWREN)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7863,7 +7863,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 206 /blinkey/ALED0)) + (net 205 /blinkey/ALED0)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7904,7 +7904,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 207 /blinkey/ALED1)) + (net 206 /blinkey/ALED1)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7945,7 +7945,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 208 /blinkey/ALED2)) + (net 207 /blinkey/ALED2)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7986,7 +7986,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 209 /blinkey/ALED3)) + (net 208 /blinkey/ALED3)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8027,7 +8027,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 210 /blinkey/ALED4)) + (net 209 /blinkey/ALED4)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8068,7 +8068,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 211 /blinkey/ALED5)) + (net 210 /blinkey/ALED5)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8109,7 +8109,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 212 /blinkey/ALED6)) + (net 211 /blinkey/ALED6)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8150,7 +8150,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 213 /blinkey/ALED7)) + (net 212 /blinkey/ALED7)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8191,9 +8191,9 @@ (effects (font (size 0.4 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61.951) (xy 159.001065 61.951) + (xy 168.908526 68.018474) (xy 169.416524 68.526471) (xy 169.416526 68.526474) (xy 169.588795 68.64158) (xy 169.769 68.677425) + (xy 169.769 68.829) (xy 169.80942 69.032205) (xy 169.814636 69.040012) (xy 168.764091 69.040012) (xy 168.560886 69.080432) + (xy 168.388617 69.195538) (xy 168.027209 69.556946) (xy 167.912103 69.729215) (xy 167.876 69.910717) (xy 167.876 69.48) + (xy 167.83558 69.276795) (xy 167.720474 69.104526) (xy 167.500474 68.884526) (xy 167.328205 68.76942) (xy 167.125 68.729) + (xy 165.473464 68.729) (xy 165.473464 68.56) (xy 165.446897 68.41881) (xy 165.363454 68.289135) (xy 165.236134 68.202141) + (xy 165.085 68.171536) (xy 164.085 68.171536) (xy 163.94381 68.198103) (xy 163.814135 68.281546) (xy 163.727141 68.408866) + (xy 163.696536 68.56) (xy 163.696536 68.679) (xy 162.883464 68.679) (xy 162.883464 68.61) (xy 162.856897 68.46881) + (xy 162.773454 68.339135) (xy 162.646134 68.252141) (xy 162.495 68.221536) (xy 161.595 68.221536) (xy 161.45381 68.248103) + (xy 161.428464 68.264413) (xy 161.428464 67.25) (xy 161.401897 67.10881) (xy 161.318454 66.979135) (xy 161.191134 66.892141) + (xy 161.04 66.861536) (xy 159.24 66.861536) (xy 159.09881 66.888103) (xy 158.969135 66.971546) (xy 158.908359 67.060495) + (xy 158.681338 67.015338) (xy 157.116582 67.015338) (xy 157.116582 66.549132) (xy 157.116735 66.37389) (xy 156.982893 66.049968) + (xy 156.904691 65.97163) (xy 156.952859 65.901134) (xy 156.983464 65.75) (xy 156.983464 63.825) (xy 157.599231 63.825) + (xy 157.774473 63.825153) (xy 158.098395 63.691311) (xy 158.34644 63.443698) (xy 158.480847 63.120011) (xy 158.481153 62.769527) + (xy 158.347311 62.445605) (xy 158.099698 62.19756) (xy 157.776011 62.063153) (xy 157.425527 62.062847) (xy 157.425157 62.063) + (xy 156.927419 62.063) (xy 156.873454 61.979135) (xy 156.832277 61.951) (xy 159.001065 61.951) ) ) (filled_polygon @@ -14628,7 +14628,7 @@ ) ) ) - (zone (net 6) (net_name +1V2) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) + (zone (net 249) (net_name +1V1) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.1) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -15304,7 +15304,7 @@ ) ) ) - (zone (net 14) (net_name +2V5) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) + (zone (net 13) (net_name +2V5) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -15369,7 +15369,7 @@ ) ) ) - (zone (net 6) (net_name +1V2) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) + (zone (net 249) (net_name +1V1) (layer In1.Cu) (tstamp 0) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) diff --git a/ulx3s.kicad_pcb-bak b/ulx3s.kicad_pcb-bak index f74bfc1..692e44f 100644 --- a/ulx3s.kicad_pcb-bak +++ b/ulx3s.kicad_pcb-bak @@ -14,10 +14,10 @@ (page A4) (layers - (0 F.Cu signal) - (1 In1.Cu signal) - (2 In2.Cu signal) - (31 B.Cu signal) + (0 F.Cu signal hide) + (1 In1.Cu signal hide) + (2 In2.Cu signal hide) + (31 B.Cu signal hide) (32 B.Adhes user) (33 F.Adhes user) (34 B.Paste user) @@ -41,7 +41,7 @@ (setup (last_trace_width 0.3) (trace_clearance 0.127) - (zone_clearance 0.254) + (zone_clearance 0.127) (zone_45_only no) (trace_min 0.127) (segment_width 0.2) @@ -99,250 +99,250 @@ (net 3 /gpio/IN5V) (net 4 /gpio/OUT5V) (net 5 +3V3) - (net 6 +1V2) - (net 7 BTN_D) - (net 8 BTN_F1) - (net 9 BTN_F2) - (net 10 BTN_L) - (net 11 BTN_R) - (net 12 BTN_U) - (net 13 /power/FB1) - (net 14 +2V5) - (net 15 /power/PWREN) - (net 16 /power/FB3) - (net 17 /power/FB2) - (net 18 "Net-(D9-Pad1)") - (net 19 /power/VBAT) - (net 20 JTAG_TDI) - (net 21 JTAG_TCK) - (net 22 JTAG_TMS) - (net 23 JTAG_TDO) - (net 24 /power/WAKEUPn) - (net 25 /power/WKUP) - (net 26 /power/SHUT) - (net 27 /power/WAKE) - (net 28 /power/HOLD) - (net 29 /power/WKn) - (net 30 /power/OSCI_32k) - (net 31 /power/OSCO_32k) - (net 32 "Net-(Q2-Pad3)") - (net 33 SHUTDOWN) - (net 34 /analog/AUDIO_L) - (net 35 /analog/AUDIO_R) - (net 36 GPDI_5V_SCL) - (net 37 GPDI_5V_SDA) - (net 38 GPDI_SDA) - (net 39 GPDI_SCL) - (net 40 /gpdi/VREF2) - (net 41 SD_CMD) - (net 42 SD_CLK) - (net 43 SD_D0) - (net 44 SD_D1) - (net 45 USB5V) - (net 46 GPDI_CEC) - (net 47 nRESET) - (net 48 FTDI_nDTR) - (net 49 SDRAM_CKE) - (net 50 SDRAM_A7) - (net 51 SDRAM_D15) - (net 52 SDRAM_BA1) - (net 53 SDRAM_D7) - (net 54 SDRAM_A6) - (net 55 SDRAM_CLK) - (net 56 SDRAM_D13) - (net 57 SDRAM_BA0) - (net 58 SDRAM_D6) - (net 59 SDRAM_A5) - (net 60 SDRAM_D14) - (net 61 SDRAM_A11) - (net 62 SDRAM_D12) - (net 63 SDRAM_D5) - (net 64 SDRAM_A4) - (net 65 SDRAM_A10) - (net 66 SDRAM_D11) - (net 67 SDRAM_A3) - (net 68 SDRAM_D4) - (net 69 SDRAM_D10) - (net 70 SDRAM_D9) - (net 71 SDRAM_A9) - (net 72 SDRAM_D3) - (net 73 SDRAM_D8) - (net 74 SDRAM_A8) - (net 75 SDRAM_A2) - (net 76 SDRAM_A1) - (net 77 SDRAM_A0) - (net 78 SDRAM_D2) - (net 79 SDRAM_D1) - (net 80 SDRAM_D0) - (net 81 SDRAM_DQM0) - (net 82 SDRAM_nCS) - (net 83 SDRAM_nRAS) - (net 84 SDRAM_DQM1) - (net 85 SDRAM_nCAS) - (net 86 SDRAM_nWE) - (net 87 /flash/FLASH_nWP) - (net 88 /flash/FLASH_nHOLD) - (net 89 /flash/FLASH_MOSI) - (net 90 /flash/FLASH_MISO) - (net 91 /flash/FLASH_SCK) - (net 92 /flash/FLASH_nCS) - (net 93 /flash/FPGA_PROGRAMN) - (net 94 /flash/FPGA_DONE) - (net 95 /flash/FPGA_INITN) - (net 96 OLED_RES) - (net 97 OLED_DC) - (net 98 OLED_CS) - (net 99 WIFI_EN) - (net 100 FTDI_nRTS) - (net 101 FTDI_TXD) - (net 102 FTDI_RXD) - (net 103 WIFI_RXD) - (net 104 WIFI_GPIO0) - (net 105 WIFI_TXD) - (net 106 GPDI_ETH-) - (net 107 GPDI_ETH+) - (net 108 GPDI_D2+) - (net 109 GPDI_D2-) - (net 110 GPDI_D1+) - (net 111 GPDI_D1-) - (net 112 GPDI_D0+) - (net 113 GPDI_D0-) - (net 114 GPDI_CLK+) - (net 115 GPDI_CLK-) - (net 116 USB_FTDI_D+) - (net 117 USB_FTDI_D-) - (net 118 J1_17-) - (net 119 J1_17+) - (net 120 J1_23-) - (net 121 J1_23+) - (net 122 J1_25-) - (net 123 J1_25+) - (net 124 J1_27-) - (net 125 J1_27+) - (net 126 J1_29-) - (net 127 J1_29+) - (net 128 J1_31-) - (net 129 J1_31+) - (net 130 J1_33-) - (net 131 J1_33+) - (net 132 J1_35-) - (net 133 J1_35+) - (net 134 J2_5-) - (net 135 J2_5+) - (net 136 J2_7-) - (net 137 J2_7+) - (net 138 J2_9-) - (net 139 J2_9+) - (net 140 J2_13-) - (net 141 J2_13+) - (net 142 J2_17-) - (net 143 J2_17+) - (net 144 J2_11-) - (net 145 J2_11+) - (net 146 J2_23-) - (net 147 J2_23+) - (net 148 J1_5-) - (net 149 J1_5+) - (net 150 J1_7-) - (net 151 J1_7+) - (net 152 J1_9-) - (net 153 J1_9+) - (net 154 J1_11-) - (net 155 J1_11+) - (net 156 J1_13-) - (net 157 J1_13+) - (net 158 J1_15-) - (net 159 J1_15+) - (net 160 J2_15-) - (net 161 J2_15+) - (net 162 J2_25-) - (net 163 J2_25+) - (net 164 J2_27-) - (net 165 J2_27+) - (net 166 J2_29-) - (net 167 J2_29+) - (net 168 J2_31-) - (net 169 J2_31+) - (net 170 J2_33-) - (net 171 J2_33+) - (net 172 J2_35-) - (net 173 J2_35+) - (net 174 SD_D3) - (net 175 AUDIO_L3) - (net 176 AUDIO_L2) - (net 177 AUDIO_L1) - (net 178 AUDIO_L0) - (net 179 AUDIO_R3) - (net 180 AUDIO_R2) - (net 181 AUDIO_R1) - (net 182 AUDIO_R0) - (net 183 OLED_CLK) - (net 184 OLED_MOSI) - (net 185 LED0) - (net 186 LED1) - (net 187 LED2) - (net 188 LED3) - (net 189 LED4) - (net 190 LED5) - (net 191 LED6) - (net 192 LED7) - (net 193 BTN_PWRn) - (net 194 FTDI_nTXLED) - (net 195 FTDI_nSLEEP) - (net 196 /blinkey/LED_PWREN) - (net 197 /blinkey/LED_TXLED) - (net 198 FT3V3) - (net 199 /sdcard/SD3V3) - (net 200 SD_D2) - (net 201 CLK_25MHz) - (net 202 /blinkey/BTNPUL) - (net 203 /blinkey/BTNPUR) - (net 204 USB_FPGA_D+) - (net 205 /power/FTDI_nSUSPEND) - (net 206 /blinkey/ALED0) - (net 207 /blinkey/ALED1) - (net 208 /blinkey/ALED2) - (net 209 /blinkey/ALED3) - (net 210 /blinkey/ALED4) - (net 211 /blinkey/ALED5) - (net 212 /blinkey/ALED6) - (net 213 /blinkey/ALED7) - (net 214 /usb/FTD-) - (net 215 /usb/FTD+) - (net 216 ADC_MISO) - (net 217 ADC_MOSI) - (net 218 ADC_CSn) - (net 219 ADC_SCLK) - (net 220 "Net-(R51-Pad2)") - (net 221 SW3) - (net 222 SW2) - (net 223 SW1) - (net 224 SW0) - (net 225 USB_FPGA_D-) - (net 226 /usb/FPD+) - (net 227 /usb/FPD-) - (net 228 WIFI_GPIO16) - (net 229 WIFI_GPIO15) - (net 230 /usb/ANT_433MHz) - (net 231 /power/PWRBTn) - (net 232 PROG_DONE) - (net 233 /power/P1V2) - (net 234 /power/P3V3) - (net 235 /power/P2V5) - (net 236 /power/L1) - (net 237 /power/L3) - (net 238 /power/L2) - (net 239 FTDI_TXDEN) - (net 240 /wifi/WIFIOFF) - (net 241 SDRAM_A12) - (net 242 /analog/AUDIO_V) - (net 243 AUDIO_V3) - (net 244 AUDIO_V2) - (net 245 AUDIO_V1) - (net 246 AUDIO_V0) - (net 247 /gpdi/FPGA_CEC) - (net 248 /blinkey/LED_WIFI) - (net 249 WIFI_GPIO2) + (net 6 BTN_D) + (net 7 BTN_F1) + (net 8 BTN_F2) + (net 9 BTN_L) + (net 10 BTN_R) + (net 11 BTN_U) + (net 12 /power/FB1) + (net 13 +2V5) + (net 14 /power/PWREN) + (net 15 /power/FB3) + (net 16 /power/FB2) + (net 17 "Net-(D9-Pad1)") + (net 18 /power/VBAT) + (net 19 JTAG_TDI) + (net 20 JTAG_TCK) + (net 21 JTAG_TMS) + (net 22 JTAG_TDO) + (net 23 /power/WAKEUPn) + (net 24 /power/WKUP) + (net 25 /power/SHUT) + (net 26 /power/WAKE) + (net 27 /power/HOLD) + (net 28 /power/WKn) + (net 29 /power/OSCI_32k) + (net 30 /power/OSCO_32k) + (net 31 "Net-(Q2-Pad3)") + (net 32 SHUTDOWN) + (net 33 /analog/AUDIO_L) + (net 34 /analog/AUDIO_R) + (net 35 GPDI_5V_SCL) + (net 36 GPDI_5V_SDA) + (net 37 GPDI_SDA) + (net 38 GPDI_SCL) + (net 39 /gpdi/VREF2) + (net 40 SD_CMD) + (net 41 SD_CLK) + (net 42 SD_D0) + (net 43 SD_D1) + (net 44 USB5V) + (net 45 GPDI_CEC) + (net 46 nRESET) + (net 47 FTDI_nDTR) + (net 48 SDRAM_CKE) + (net 49 SDRAM_A7) + (net 50 SDRAM_D15) + (net 51 SDRAM_BA1) + (net 52 SDRAM_D7) + (net 53 SDRAM_A6) + (net 54 SDRAM_CLK) + (net 55 SDRAM_D13) + (net 56 SDRAM_BA0) + (net 57 SDRAM_D6) + (net 58 SDRAM_A5) + (net 59 SDRAM_D14) + (net 60 SDRAM_A11) + (net 61 SDRAM_D12) + (net 62 SDRAM_D5) + (net 63 SDRAM_A4) + (net 64 SDRAM_A10) + (net 65 SDRAM_D11) + (net 66 SDRAM_A3) + (net 67 SDRAM_D4) + (net 68 SDRAM_D10) + (net 69 SDRAM_D9) + (net 70 SDRAM_A9) + (net 71 SDRAM_D3) + (net 72 SDRAM_D8) + (net 73 SDRAM_A8) + (net 74 SDRAM_A2) + (net 75 SDRAM_A1) + (net 76 SDRAM_A0) + (net 77 SDRAM_D2) + (net 78 SDRAM_D1) + (net 79 SDRAM_D0) + (net 80 SDRAM_DQM0) + (net 81 SDRAM_nCS) + (net 82 SDRAM_nRAS) + (net 83 SDRAM_DQM1) + (net 84 SDRAM_nCAS) + (net 85 SDRAM_nWE) + (net 86 /flash/FLASH_nWP) + (net 87 /flash/FLASH_nHOLD) + (net 88 /flash/FLASH_MOSI) + (net 89 /flash/FLASH_MISO) + (net 90 /flash/FLASH_SCK) + (net 91 /flash/FLASH_nCS) + (net 92 /flash/FPGA_PROGRAMN) + (net 93 /flash/FPGA_DONE) + (net 94 /flash/FPGA_INITN) + (net 95 OLED_RES) + (net 96 OLED_DC) + (net 97 OLED_CS) + (net 98 WIFI_EN) + (net 99 FTDI_nRTS) + (net 100 FTDI_TXD) + (net 101 FTDI_RXD) + (net 102 WIFI_RXD) + (net 103 WIFI_GPIO0) + (net 104 WIFI_TXD) + (net 105 GPDI_ETH-) + (net 106 GPDI_ETH+) + (net 107 GPDI_D2+) + (net 108 GPDI_D2-) + (net 109 GPDI_D1+) + (net 110 GPDI_D1-) + (net 111 GPDI_D0+) + (net 112 GPDI_D0-) + (net 113 GPDI_CLK+) + (net 114 GPDI_CLK-) + (net 115 USB_FTDI_D+) + (net 116 USB_FTDI_D-) + (net 117 J1_17-) + (net 118 J1_17+) + (net 119 J1_23-) + (net 120 J1_23+) + (net 121 J1_25-) + (net 122 J1_25+) + (net 123 J1_27-) + (net 124 J1_27+) + (net 125 J1_29-) + (net 126 J1_29+) + (net 127 J1_31-) + (net 128 J1_31+) + (net 129 J1_33-) + (net 130 J1_33+) + (net 131 J1_35-) + (net 132 J1_35+) + (net 133 J2_5-) + (net 134 J2_5+) + (net 135 J2_7-) + (net 136 J2_7+) + (net 137 J2_9-) + (net 138 J2_9+) + (net 139 J2_13-) + (net 140 J2_13+) + (net 141 J2_17-) + (net 142 J2_17+) + (net 143 J2_11-) + (net 144 J2_11+) + (net 145 J2_23-) + (net 146 J2_23+) + (net 147 J1_5-) + (net 148 J1_5+) + (net 149 J1_7-) + (net 150 J1_7+) + (net 151 J1_9-) + (net 152 J1_9+) + (net 153 J1_11-) + (net 154 J1_11+) + (net 155 J1_13-) + (net 156 J1_13+) + (net 157 J1_15-) + (net 158 J1_15+) + (net 159 J2_15-) + (net 160 J2_15+) + (net 161 J2_25-) + (net 162 J2_25+) + (net 163 J2_27-) + (net 164 J2_27+) + (net 165 J2_29-) + (net 166 J2_29+) + (net 167 J2_31-) + (net 168 J2_31+) + (net 169 J2_33-) + (net 170 J2_33+) + (net 171 J2_35-) + (net 172 J2_35+) + (net 173 SD_D3) + (net 174 AUDIO_L3) + (net 175 AUDIO_L2) + (net 176 AUDIO_L1) + (net 177 AUDIO_L0) + (net 178 AUDIO_R3) + (net 179 AUDIO_R2) + (net 180 AUDIO_R1) + (net 181 AUDIO_R0) + (net 182 OLED_CLK) + (net 183 OLED_MOSI) + (net 184 LED0) + (net 185 LED1) + (net 186 LED2) + (net 187 LED3) + (net 188 LED4) + (net 189 LED5) + (net 190 LED6) + (net 191 LED7) + (net 192 BTN_PWRn) + (net 193 FTDI_nTXLED) + (net 194 FTDI_nSLEEP) + (net 195 /blinkey/LED_PWREN) + (net 196 /blinkey/LED_TXLED) + (net 197 FT3V3) + (net 198 /sdcard/SD3V3) + (net 199 SD_D2) + (net 200 CLK_25MHz) + (net 201 /blinkey/BTNPUL) + (net 202 /blinkey/BTNPUR) + (net 203 USB_FPGA_D+) + (net 204 /power/FTDI_nSUSPEND) + (net 205 /blinkey/ALED0) + (net 206 /blinkey/ALED1) + (net 207 /blinkey/ALED2) + (net 208 /blinkey/ALED3) + (net 209 /blinkey/ALED4) + (net 210 /blinkey/ALED5) + (net 211 /blinkey/ALED6) + (net 212 /blinkey/ALED7) + (net 213 /usb/FTD-) + (net 214 /usb/FTD+) + (net 215 ADC_MISO) + (net 216 ADC_MOSI) + (net 217 ADC_CSn) + (net 218 ADC_SCLK) + (net 219 "Net-(R51-Pad2)") + (net 220 SW3) + (net 221 SW2) + (net 222 SW1) + (net 223 SW0) + (net 224 USB_FPGA_D-) + (net 225 /usb/FPD+) + (net 226 /usb/FPD-) + (net 227 WIFI_GPIO16) + (net 228 WIFI_GPIO15) + (net 229 /usb/ANT_433MHz) + (net 230 /power/PWRBTn) + (net 231 PROG_DONE) + (net 232 /power/P3V3) + (net 233 /power/P2V5) + (net 234 /power/L1) + (net 235 /power/L3) + (net 236 /power/L2) + (net 237 FTDI_TXDEN) + (net 238 /wifi/WIFIOFF) + (net 239 SDRAM_A12) + (net 240 /analog/AUDIO_V) + (net 241 AUDIO_V3) + (net 242 AUDIO_V2) + (net 243 AUDIO_V1) + (net 244 AUDIO_V0) + (net 245 /gpdi/FPGA_CEC) + (net 246 /blinkey/LED_WIFI) + (net 247 WIFI_GPIO2) + (net 248 /power/P1V1) + (net 249 +1V1) (net_class Default "This is the default net class." (clearance 0.127) @@ -351,7 +351,7 @@ (via_drill 0.2) (uvia_dia 0.3) (uvia_drill 0.1) - (add_net +1V2) + (add_net +1V1) (add_net +2V5) (add_net +3V3) (add_net +5V) @@ -384,7 +384,7 @@ (add_net /power/L3) (add_net /power/OSCI_32k) (add_net /power/OSCO_32k) - (add_net /power/P1V2) + (add_net /power/P1V1) (add_net /power/P2V5) (add_net /power/P3V3) (add_net /power/PWRBTn) @@ -727,33 +727,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 148 J1_5-)) + (net 147 J1_5-)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 149 J1_5+)) + (net 148 J1_5+)) (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 150 J1_7-)) + (net 149 J1_7-)) (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 151 J1_7+)) + (net 150 J1_7+)) (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 152 J1_9-)) + (net 151 J1_9-)) (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 153 J1_9+)) + (net 152 J1_9+)) (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 154 J1_11-)) + (net 153 J1_11-)) (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 155 J1_11+)) + (net 154 J1_11+)) (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 156 J1_13-)) + (net 155 J1_13-)) (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 157 J1_13+)) + (net 156 J1_13+)) (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 158 J1_15-)) + (net 157 J1_15-)) (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 159 J1_15+)) + (net 158 J1_15+)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 118 J1_17-)) + (net 117 J1_17-)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 119 J1_17+)) + (net 118 J1_17+)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -763,33 +763,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 120 J1_23-)) + (net 119 J1_23-)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 121 J1_23+)) + (net 120 J1_23+)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 122 J1_25-)) + (net 121 J1_25-)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 123 J1_25+)) + (net 122 J1_25+)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 124 J1_27-)) + (net 123 J1_27-)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 125 J1_27+)) + (net 124 J1_27+)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 126 J1_29-)) + (net 125 J1_29-)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 127 J1_29+)) + (net 126 J1_29+)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 128 J1_31-)) + (net 127 J1_31-)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 129 J1_31+)) + (net 128 J1_31+)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 130 J1_33-)) + (net 129 J1_33-)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 131 J1_33+)) + (net 130 J1_33+)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 132 J1_35-)) + (net 131 J1_35-)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 133 J1_35+)) + (net 132 J1_35+)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -817,7 +817,7 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 1 smd rect (at 0 0) (size 0.5 0.5) (layers B.Cu F.Paste F.Mask) - (net 230 /usb/ANT_433MHz)) + (net 229 /usb/ANT_433MHz)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 590C5C33) @@ -843,7 +843,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -871,9 +871,9 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 6 +1V2)) + (net 249 +1V1)) ) (module ESP32-footprints-Lib:ESP-32S (layer B.Cu) (tedit 59DF4284) (tstamp 58E56AFE) @@ -907,69 +907,69 @@ (pad 38 smd oval (at 8.947434 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 232 PROG_DONE)) + (net 231 PROG_DONE)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 105 WIFI_TXD)) + (net 104 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 103 WIFI_RXD)) + (net 102 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 31 smd oval (at 8.947434 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (pad 30 smd oval (at 8.947434 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 29 smd oval (at 8.947434 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 28 smd oval (at 8.947434 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 228 WIFI_GPIO16)) + (net 227 WIFI_GPIO16)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 104 WIFI_GPIO0)) + (net 103 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 249 WIFI_GPIO2)) + (net 247 WIFI_GPIO2)) (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 229 WIFI_GPIO15)) + (net 228 WIFI_GPIO15)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 44 SD_D1)) + (net 43 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 43 SD_D0)) + (net 42 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 42 SD_CLK)) + (net 41 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 41 SD_CMD)) + (net 40 SD_CMD)) (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 174 SD_D3)) + (net 173 SD_D3)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 200 SD_D2)) + (net 199 SD_D2)) (pad 16 smd oval (at -4.497566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 124 J1_27-)) + (net 123 J1_27-)) (pad 15 smd oval (at -5.767566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 14 smd oval (at -9.052566 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 125 J1_27+)) + (net 124 J1_27+)) (pad 13 smd oval (at -9.052566 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 126 J1_29-)) + (net 125 J1_29-)) (pad 12 smd oval (at -9.052566 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 127 J1_29+)) + (net 126 J1_29+)) (pad 11 smd oval (at -9.052566 -3.182662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 128 J1_31-)) + (net 127 J1_31-)) (pad 10 smd oval (at -9.052566 -1.912662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 129 J1_31+)) + (net 128 J1_31+)) (pad 9 smd oval (at -9.052566 -0.642662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 130 J1_33-)) + (net 129 J1_33-)) (pad 8 smd oval (at -9.052566 0.627338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 J1_33+)) + (net 130 J1_33+)) (pad 7 smd oval (at -9.052566 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 132 J1_35-)) + (net 131 J1_35-)) (pad 6 smd oval (at -9.052566 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 J1_35+)) + (net 132 J1_35+)) (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -1051,7 +1051,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1082,9 +1082,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 236 /power/L1)) + (net 234 /power/L1)) (pad 2 smd rect (at 2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1107,15 +1107,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 236 /power/L1)) + (net 234 /power/L1)) (pad 4 smd rect (at 0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1146,9 +1146,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 237 /power/L3)) + (net 235 /power/L3)) (pad 2 smd rect (at 2 0 180) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1171,15 +1171,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 237 /power/L3)) + (net 235 /power/L3)) (pad 4 smd rect (at 0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1210,9 +1210,9 @@ (fp_line (start 1 -1.475) (end -1 -1.475) (layer B.SilkS) (width 0.15)) (fp_line (start -1 1.475) (end 1 1.475) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2 0) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 238 /power/L2)) + (net 236 /power/L2)) (pad 2 smd rect (at 2 0) (size 2 2.5) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (model Inductors_SMD.3dshapes/L_1210.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1235,15 +1235,15 @@ (fp_line (start 1.5 -0.9) (end -1.5 -0.9) (layer B.SilkS) (width 0.15)) (fp_line (start -1.5 -0.9) (end -1.5 0.9) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 0 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 0.95 -1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 238 /power/L2)) + (net 236 /power/L2)) (pad 4 smd rect (at 0.95 1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 5 smd rect (at -0.95 1.3 180) (size 0.7 1.2) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1307,7 +1307,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1340,7 +1340,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1406,7 +1406,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1439,7 +1439,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1505,7 +1505,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1538,7 +1538,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -1566,19 +1566,19 @@ (fp_line (start -2.54 -1.905) (end -2.54 1.905) (layer B.SilkS) (width 0.15)) (fp_line (start 2.54 -1.905) (end 2.54 1.905) (layer B.SilkS) (width 0.15)) (pad 1 smd oval (at -1.905 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 30 /power/OSCI_32k)) + (net 29 /power/OSCI_32k)) (pad 2 smd oval (at -0.635 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 31 /power/OSCO_32k)) + (net 30 /power/OSCO_32k)) (pad 3 smd oval (at 0.635 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 4 smd oval (at 1.905 -2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd oval (at 1.905 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (pad 6 smd oval (at 0.635 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (pad 7 smd oval (at -0.635 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (pad 8 smd oval (at -1.905 2.794 180) (size 0.6096 1.4732) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -1613,7 +1613,7 @@ (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model Capacitors_SMD.3dshapes/C_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1645,106 +1645,106 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D0)) + (net 79 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D1)) + (net 78 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_D2)) + (net 77 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_D3)) + (net 71 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D4)) + (net 67 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D5)) + (net 62 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D6)) + (net 57 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D7)) + (net 52 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_DQM0)) + (net 80 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_nWE)) + (net 85 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_nCAS)) + (net 84 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_nRAS)) + (net 82 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_nCS)) + (net 81 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_BA0)) + (net 56 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA1)) + (net 51 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_A10)) + (net 64 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_A0)) + (net 76 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A1)) + (net 75 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_A2)) + (net 74 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A3)) + (net 66 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_A4)) + (net 63 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A5)) + (net 58 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A6)) + (net 53 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_A7)) + (net 49 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_A8)) + (net 73 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A9)) + (net 70 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_A11)) + (net 60 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 241 SDRAM_A12)) + (net 239 SDRAM_A12)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_CKE)) + (net 48 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_CLK)) + (net 54 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_DQM1)) + (net 83 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D8)) + (net 72 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D9)) + (net 69 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_D10)) + (net 68 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_D11)) + (net 65 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_D12)) + (net 61 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_D13)) + (net 55 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_D14)) + (net 59 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D15)) + (net 50 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -1784,11 +1784,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKn)) + (net 28 /power/WKn)) (pad 2 smd rect (at -1.5 -0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 3 smd rect (at 1.5 0 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1821,11 +1821,11 @@ (fp_line (start -0.7 1.52) (end -0.7 -1.52) (layer B.Fab) (width 0.15)) (fp_line (start 0.76 -1.58) (end -0.7 -1.58) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.5 0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at -1.5 -0.95 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 180) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 32 "Net-(Q2-Pad3)")) + (net 31 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1856,9 +1856,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1889,9 +1889,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1922,9 +1922,9 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Capacitors_SMD.3dshapes/C_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1955,7 +1955,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 0.95 0 270) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl @@ -1988,9 +1988,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 27 /power/WAKE)) + (net 26 /power/WAKE)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2021,7 +2021,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2054,9 +2054,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 28 /power/HOLD)) + (net 27 /power/HOLD)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2087,7 +2087,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2120,9 +2120,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 29 /power/WKn)) + (net 28 /power/WKn)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2155,7 +2155,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2186,9 +2186,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 32 "Net-(Q2-Pad3)")) + (net 31 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2219,9 +2219,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 47 nRESET)) + (net 46 nRESET)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2252,9 +2252,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 205 /power/FTDI_nSUSPEND)) + (net 204 /power/FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2285,7 +2285,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 33 SHUTDOWN)) + (net 32 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -2318,9 +2318,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2351,9 +2351,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2384,9 +2384,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2403,7 +2403,7 @@ (fp_text reference RB1 (at 3.302 0 270) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (fp_text value 15k (at 3.302 -0.127 270) (layer B.Fab) + (fp_text value 18k (at 3.302 -0.127 270) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) @@ -2419,7 +2419,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 13 /power/FB1)) + (net 12 /power/FB1)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2452,7 +2452,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 17 /power/FB2)) + (net 16 /power/FB2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2490,7 +2490,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 16 /power/FB3)) + (net 15 /power/FB3)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2521,9 +2521,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 175 AUDIO_L3)) + (net 174 AUDIO_L3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2554,9 +2554,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 176 AUDIO_L2)) + (net 175 AUDIO_L2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2587,9 +2587,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 177 AUDIO_L1)) + (net 176 AUDIO_L1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2620,9 +2620,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 178 AUDIO_L0)) + (net 177 AUDIO_L0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2653,9 +2653,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 179 AUDIO_R3)) + (net 178 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2686,9 +2686,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 180 AUDIO_R2)) + (net 179 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2719,9 +2719,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 181 AUDIO_R1)) + (net 180 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2752,9 +2752,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 182 AUDIO_R0)) + (net 181 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2791,19 +2791,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 92 /flash/FLASH_nCS)) + (net 91 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 90 /flash/FLASH_MISO)) + (net 89 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 87 /flash/FLASH_nWP)) + (net 86 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 89 /flash/FLASH_MOSI)) + (net 88 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 91 /flash/FLASH_SCK)) + (net 90 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 88 /flash/FLASH_nHOLD)) + (net 87 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905 270) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -2836,7 +2836,7 @@ (fp_line (start -0.35 0.6) (end 0.35 0.6) (layer B.SilkS) (width 0.15)) (fp_line (start 0.35 -0.6) (end -0.35 -0.6) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0603.wrl @@ -2879,17 +2879,17 @@ (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 37 GPDI_5V_SDA)) + (net 36 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 36 GPDI_5V_SCL)) + (net 35 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3004,33 +3004,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 134 J2_5-)) + (net 133 J2_5-)) (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 135 J2_5+)) + (net 134 J2_5+)) (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 136 J2_7-)) + (net 135 J2_7-)) (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 137 J2_7+)) + (net 136 J2_7+)) (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 138 J2_9-)) + (net 137 J2_9-)) (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 139 J2_9+)) + (net 138 J2_9+)) (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 144 J2_11-)) + (net 143 J2_11-)) (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 145 J2_11+)) + (net 144 J2_11+)) (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 140 J2_13-)) + (net 139 J2_13-)) (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 141 J2_13+)) + (net 140 J2_13+)) (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 160 J2_15-)) + (net 159 J2_15-)) (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 161 J2_15+)) + (net 160 J2_15+)) (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 142 J2_17-)) + (net 141 J2_17-)) (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 143 J2_17+)) + (net 142 J2_17+)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -3040,33 +3040,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 146 J2_23-)) + (net 145 J2_23-)) (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 147 J2_23+)) + (net 146 J2_23+)) (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 162 J2_25-)) + (net 161 J2_25-)) (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 163 J2_25+)) + (net 162 J2_25+)) (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 164 J2_27-)) + (net 163 J2_27-)) (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 165 J2_27+)) + (net 164 J2_27+)) (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 166 J2_29-)) + (net 165 J2_29-)) (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 167 J2_29+)) + (net 166 J2_29+)) (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 168 J2_31-)) + (net 167 J2_31-)) (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 169 J2_31+)) + (net 168 J2_31+)) (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 170 J2_33-)) + (net 169 J2_33-)) (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 171 J2_33+)) + (net 170 J2_33+)) (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 172 J2_35-)) + (net 171 J2_35-)) (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 173 J2_35+)) + (net 172 J2_35+)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -3175,7 +3175,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3208,7 +3208,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 38 GPDI_SDA)) + (net 37 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3241,7 +3241,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 GPDI_SCL)) + (net 38 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3274,7 +3274,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 /gpdi/VREF2)) + (net 39 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3307,7 +3307,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 36 GPDI_5V_SCL)) + (net 35 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3340,7 +3340,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 37 GPDI_5V_SDA)) + (net 36 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3375,44 +3375,44 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 48 FTDI_nDTR)) + (net 47 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 100 FTDI_nRTS)) + (net 99 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (pad 4 smd rect (at -2.9 0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 102 FTDI_RXD)) + (net 101 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 6 smd rect (at -2.9 -0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 7 smd rect (at -2.9 -0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 8 smd rect (at -2.9 -1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 9 smd rect (at -2.9 -2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (pad 10 smd rect (at -2.9 -2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 194 FTDI_nTXLED)) + (net 193 FTDI_nTXLED)) (pad 11 smd rect (at 2.9 -2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 116 USB_FTDI_D+)) + (net 115 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 117 USB_FTDI_D-)) + (net 116 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (pad 14 smd rect (at 2.9 -0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 47 nRESET)) + (net 46 nRESET)) (pad 15 smd rect (at 2.9 -0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 17 smd rect (at 2.9 0.975 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask)) (pad 18 smd rect (at 2.9 1.625 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 239 FTDI_TXDEN)) + (net 237 FTDI_TXDEN)) (pad 19 smd rect (at 2.9 2.275 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (pad 20 smd rect (at 2.9 2.925 180) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 101 FTDI_TXD)) + (net 100 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3445,7 +3445,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 87 /flash/FLASH_nWP)) + (net 86 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3483,7 +3483,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 88 /flash/FLASH_nHOLD)) + (net 87 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3516,7 +3516,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 89 /flash/FLASH_MOSI)) + (net 88 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3549,7 +3549,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 90 /flash/FLASH_MISO)) + (net 89 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3582,7 +3582,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 91 /flash/FLASH_SCK)) + (net 90 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3615,7 +3615,7 @@ (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 92 /flash/FLASH_nCS)) + (net 91 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3648,7 +3648,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 93 /flash/FPGA_PROGRAMN)) + (net 92 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3681,7 +3681,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 94 /flash/FPGA_DONE)) + (net 93 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3714,7 +3714,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 95 /flash/FPGA_INITN)) + (net 94 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3747,7 +3747,7 @@ (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3790,7 +3790,7 @@ (pad 2 smd rect (at 3.15 1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 -1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) - (net 201 CLK_25MHz)) + (net 200 CLK_25MHz)) (pad 4 smd rect (at -3.15 -1.25 180) (size 2.2 1.4) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (model Crystals.3dshapes/Crystal_SMD_SeikoEpson_MC306-4pin_8.0x3.2mm_HandSoldering.wrl @@ -3823,7 +3823,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 240 /wifi/WIFIOFF)) + (net 238 /wifi/WIFIOFF)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl @@ -3856,9 +3856,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 99 WIFI_EN)) + (net 98 WIFI_EN)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 240 /wifi/WIFIOFF)) + (net 238 /wifi/WIFIOFF)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3889,7 +3889,7 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 196 /blinkey/LED_PWREN)) + (net 195 /blinkey/LED_PWREN)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -3922,9 +3922,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 194 FTDI_nTXLED)) + (net 193 FTDI_nTXLED)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 197 /blinkey/LED_TXLED)) + (net 196 /blinkey/LED_TXLED)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3971,11 +3971,11 @@ (pad 6 smd rect (at 1.2 0 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 45 USB5V)) + (net 44 USB5V)) (pad 2 smd rect (at -0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 214 /usb/FTD-)) + (net 213 /usb/FTD-)) (pad 3 smd rect (at 0 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 215 /usb/FTD+)) + (net 214 /usb/FTD+)) (pad 4 smd rect (at 0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 1 GND)) @@ -4029,11 +4029,11 @@ (pad 6 smd rect (at 1.2 0 180) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 18 "Net-(D9-Pad1)")) + (net 17 "Net-(D9-Pad1)")) (pad 2 smd rect (at -0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 3 smd rect (at 0 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 4 smd rect (at 0.65 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)) (pad 5 smd rect (at 1.3 -2.675 180) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask) (net 1 GND)) @@ -4106,7 +4106,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4137,7 +4137,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -4176,13 +4176,13 @@ (pad 2 thru_hole oval (at 0 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 3 thru_hole oval (at 2.54 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 20 JTAG_TDI)) + (net 19 JTAG_TDI)) (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 21 JTAG_TCK)) + (net 20 JTAG_TCK)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 22 JTAG_TMS)) + (net 21 JTAG_TMS)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 23 JTAG_TDO)) + (net 22 JTAG_TDO)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x03.wrl (at (xyz 0.1 -0.05 0)) (scale (xyz 1 1 1)) @@ -4213,9 +4213,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 185 LED0)) + (net 184 LED0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 206 /blinkey/ALED0)) + (net 205 /blinkey/ALED0)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4251,9 +4251,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 186 LED1)) + (net 185 LED1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 207 /blinkey/ALED1)) + (net 206 /blinkey/ALED1)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4289,9 +4289,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 187 LED2)) + (net 186 LED2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 208 /blinkey/ALED2)) + (net 207 /blinkey/ALED2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4327,9 +4327,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 188 LED3)) + (net 187 LED3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 209 /blinkey/ALED3)) + (net 208 /blinkey/ALED3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4365,9 +4365,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 189 LED4)) + (net 188 LED4)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 210 /blinkey/ALED4)) + (net 209 /blinkey/ALED4)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4403,9 +4403,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 190 LED5)) + (net 189 LED5)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 211 /blinkey/ALED5)) + (net 210 /blinkey/ALED5)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4441,9 +4441,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 191 LED6)) + (net 190 LED6)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 212 /blinkey/ALED6)) + (net 211 /blinkey/ALED6)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4479,9 +4479,9 @@ (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 192 LED7)) + (net 191 LED7)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 213 /blinkey/ALED7)) + (net 212 /blinkey/ALED7)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4517,7 +4517,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 270) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 6 +1V2)) + (net 249 +1V1)) (pad 2 smd rect (at 1.25 0 270) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -4550,7 +4550,7 @@ (fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 14 +2V5)) + (net 13 +2V5)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -4649,9 +4649,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 117 USB_FTDI_D-)) + (net 116 USB_FTDI_D-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 214 /usb/FTD-)) + (net 213 /usb/FTD-)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4682,9 +4682,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 116 USB_FTDI_D+)) + (net 115 USB_FTDI_D+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 215 /usb/FTD+)) + (net 214 /usb/FTD+)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4721,15 +4721,15 @@ (fp_line (start 2.625 2.625) (end 1.875 2.625) (layer F.SilkS) (width 0.15)) (fp_line (start 2.625 -2.625) (end 1.875 -2.625) (layer F.SilkS) (width 0.15)) (pad 1 smd oval (at -2.45 -1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 137 J2_7+)) + (net 136 J2_7+)) (pad 2 smd oval (at -2.45 -1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 138 J2_9-)) + (net 137 J2_9-)) (pad 3 smd oval (at -2.45 -0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 139 J2_9+)) + (net 138 J2_9+)) (pad 4 smd oval (at -2.45 0 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 144 J2_11-)) + (net 143 J2_11-)) (pad 5 smd oval (at -2.45 0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 145 J2_11+)) + (net 144 J2_11+)) (pad 6 smd oval (at -2.45 1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd oval (at -2.45 1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) @@ -4756,24 +4756,24 @@ (pad 18 smd oval (at 2.45 0 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 19 smd oval (at 2.45 -0.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 219 ADC_SCLK)) + (net 218 ADC_SCLK)) (pad 20 smd oval (at 2.45 -1 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 218 ADC_CSn)) + (net 217 ADC_CSn)) (pad 21 smd oval (at 2.45 -1.5 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 217 ADC_MOSI)) + (net 216 ADC_MOSI)) (pad 22 smd oval (at 1.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 23 smd oval (at 1 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 24 smd oval (at 0.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 216 ADC_MISO)) + (net 215 ADC_MISO)) (pad 25 smd oval (at 0 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)) (pad 26 smd oval (at -0.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 134 J2_5-)) + (net 133 J2_5-)) (pad 27 smd oval (at -1 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 135 J2_5+)) + (net 134 J2_5+)) (pad 28 smd oval (at -1.5 -2.45 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) - (net 136 J2_7-)) + (net 135 J2_7-)) (pad 29 smd rect (at 0.8375 0.8375 180) (size 1.675 1.675) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_paste_margin_ratio -0.2)) (pad 29 smd rect (at 0.8375 -0.8375 180) (size 1.675 1.675) (layers F.Cu F.Paste F.Mask) @@ -4815,9 +4815,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 225 USB_FPGA_D-)) + (net 224 USB_FPGA_D-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4851,9 +4851,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 204 USB_FPGA_D+)) + (net 203 USB_FPGA_D+)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (model Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4927,15 +4927,15 @@ (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 183 OLED_CLK)) + (net 182 OLED_CLK)) (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 184 OLED_MOSI)) + (net 183 OLED_MOSI)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 96 OLED_RES)) + (net 95 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 97 OLED_DC)) + (net 96 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 98 OLED_CS)) + (net 97 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4969,12 +4969,12 @@ (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) - (net 34 /analog/AUDIO_L)) + (net 33 /analog/AUDIO_L)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 35 /analog/AUDIO_R)) + (net 34 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -5020,43 +5020,43 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 108 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 107 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 109 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 108 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 110 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 109 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 111 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 110 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 112 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 111 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 113 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 112 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 114 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 113 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 115 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 114 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 46 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 45 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 107 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 106 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 36 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 35 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 37 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 36 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 106 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 105 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) ) @@ -5096,9 +5096,9 @@ (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl @@ -5141,13 +5141,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1)) + (net 7 BTN_F1)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1)) + (net 7 BTN_F1)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5188,13 +5188,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2)) + (net 8 BTN_F2)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 202 /blinkey/BTNPUL)) + (net 201 /blinkey/BTNPUL)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2)) + (net 8 BTN_F2)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5235,13 +5235,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U)) + (net 11 BTN_U)) (pad 1 smd rect (at -3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U)) + (net 11 BTN_U)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5282,13 +5282,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D)) + (net 6 BTN_D)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D)) + (net 6 BTN_D)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5329,13 +5329,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L)) + (net 9 BTN_L)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L)) + (net 9 BTN_L)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5376,13 +5376,13 @@ (fp_line (start -3.23 3.23) (end 3.23 3.23) (layer F.SilkS) (width 0.12)) (fp_circle (center 0 0) (end 1.75 -0.05) (layer F.Fab) (width 0.1)) (pad 2 smd rect (at -3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R)) + (net 10 BTN_R)) (pad 1 smd rect (at -3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 1 smd rect (at 3.98 -2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 203 /blinkey/BTNPUR)) + (net 202 /blinkey/BTNPUR)) (pad 2 smd rect (at 3.98 2.25 180) (size 1.55 1.3) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R)) + (net 10 BTN_R)) (model ${KISYS3DMOD}/Buttons_Switches_SMD.3dshapes/SW_SPST_PTS645.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5417,11 +5417,11 @@ (fp_line (start -4.4 -2.2) (end 4.4 -2.2) (layer B.CrtYd) (width 0.15)) (fp_line (start -4.4 2.2) (end 4.4 2.2) (layer B.CrtYd) (width 0.15)) (pad 4 smd rect (at -2.8 1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask) - (net 31 /power/OSCO_32k)) + (net 30 /power/OSCO_32k)) (pad 3 smd rect (at 2.8 1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)) (pad 2 smd rect (at 2.8 -1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -2.8 -1.4 180) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask) - (net 30 /power/OSCI_32k)) + (net 29 /power/OSCI_32k)) (model Crystals.3dshapes/Crystal_SMD_SeikoEpson_MC306-4pin_8.0x3.2mm_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5495,21 +5495,21 @@ (fp_line (start 5.8 6.3) (end 5.8 -6.3) (layer F.CrtYd) (width 0.05)) (fp_line (start 5.8 -6.3) (end -5.8 -6.3) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -4.305 -3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 221 SW3)) + (net 220 SW3)) (pad 5 smd rect (at 4.305 3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 2 smd rect (at -4.305 -1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 222 SW2)) + (net 221 SW2)) (pad 6 smd rect (at 4.305 1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 3 smd rect (at -4.305 1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 223 SW1)) + (net 222 SW1)) (pad 7 smd rect (at 4.305 -1.27 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (pad 4 smd rect (at -4.305 3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 224 SW0)) + (net 223 SW0)) (pad 8 smd rect (at 4.305 -3.81 270) (size 2.44 1.12) (layers F.Cu F.Mask) - (net 220 "Net-(R51-Pad2)")) + (net 219 "Net-(R51-Pad2)")) (model Buttons_Switches_SMD.3dshapes/SW_SPST_FSMSM.wrl (at (xyz 0 0.15 0)) (scale (xyz 1 1 1)) @@ -5558,7 +5558,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -5603,7 +5603,7 @@ (pad 1 smd rect (at -2.5 0) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 2.5 0) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) - (net 45 USB5V)) + (net 44 USB5V)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SMA.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5644,7 +5644,7 @@ (fp_line (start -4.4 -1.65) (end 2.5 -1.65) (layer B.SilkS) (width 0.12)) (fp_line (start -4.4 1.65) (end 2.5 1.65) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -2.5 0 180) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) - (net 18 "Net-(D9-Pad1)")) + (net 17 "Net-(D9-Pad1)")) (pad 2 smd rect (at 2.5 0 180) (size 3.5 1.8) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SMA.wrl @@ -5725,137 +5725,137 @@ (fp_line (start 8.6 -8.6) (end 8.6 8.6) (layer F.SilkS) (width 0.15)) (fp_line (start -8.6 -8.6) (end 8.6 -8.6) (layer F.SilkS) (width 0.15)) (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 125 J1_27+) (solder_mask_margin 0.04)) + (net 124 J1_27+) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 179 AUDIO_R3) (solder_mask_margin 0.04)) + (net 178 AUDIO_R3) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 J1_25+) (solder_mask_margin 0.04)) + (net 122 J1_25+) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 J1_25-) (solder_mask_margin 0.04)) + (net 121 J1_25-) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 J1_23+) (solder_mask_margin 0.04)) + (net 120 J1_23+) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 J1_13+) (solder_mask_margin 0.04)) + (net 156 J1_13+) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 J1_13-) (solder_mask_margin 0.04)) + (net 155 J1_13-) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 153 J1_9+) (solder_mask_margin 0.04)) + (net 152 J1_9+) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 151 J1_7+) (solder_mask_margin 0.04)) + (net 150 J1_7+) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 150 J1_7-) (solder_mask_margin 0.04)) + (net 149 J1_7-) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 GPDI_D2+) (solder_mask_margin 0.04)) + (net 107 GPDI_D2+) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 GPDI_D2-) (solder_mask_margin 0.04)) + (net 108 GPDI_D2-) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 110 GPDI_D1+) (solder_mask_margin 0.04)) + (net 109 GPDI_D1+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 GPDI_D0+) (solder_mask_margin 0.04)) + (net 111 GPDI_D0+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 GPDI_CLK+) (solder_mask_margin 0.04)) + (net 113 GPDI_CLK+) (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 247 /gpdi/FPGA_CEC) (solder_mask_margin 0.04)) + (net 245 /gpdi/FPGA_CEC) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 GPDI_ETH+) (solder_mask_margin 0.04)) + (net 106 GPDI_ETH+) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 J1_27-) (solder_mask_margin 0.04)) + (net 123 J1_27-) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 185 LED0) (solder_mask_margin 0.04)) + (net 184 LED0) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 178 AUDIO_L0) (solder_mask_margin 0.04)) + (net 177 AUDIO_L0) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 J1_29-) (solder_mask_margin 0.04)) + (net 125 J1_29-) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 180 AUDIO_R2) (solder_mask_margin 0.04)) + (net 179 AUDIO_R2) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 J1_23-) (solder_mask_margin 0.04)) + (net 119 J1_23-) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 J1_15-) (solder_mask_margin 0.04)) + (net 157 J1_15-) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 J1_11+) (solder_mask_margin 0.04)) + (net 154 J1_11+) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 152 J1_9-) (solder_mask_margin 0.04)) + (net 151 J1_9-) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 J1_5+) (solder_mask_margin 0.04)) + (net 148 J1_5+) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 171 J2_33+) (solder_mask_margin 0.04)) + (net 170 J2_33+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 169 J2_31+) (solder_mask_margin 0.04)) + (net 168 J2_31+) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 GPDI_D0-) (solder_mask_margin 0.04)) + (net 112 GPDI_D0-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 J2_27+) (solder_mask_margin 0.04)) + (net 164 J2_27+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 GPDI_CLK-) (solder_mask_margin 0.04)) + (net 114 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 38 GPDI_SDA) (solder_mask_margin 0.04)) + (net 37 GPDI_SDA) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 GPDI_ETH-) (solder_mask_margin 0.04)) + (net 105 GPDI_ETH-) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 187 LED2) (solder_mask_margin 0.04)) + (net 186 LED2) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 186 LED1) (solder_mask_margin 0.04)) + (net 185 LED1) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 177 AUDIO_L1) (solder_mask_margin 0.04)) + (net 176 AUDIO_L1) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 J1_29+) (solder_mask_margin 0.04)) + (net 126 J1_29+) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 182 AUDIO_R0) (solder_mask_margin 0.04)) + (net 181 AUDIO_R0) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 J1_17+) (solder_mask_margin 0.04)) + (net 118 J1_17+) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 J1_17-) (solder_mask_margin 0.04)) + (net 117 J1_17-) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 J1_15+) (solder_mask_margin 0.04)) + (net 158 J1_15+) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 J1_11-) (solder_mask_margin 0.04)) + (net 153 J1_11-) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 J1_5-) (solder_mask_margin 0.04)) + (net 147 J1_5-) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 39 GPDI_SCL) (solder_mask_margin 0.04)) + (net 38 GPDI_SCL) (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 170 J2_33-) (solder_mask_margin 0.04)) + (net 169 J2_33-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 GPDI_D1-) (solder_mask_margin 0.04)) + (net 110 GPDI_D1-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 168 J2_31-) (solder_mask_margin 0.04)) + (net 167 J2_31-) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 J2_29+) (solder_mask_margin 0.04)) + (net 166 J2_29+) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 J2_27-) (solder_mask_margin 0.04)) + (net 163 J2_27-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 J2_23+) (solder_mask_margin 0.04)) + (net 146 J2_23+) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_D11) (solder_mask_margin 0.04)) + (net 65 SDRAM_D11) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 189 LED4) (solder_mask_margin 0.04)) + (net 188 LED4) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 188 LED3) (solder_mask_margin 0.04)) + (net 187 LED3) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 176 AUDIO_L2) (solder_mask_margin 0.04)) + (net 175 AUDIO_L2) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 181 AUDIO_R1) (solder_mask_margin 0.04)) + (net 180 AUDIO_R1) (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 193 BTN_PWRn) (solder_mask_margin 0.04)) + (net 192 BTN_PWRn) (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 222 SW2) (solder_mask_margin 0.04)) + (net 221 SW2) (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 223 SW1) (solder_mask_margin 0.04)) + (net 222 SW1) (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5865,37 +5865,37 @@ (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 173 J2_35+) (solder_mask_margin 0.04)) + (net 172 J2_35+) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 J2_25+) (solder_mask_margin 0.04)) + (net 162 J2_25+) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 J2_29-) (solder_mask_margin 0.04)) + (net 165 J2_29-) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 J2_23-) (solder_mask_margin 0.04)) + (net 145 J2_23-) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 J2_17+) (solder_mask_margin 0.04)) + (net 142 J2_17+) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_D10) (solder_mask_margin 0.04)) + (net 68 SDRAM_D10) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_D9) (solder_mask_margin 0.04)) + (net 69 SDRAM_D9) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 191 LED6) (solder_mask_margin 0.04)) + (net 190 LED6) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 190 LED5) (solder_mask_margin 0.04)) + (net 189 LED5) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 J1_31-) (solder_mask_margin 0.04)) + (net 127 J1_31-) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 175 AUDIO_L3) (solder_mask_margin 0.04)) + (net 174 AUDIO_L3) (solder_mask_margin 0.04)) (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 246 AUDIO_V0) (solder_mask_margin 0.04)) + (net 244 AUDIO_V0) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 221 SW3) (solder_mask_margin 0.04)) + (net 220 SW3) (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 224 SW0) (solder_mask_margin 0.04)) + (net 223 SW0) (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5905,33 +5905,33 @@ (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 172 J2_35-) (solder_mask_margin 0.04)) + (net 171 J2_35-) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 J2_25-) (solder_mask_margin 0.04)) + (net 161 J2_25-) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 204 USB_FPGA_D+) (solder_mask_margin 0.04)) + (net 203 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 J2_17-) (solder_mask_margin 0.04)) + (net 141 J2_17-) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_D12) (solder_mask_margin 0.04)) + (net 61 SDRAM_D12) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D8) (solder_mask_margin 0.04)) + (net 72 SDRAM_D8) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 83 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 WIFI_EN) (solder_mask_margin 0.04)) + (net 98 WIFI_EN) (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 244 AUDIO_V2) (solder_mask_margin 0.04)) + (net 242 AUDIO_V2) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 J1_33-) (solder_mask_margin 0.04)) + (net 129 J1_33-) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 J1_31+) (solder_mask_margin 0.04)) + (net 128 J1_31+) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 245 AUDIO_V1) (solder_mask_margin 0.04)) + (net 243 AUDIO_V1) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad F8 smd circle (at -2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5949,27 +5949,27 @@ (pad F14 smd circle (at 2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad F15 smd circle (at 3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad F16 smd circle (at 4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 225 USB_FPGA_D-) (solder_mask_margin 0.04)) + (net 224 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 J2_15+) (solder_mask_margin 0.04)) + (net 160 J2_15+) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_D13) (solder_mask_margin 0.04)) + (net 55 SDRAM_D13) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 54 SDRAM_CLK) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 48 SDRAM_CKE) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 230 /usb/ANT_433MHz) (solder_mask_margin 0.04)) + (net 229 /usb/ANT_433MHz) (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 201 CLK_25MHz) (solder_mask_margin 0.04)) + (net 200 CLK_25MHz) (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 131 J1_33+) (solder_mask_margin 0.04)) + (net 130 J1_33+) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 132 J1_35-) (solder_mask_margin 0.04)) + (net 131 J1_35-) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -5995,37 +5995,37 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 J2_15-) (solder_mask_margin 0.04)) + (net 159 J2_15-) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 241 SDRAM_A12) (solder_mask_margin 0.04)) + (net 239 SDRAM_A12) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_A11) (solder_mask_margin 0.04)) + (net 60 SDRAM_A11) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 174 SD_D3) (solder_mask_margin 0.04)) + (net 173 SD_D3) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 200 SD_D2) (solder_mask_margin 0.04)) + (net 199 SD_D2) (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 192 LED7) (solder_mask_margin 0.04)) + (net 191 LED7) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 133 J1_35+) (solder_mask_margin 0.04)) + (net 132 J1_35+) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 243 AUDIO_V3) (solder_mask_margin 0.04)) + (net 241 AUDIO_V3) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H7 smd circle (at -2.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H8 smd circle (at -2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H9 smd circle (at -1.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H10 smd circle (at -0.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H11 smd circle (at 0.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H12 smd circle (at 1.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H13 smd circle (at 2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad H14 smd circle (at 2.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad H15 smd circle (at 3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6033,19 +6033,19 @@ (pad H16 smd circle (at 4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 J2_13-) (solder_mask_margin 0.04)) + (net 139 J2_13-) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 J2_13+) (solder_mask_margin 0.04)) + (net 140 J2_13+) (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A9) (solder_mask_margin 0.04)) + (net 70 SDRAM_A9) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 42 SD_CLK) (solder_mask_margin 0.04)) + (net 41 SD_CLK) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 41 SD_CMD) (solder_mask_margin 0.04)) + (net 40 SD_CMD) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6055,7 +6055,7 @@ (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J8 smd circle (at -2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad J9 smd circle (at -1.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J10 smd circle (at -0.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6065,29 +6065,29 @@ (pad J12 smd circle (at 1.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J13 smd circle (at 2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad J14 smd circle (at 2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J15 smd circle (at 3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J16 smd circle (at 4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_D0) (solder_mask_margin 0.04)) + (net 79 SDRAM_D0) (solder_mask_margin 0.04)) (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D15) (solder_mask_margin 0.04)) + (net 50 SDRAM_D15) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_D14) (solder_mask_margin 0.04)) + (net 59 SDRAM_D14) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_A8) (solder_mask_margin 0.04)) + (net 73 SDRAM_A8) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_A7) (solder_mask_margin 0.04)) + (net 49 SDRAM_A7) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 44 SD_D1) (solder_mask_margin 0.04)) + (net 43 SD_D1) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 43 SD_D0) (solder_mask_margin 0.04)) + (net 42 SD_D0) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 WIFI_RXD) (solder_mask_margin 0.04)) + (net 102 WIFI_RXD) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 105 WIFI_TXD) (solder_mask_margin 0.04)) + (net 104 WIFI_TXD) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6095,7 +6095,7 @@ (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K8 smd circle (at -2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad K9 smd circle (at -1.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K10 smd circle (at -0.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6105,7 +6105,7 @@ (pad K12 smd circle (at 1.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K13 smd circle (at 2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad K14 smd circle (at 2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K15 smd circle (at 3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6115,19 +6115,19 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A6) (solder_mask_margin 0.04)) + (net 53 SDRAM_A6) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A5) (solder_mask_margin 0.04)) + (net 58 SDRAM_A5) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_A4) (solder_mask_margin 0.04)) + (net 63 SDRAM_A4) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 228 WIFI_GPIO16) (solder_mask_margin 0.04)) + (net 227 WIFI_GPIO16) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 104 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 103 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 239 FTDI_TXDEN) (solder_mask_margin 0.04)) + (net 237 FTDI_TXDEN) (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 FTDI_RXD) (solder_mask_margin 0.04)) + (net 101 FTDI_RXD) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6135,7 +6135,7 @@ (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L8 smd circle (at -2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad L9 smd circle (at -1.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad L10 smd circle (at -0.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6145,27 +6145,27 @@ (pad L12 smd circle (at 1.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad L13 smd circle (at 2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad L14 smd circle (at 2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L15 smd circle (at 3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L16 smd circle (at 4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 J2_11+) (solder_mask_margin 0.04)) + (net 144 J2_11+) (solder_mask_margin 0.04)) (pad L17 smd circle (at 5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 J2_11-) (solder_mask_margin 0.04)) + (net 143 J2_11-) (solder_mask_margin 0.04)) (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_D1) (solder_mask_margin 0.04)) + (net 78 SDRAM_D1) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_A3) (solder_mask_margin 0.04)) + (net 66 SDRAM_A3) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_A2) (solder_mask_margin 0.04)) + (net 74 SDRAM_A2) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 FTDI_TXD) (solder_mask_margin 0.04)) + (net 100 FTDI_TXD) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 99 FTDI_nRTS) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6175,7 +6175,7 @@ (pad M7 smd circle (at -2.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M8 smd circle (at -2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad M9 smd circle (at -1.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M10 smd circle (at -0.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6185,7 +6185,7 @@ (pad M12 smd circle (at 1.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M13 smd circle (at 2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad M14 smd circle (at 2.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M15 smd circle (at 3.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6193,19 +6193,19 @@ (pad M16 smd circle (at 4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 J2_9-) (solder_mask_margin 0.04)) + (net 137 J2_9-) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_D2) (solder_mask_margin 0.04)) + (net 77 SDRAM_D2) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_A1) (solder_mask_margin 0.04)) + (net 75 SDRAM_A1) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_A0) (solder_mask_margin 0.04)) + (net 76 SDRAM_A0) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 48 FTDI_nDTR) (solder_mask_margin 0.04)) + (net 47 FTDI_nDTR) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 OLED_CS) (solder_mask_margin 0.04)) + (net 97 OLED_CS) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 229 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 228 WIFI_GPIO15) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6215,43 +6215,43 @@ (pad N7 smd circle (at -2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N8 smd circle (at -2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N9 smd circle (at -1.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N10 smd circle (at -0.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N11 smd circle (at 0.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N12 smd circle (at 1.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N13 smd circle (at 2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 6 +1V2) (solder_mask_margin 0.04)) + (net 249 +1V1) (solder_mask_margin 0.04)) (pad N14 smd circle (at 2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N15 smd circle (at 3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 J2_9+) (solder_mask_margin 0.04)) + (net 138 J2_9+) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 J2_7+) (solder_mask_margin 0.04)) + (net 136 J2_7+) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_D3) (solder_mask_margin 0.04)) + (net 71 SDRAM_D3) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_A10) (solder_mask_margin 0.04)) + (net 64 SDRAM_A10) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 51 SDRAM_BA1) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 OLED_DC) (solder_mask_margin 0.04)) + (net 96 OLED_DC) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 OLED_RES) (solder_mask_margin 0.04)) + (net 95 OLED_RES) (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 184 OLED_MOSI) (solder_mask_margin 0.04)) + (net 183 OLED_MOSI) (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 183 OLED_CLK) (solder_mask_margin 0.04)) + (net 182 OLED_CLK) (solder_mask_margin 0.04)) (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad P8 smd circle (at -2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6269,39 +6269,39 @@ (pad P14 smd circle (at 2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad P15 smd circle (at 3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 14 +2V5) (solder_mask_margin 0.04)) + (net 13 +2V5) (solder_mask_margin 0.04)) (pad P16 smd circle (at 4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 J2_7-) (solder_mask_margin 0.04)) + (net 135 J2_7-) (solder_mask_margin 0.04)) (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 219 ADC_SCLK) (solder_mask_margin 0.04)) + (net 218 ADC_SCLK) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D4) (solder_mask_margin 0.04)) + (net 67 SDRAM_D4) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 56 SDRAM_BA0) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 81 SDRAM_nCS) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 8 BTN_F1) (solder_mask_margin 0.04)) + (net 7 BTN_F1) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 91 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 20 JTAG_TDI) (solder_mask_margin 0.04)) + (net 19 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 217 ADC_MOSI) (solder_mask_margin 0.04)) + (net 216 ADC_MOSI) (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 218 ADC_CSn) (solder_mask_margin 0.04)) + (net 217 ADC_CSn) (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 82 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad T1 smd circle (at -7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 9 BTN_F2) (solder_mask_margin 0.04)) + (net 8 BTN_F2) (solder_mask_margin 0.04)) (pad T2 smd circle (at -6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T3 smd circle (at -6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6309,7 +6309,7 @@ (pad T4 smd circle (at -5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad T5 smd circle (at -4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 21 JTAG_TCK) (solder_mask_margin 0.04)) + (net 20 JTAG_TCK) (solder_mask_margin 0.04)) (pad T6 smd circle (at -3.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad T7 smd circle (at -2.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6333,23 +6333,23 @@ (pad T16 smd circle (at 4.4 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D6) (solder_mask_margin 0.04)) + (net 57 SDRAM_D6) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D5) (solder_mask_margin 0.04)) + (net 62 SDRAM_D5) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 84 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 85 SDRAM_nWE) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 10 BTN_L) (solder_mask_margin 0.04)) + (net 9 BTN_L) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 90 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 22 JTAG_TMS) (solder_mask_margin 0.04)) + (net 21 JTAG_TMS) (solder_mask_margin 0.04)) (pad U6 smd circle (at -3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U7 smd circle (at -2.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6371,23 +6371,23 @@ (pad U15 smd circle (at 3.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U16 smd circle (at 4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 216 ADC_MISO) (solder_mask_margin 0.04)) + (net 215 ADC_MISO) (solder_mask_margin 0.04)) (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 J2_5-) (solder_mask_margin 0.04)) + (net 133 J2_5-) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 J2_5+) (solder_mask_margin 0.04)) + (net 134 J2_5+) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 80 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D7) (solder_mask_margin 0.04)) + (net 52 SDRAM_D7) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 7 BTN_D) (solder_mask_margin 0.04)) + (net 6 BTN_D) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 89 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 94 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 23 JTAG_TDO) (solder_mask_margin 0.04)) + (net 22 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad V6 smd circle (at -3.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6421,11 +6421,11 @@ (pad V20 smd circle (at 7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 12 BTN_U) (solder_mask_margin 0.04)) + (net 11 BTN_U) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 88 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 92 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6461,9 +6461,9 @@ (pad W20 smd circle (at 7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 11 BTN_R) (solder_mask_margin 0.04)) + (net 10 BTN_R) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 93 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -6519,7 +6519,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 233 /power/P1V2)) + (net 248 /power/P1V1)) (pad 2 smd rect (at 1.25 0) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6555,7 +6555,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6591,7 +6591,7 @@ (fp_line (start 2.25 -0.87) (end 2.25 0.88) (layer B.CrtYd) (width 0.05)) (fp_line (start 2.25 -0.87) (end -2.25 -0.87) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Capacitors_SMD.3dshapes/C_0805.wrl @@ -6627,7 +6627,7 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Resistors_SMD.3dshapes/R_0603.wrl @@ -6663,9 +6663,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 94 /flash/FPGA_DONE)) + (net 93 /flash/FPGA_DONE)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 232 PROG_DONE)) + (net 231 PROG_DONE)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -6701,21 +6701,21 @@ (fp_line (start 6.15 -7.95) (end -6.15 -7.95) (layer F.Fab) (width 0.15)) (fp_line (start 6.15 8) (end 6.15 -7.95) (layer F.Fab) (width 0.15)) (pad 1 smd rect (at 3.2 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 200 SD_D2)) + (net 199 SD_D2)) (pad 2 smd rect (at 2.1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 174 SD_D3)) + (net 173 SD_D3)) (pad 3 smd rect (at 1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 41 SD_CMD)) + (net 40 SD_CMD)) (pad 4 smd rect (at -0.1 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 199 /sdcard/SD3V3)) + (net 198 /sdcard/SD3V3)) (pad 5 smd rect (at -1.2 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 42 SD_CLK)) + (net 41 SD_CLK)) (pad 6 smd rect (at -2.3 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -3.4 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 43 SD_D0)) + (net 42 SD_D0)) (pad 8 smd rect (at -4.5 2.2 180) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) - (net 44 SD_D1)) + (net 43 SD_D1)) (pad 10 smd rect (at 6.875 6.5 180) (size 1.45 0.9) (layers F.Cu F.Paste F.Mask)) (pad 11 smd rect (at -6.875 -5.15 270) (size 0.9 1.45) (layers F.Cu F.Paste F.Mask)) (pad 9 smd rect (at -6.875 4.8 180) (size 1.45 2) (layers F.Cu F.Paste F.Mask) @@ -6940,9 +6940,9 @@ (fp_line (start -4 6.7) (end -4 6) (layer B.Fab) (width 0.1)) (fp_line (start -4 6.7) (end 4 6.7) (layer B.Fab) (width 0.1)) (pad 1 smd rect (at -7.9 0 180) (size 3.5 3.3) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 1 smd rect (at 7.9 0 180) (size 3.5 3.3) (layers B.Cu B.Paste B.Mask) - (net 19 /power/VBAT)) + (net 18 /power/VBAT)) (pad 2 smd circle (at 0 0 180) (size 9 9) (layers B.Cu B.Mask) (net 1 GND)) (model Battery_Holders.3dshapes/Keystone_3000_1x12mm-CoinCell.wrl @@ -6985,7 +6985,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 226 /usb/FPD+)) + (net 225 /usb/FPD+)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7028,7 +7028,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 227 /usb/FPD-)) + (net 226 /usb/FPD-)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7071,9 +7071,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 27 /power/WAKE)) + (net 26 /power/WAKE)) (pad 2 smd rect (at 1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7114,7 +7114,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 28 /power/HOLD)) + (net 27 /power/HOLD)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7157,9 +7157,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 15 /power/PWREN)) + (net 14 /power/PWREN)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 205 /power/FTDI_nSUSPEND)) + (net 204 /power/FTDI_nSUSPEND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7200,7 +7200,7 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 25 /power/WKUP)) + (net 24 /power/WKUP)) (pad 2 smd rect (at 1.25 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl @@ -7245,7 +7245,7 @@ (pad 1 smd rect (at -1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.25 0 90) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7286,9 +7286,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 26 /power/SHUT)) + (net 25 /power/SHUT)) (pad 2 smd rect (at 1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 33 SHUTDOWN)) + (net 32 SHUTDOWN)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7329,9 +7329,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 1.25 0) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 24 /power/WAKEUPn)) + (net 23 /power/WAKEUPn)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7372,9 +7372,9 @@ (fp_line (start -1.9 -0.85) (end 1.25 -0.85) (layer B.SilkS) (width 0.12)) (fp_line (start -1.9 0.85) (end 1.25 0.85) (layer B.SilkS) (width 0.12)) (pad 1 smd rect (at -1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 231 /power/PWRBTn)) + (net 230 /power/PWRBTn)) (pad 2 smd rect (at 1.25 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 193 BTN_PWRn)) + (net 192 BTN_PWRn)) (model ${KISYS3DMOD}/Diodes_SMD.3dshapes/D_SOD-323.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7395,9 +7395,9 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 235 /power/P2V5)) + (net 233 /power/P2V5)) (pad 2 smd rect (at 0.6 0 270) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 14 +2V5)) + (net 13 +2V5)) ) (module jumper:SOLDER-JUMPER_1-WAY (layer B.Cu) (tedit 59DFC21C) (tstamp 59DFBD6B) @@ -7413,7 +7413,7 @@ (fp_line (start -0.889 -0.635) (end 0.889 -0.635) (layer B.SilkS) (width 0.15)) (fp_line (start -0.889 0.635) (end 0.889 0.635) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -0.6 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) - (net 234 /power/P3V3)) + (net 232 /power/P3V3)) (pad 2 smd rect (at 0.6 0 180) (size 1 1) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -7446,7 +7446,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 239 FTDI_TXDEN)) + (net 237 FTDI_TXDEN)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7560,9 +7560,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 243 AUDIO_V3)) + (net 241 AUDIO_V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7596,9 +7596,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 244 AUDIO_V2)) + (net 242 AUDIO_V2)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7632,9 +7632,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 245 AUDIO_V1)) + (net 243 AUDIO_V1)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7668,9 +7668,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 246 AUDIO_V0)) + (net 244 AUDIO_V0)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 242 /analog/AUDIO_V)) + (net 240 /analog/AUDIO_V)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7704,9 +7704,9 @@ (fp_line (start 1.95 -0.7) (end 1.95 0.7) (layer B.CrtYd) (width 0.05)) (fp_line (start 1.95 -0.7) (end -1.96 -0.7) (layer B.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_CEC)) + (net 45 GPDI_CEC)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 247 /gpdi/FPGA_CEC)) + (net 245 /gpdi/FPGA_CEC)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7745,9 +7745,9 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 249 WIFI_GPIO2)) + (net 247 WIFI_GPIO2)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 248 /blinkey/LED_WIFI)) + (net 246 /blinkey/LED_WIFI)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7781,7 +7781,7 @@ (fp_line (start 1.95 0.7) (end 1.95 -0.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.95 0.7) (end -1.96 0.7) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) - (net 248 /blinkey/LED_WIFI)) + (net 246 /blinkey/LED_WIFI)) (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0603.wrl @@ -7822,9 +7822,9 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 195 FTDI_nSLEEP)) + (net 194 FTDI_nSLEEP)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 196 /blinkey/LED_PWREN)) + (net 195 /blinkey/LED_PWREN)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -7863,7 +7863,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 206 /blinkey/ALED0)) + (net 205 /blinkey/ALED0)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7904,7 +7904,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 207 /blinkey/ALED1)) + (net 206 /blinkey/ALED1)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7945,7 +7945,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 208 /blinkey/ALED2)) + (net 207 /blinkey/ALED2)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -7986,7 +7986,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 209 /blinkey/ALED3)) + (net 208 /blinkey/ALED3)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8027,7 +8027,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 210 /blinkey/ALED4)) + (net 209 /blinkey/ALED4)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8068,7 +8068,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 211 /blinkey/ALED5)) + (net 210 /blinkey/ALED5)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8109,7 +8109,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 212 /blinkey/ALED6)) + (net 211 /blinkey/ALED6)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8150,7 +8150,7 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 213 /blinkey/ALED7)) + (net 212 /blinkey/ALED7)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl @@ -8191,9 +8191,9 @@ (effects (font (size 0.4 0.4) (thickness 0.1))) ) (pad 2 smd rect (at 1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 198 FT3V3)) + (net 197 FT3V3)) (pad 1 smd rect (at -1.1 0 270) (size 1.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 197 /blinkey/LED_TXLED)) + (net 196 /blinkey/LED_TXLED)) (model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -8702,7 +8702,7 @@ (gr_text 3.3V (at 142.36 85.804) (layer B.SilkS) (effects (font (size 1.5 1.5) (thickness 0.3)) (justify mirror)) ) - (gr_text 1.2V (at 142.233 90.884) (layer B.SilkS) + (gr_text 1.1V (at 142.233 90.884) (layer B.SilkS) (effects (font (size 1.5 1.5) (thickness 0.3)) (justify mirror)) ) (gr_text TCK (at 143.63 107.14 90) (layer B.SilkS) @@ -9700,3371 +9700,3371 @@ (segment (start 137.28 84.2) (end 137.68 84.2) (width 0.3) (layer F.Cu) (net 5)) (segment (start 142.08 85.8) (end 142.08 86.6) (width 0.3) (layer F.Cu) (net 5)) (segment (start 134.88 88.2) (end 135.68 88.2) (width 0.3) (layer F.Cu) (net 5)) - (segment (start 140.88 90.4) (end 140.88 90.6) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 140.88 90.2) (end 140.88 90.4) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 138.88 89.6) (end 138.88 90.4) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 138.88 90.4) (end 138.88 90.6) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 140.88 90.4) (end 138.88 90.4) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 140.88 90.6) (end 138.88 90.6) (width 0.3) (layer In1.Cu) (net 6)) - (segment (start 139.28 90.12299) (end 138.82301 90.12299) (width 0.3) (layer B.Cu) (net 6)) - (segment (start 138.82301 90.12299) (end 138.55 90.396) (width 0.3) (layer B.Cu) (net 6)) - (segment (start 137.689001 89.840148) (end 137.689001 90.12299) (width 0.3) (layer F.Cu) (net 6)) - (segment (start 137.689001 89.634002) (end 137.689001 89.840148) (width 0.3) (layer F.Cu) (net 6)) - (segment (start 137.68 89.625001) (end 137.689001 89.634002) (width 0.3) (layer F.Cu) (net 6)) - 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