From 53d368cea79d50c9700284556f6867fed8a8a0ab Mon Sep 17 00:00:00 2001 From: Emard Date: Fri, 8 Jun 2018 22:10:53 +0200 Subject: [PATCH] PCB: SDRAM new footprint, dot for pin 1 for SW1 and ADC --- ulx3s.kicad_pcb | 289 ++++++++++++++++++++++---------------------- ulx3s.kicad_pcb-bak | 271 ++++++++++++++++++++--------------------- 2 files changed, 282 insertions(+), 278 deletions(-) diff --git a/ulx3s.kicad_pcb b/ulx3s.kicad_pcb index a2be006..f42ac4b 100644 --- a/ulx3s.kicad_pcb +++ b/ulx3s.kicad_pcb @@ -2,7 +2,7 @@ (general (thickness 1.6) - (drawings 492) + (drawings 494) (tracks 4878) (zones 0) (modules 210) @@ -753,6 +753,141 @@ (uvia_drill 0.1) ) + (module TSOP54:TSOP54 (layer F.Cu) (tedit 5B1ADE42) (tstamp 5A111CAC) + (at 165.093 87.8 90) + (descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)") + (tags "TSOPII 0.8") + (path /58D6D507/5A04F49A) + (attr smd) + (fp_text reference U2 (at 6.98 -9.993 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MT48LC16M16A2TG (at 0 12 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -5.08 11.1) (end -5.08 10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 11.1) (end 5.08 10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -10.9) (end -5.9 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -11.1) (end -5.08 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 -11.1) (end 5.08 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 11.11) (end -5.08 11.11) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -11.11) (end -0.635 -11.11) (layer F.SilkS) (width 0.15)) + (fp_arc (start 0 -11.049) (end -0.635 -11.049) (angle -180) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.635 -11.11) (end 5.08 -11.11) (layer F.SilkS) (width 0.15)) + (pad 28 smd rect (at 5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 75 SDRAM_D0)) + (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 74 SDRAM_D1)) + (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 73 SDRAM_D2)) + (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 67 SDRAM_D3)) + (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 63 SDRAM_D4)) + (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 58 SDRAM_D5)) + (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 53 SDRAM_D6)) + (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 48 SDRAM_D7)) + (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 76 SDRAM_DQM0)) + (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 81 SDRAM_nWE)) + (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 80 SDRAM_nCAS)) + (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 78 SDRAM_nRAS)) + (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 77 SDRAM_nCS)) + (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 52 SDRAM_BA0)) + (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 47 SDRAM_BA1)) + (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 60 SDRAM_A10)) + (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 72 SDRAM_A0)) + (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 71 SDRAM_A1)) + (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 70 SDRAM_A2)) + (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 62 SDRAM_A3)) + (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 59 SDRAM_A4)) + (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 54 SDRAM_A5)) + (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 49 SDRAM_A6)) + (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 45 SDRAM_A7)) + (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 69 SDRAM_A8)) + (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 66 SDRAM_A9)) + (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 56 SDRAM_A11)) + (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 164 SDRAM_A12)) + (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 44 SDRAM_CKE)) + (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 50 SDRAM_CLK)) + (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 79 SDRAM_DQM1)) + (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) + (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 68 SDRAM_D8)) + (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 65 SDRAM_D9)) + (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 64 SDRAM_D10)) + (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 61 SDRAM_D11)) + (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 57 SDRAM_D12)) + (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 51 SDRAM_D13)) + (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 55 SDRAM_D14)) + (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 46 SDRAM_D15)) + (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ./footprints/sdram/TSOP54.3dshapes/TSOP54.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.3937 0.3937 0.3937)) + (rotate (xyz 0 0 90)) + ) + ) + (module SOA008-150mil:SOA008-150-208mil (layer B.Cu) (tedit 5B1AD4D5) (tstamp 5B3C9488) (at 118.245 85.822 270) (descr "Cypress SOA008 SOIC-8 150/208 mil") @@ -3454,140 +3589,6 @@ (fp_line (start -5.6 2) (end -4.6 0) (layer B.SilkS) (width 0.3)) ) - (module TSOP54:TSOP54 (layer F.Cu) (tedit 55BAC4E8) (tstamp 5A111CAC) - (at 165.093 87.8 90) - (descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)") - (tags "TSOPII 0.8") - (path /58D6D507/5A04F49A) - (attr smd) - (fp_text reference U2 (at 6.98 -9.993 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value MT48LC16M16A2TG (at 0 12 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -5.08 11.1) (end -5.08 10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 11.1) (end 5.08 10.9) (layer F.SilkS) (width 0.15)) - (fp_circle (center -4.25 -10.25) (end -4 -10.25) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -10.9) (end -5.9 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -11.1) (end -5.08 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 -11.1) (end 5.08 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 11.11) (end -5.08 11.11) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -11.11) (end 5.08 -11.11) (layer F.SilkS) (width 0.15)) - (pad 28 smd rect (at 5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D0)) - (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_D1)) - (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D2)) - (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_D3)) - (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D4)) - (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D5)) - (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D6)) - (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 48 SDRAM_D7)) - (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_DQM0)) - (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_nWE)) - (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_nCAS)) - (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_nRAS)) - (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_nCS)) - (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA0)) - (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 47 SDRAM_BA1)) - (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_A10)) - (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_A0)) - (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A1)) - (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_A2)) - (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_A3)) - (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A4)) - (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A5)) - (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_A6)) - (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 45 SDRAM_A7)) - (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_A8)) - (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_A9)) - (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_A11)) - (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_A12)) - (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 44 SDRAM_CKE)) - (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_CLK)) - (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_DQM1)) - (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) - (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D8)) - (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_D9)) - (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_D10)) - (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_D11)) - (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_D12)) - (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D13)) - (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_D14)) - (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 46 SDRAM_D15)) - (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (model ./footprints/sdram/TSOP54.3dshapes/TSOP54.wrl - (at (xyz 0 0 0)) - (scale (xyz 0.3937 0.3937 0.3937)) - (rotate (xyz 0 0 90)) - ) - ) - (module emard:emard12mm (layer F.Cu) (tedit 5A54AE11) (tstamp 5A54ADFE) (at 125.342 88.344 90) (descr EMARD) @@ -10130,6 +10131,8 @@ (xy -7.369779 -0.171286) (xy -7.369779 -1.282268) (xy -8.215312 -1.282268) (xy -8.215312 0.906264)) (layer B.SilkS) (width 0)) ) + (gr_circle (center 153.551 76.551) (end 153.678 76.551) (layer F.SilkS) (width 0.2) (tstamp 5B1AF3C4)) + (gr_circle (center 179.459 103.475) (end 179.586 103.475) (layer F.SilkS) (width 0.2)) (gr_text 9 (at 99.703 95.728) (layer B.SilkS) (tstamp 5B283687) (effects (font (size 1 1) (thickness 0.25)) (justify mirror)) ) @@ -15758,7 +15761,7 @@ (segment (start 177.3 91.043) (end 178.998 91.043) (width 0.3) (layer B.Cu) (net 316)) (segment (start 178.998 91.043) (end 179.078 90.963) (width 0.3) (layer B.Cu) (net 316)) - (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5B285272) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5B1AFAD6) (hatch edge 0.508) (connect_pads (clearance 0.254)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -17624,7 +17627,7 @@ ) ) ) - (zone (net 13) (net_name +2V5) (layer In1.Cu) (tstamp 5B28526F) (hatch edge 0.508) + (zone (net 13) (net_name +2V5) (layer In1.Cu) (tstamp 5B1AFAD3) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -17690,7 +17693,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer In2.Cu) (tstamp 5B28526C) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer In2.Cu) (tstamp 5B1AFAD0) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.1) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -18880,7 +18883,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5B285269) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5B1AFACD) (hatch edge 0.508) (connect_pads (clearance 0.254)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -19999,7 +20002,7 @@ ) ) ) - (zone (net 264) (net_name 2V5_3V3) (layer In1.Cu) (tstamp 5B285266) (hatch edge 0.508) + (zone (net 264) (net_name 2V5_3V3) (layer In1.Cu) (tstamp 5B1AFACA) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.127) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -20250,7 +20253,7 @@ ) ) ) - (zone (net 172) (net_name +1V1) (layer In1.Cu) (tstamp 5B285263) (hatch edge 0.508) + (zone (net 172) (net_name +1V1) (layer In1.Cu) (tstamp 5B1AFAC7) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -20327,7 +20330,7 @@ ) ) ) - (zone (net 264) (net_name 2V5_3V3) (layer In1.Cu) (tstamp 5B285260) (hatch edge 0.508) + (zone (net 264) (net_name 2V5_3V3) (layer In1.Cu) (tstamp 5B1AFAC4) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.127) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -20491,7 +20494,7 @@ ) ) ) - (zone (net 5) (net_name +3V3) (layer In1.Cu) (tstamp 5B28525D) (hatch edge 0.508) + (zone (net 5) (net_name +3V3) (layer In1.Cu) (tstamp 5B1AFAC1) (hatch edge 0.508) (connect_pads (clearance 0.127)) (min_thickness 0.127) (fill yes (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.508)) diff --git a/ulx3s.kicad_pcb-bak b/ulx3s.kicad_pcb-bak index 9937d35..ea2802f 100644 --- a/ulx3s.kicad_pcb-bak +++ b/ulx3s.kicad_pcb-bak @@ -753,6 +753,141 @@ (uvia_drill 0.1) ) + (module TSOP54:TSOP54 (layer F.Cu) (tedit 5B1ADE42) (tstamp 5A111CAC) + (at 165.093 87.8 90) + (descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)") + (tags "TSOPII 0.8") + (path /58D6D507/5A04F49A) + (attr smd) + (fp_text reference U2 (at 6.98 -9.993 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MT48LC16M16A2TG (at 0 12 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -5.08 11.1) (end -5.08 10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 11.1) (end 5.08 10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -10.9) (end -5.9 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -11.1) (end -5.08 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 -11.1) (end 5.08 -10.9) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.08 11.11) (end -5.08 11.11) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.08 -11.11) (end -0.635 -11.11) (layer F.SilkS) (width 0.15)) + (fp_arc (start 0 -11.049) (end -0.635 -11.049) (angle -180) (layer F.SilkS) (width 0.15)) + (fp_line (start 0.635 -11.11) (end 5.08 -11.11) (layer F.SilkS) (width 0.15)) + (pad 28 smd rect (at 5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 75 SDRAM_D0)) + (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 74 SDRAM_D1)) + (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 73 SDRAM_D2)) + (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 67 SDRAM_D3)) + (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 63 SDRAM_D4)) + (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 58 SDRAM_D5)) + (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 53 SDRAM_D6)) + (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 48 SDRAM_D7)) + (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 76 SDRAM_DQM0)) + (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 81 SDRAM_nWE)) + (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 80 SDRAM_nCAS)) + (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 78 SDRAM_nRAS)) + (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 77 SDRAM_nCS)) + (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 52 SDRAM_BA0)) + (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 47 SDRAM_BA1)) + (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 60 SDRAM_A10)) + (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 72 SDRAM_A0)) + (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 71 SDRAM_A1)) + (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 70 SDRAM_A2)) + (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 62 SDRAM_A3)) + (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 59 SDRAM_A4)) + (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 54 SDRAM_A5)) + (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 49 SDRAM_A6)) + (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 45 SDRAM_A7)) + (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 69 SDRAM_A8)) + (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 66 SDRAM_A9)) + (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 56 SDRAM_A11)) + (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 164 SDRAM_A12)) + (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 44 SDRAM_CKE)) + (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 50 SDRAM_CLK)) + (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 79 SDRAM_DQM1)) + (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) + (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 68 SDRAM_D8)) + (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 65 SDRAM_D9)) + (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 64 SDRAM_D10)) + (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 61 SDRAM_D11)) + (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 57 SDRAM_D12)) + (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 5 +3V3)) + (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 51 SDRAM_D13)) + (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 55 SDRAM_D14)) + (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 46 SDRAM_D15)) + (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ./footprints/sdram/TSOP54.3dshapes/TSOP54.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.3937 0.3937 0.3937)) + (rotate (xyz 0 0 90)) + ) + ) + (module SOA008-150mil:SOA008-150-208mil (layer B.Cu) (tedit 5B1AD4D5) (tstamp 5B3C9488) (at 118.245 85.822 270) (descr "Cypress SOA008 SOIC-8 150/208 mil") @@ -3454,140 +3589,6 @@ (fp_line (start -5.6 2) (end -4.6 0) (layer B.SilkS) (width 0.3)) ) - (module TSOP54:TSOP54 (layer F.Cu) (tedit 55BAC4E8) (tstamp 5A111CAC) - (at 165.093 87.8 90) - (descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)") - (tags "TSOPII 0.8") - (path /58D6D507/5A04F49A) - (attr smd) - (fp_text reference U2 (at 6.98 -9.993 180) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value MT48LC16M16A2TG (at 0 12 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -5.08 11.1) (end -5.08 10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 11.1) (end 5.08 10.9) (layer F.SilkS) (width 0.15)) - (fp_circle (center -4.25 -10.25) (end -4 -10.25) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -10.9) (end -5.9 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -11.1) (end -5.08 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 -11.1) (end 5.08 -10.9) (layer F.SilkS) (width 0.15)) - (fp_line (start 5.08 11.11) (end -5.08 11.11) (layer F.SilkS) (width 0.15)) - (fp_line (start -5.08 -11.11) (end 5.08 -11.11) (layer F.SilkS) (width 0.15)) - (pad 28 smd rect (at 5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 75 SDRAM_D0)) - (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 74 SDRAM_D1)) - (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 73 SDRAM_D2)) - (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 67 SDRAM_D3)) - (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 63 SDRAM_D4)) - (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 58 SDRAM_D5)) - (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 53 SDRAM_D6)) - (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 48 SDRAM_D7)) - (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 76 SDRAM_DQM0)) - (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 81 SDRAM_nWE)) - (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 80 SDRAM_nCAS)) - (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 78 SDRAM_nRAS)) - (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 77 SDRAM_nCS)) - (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 52 SDRAM_BA0)) - (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 47 SDRAM_BA1)) - (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 60 SDRAM_A10)) - (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 72 SDRAM_A0)) - (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 71 SDRAM_A1)) - (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 70 SDRAM_A2)) - (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 62 SDRAM_A3)) - (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 59 SDRAM_A4)) - (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 54 SDRAM_A5)) - (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 49 SDRAM_A6)) - (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 45 SDRAM_A7)) - (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 69 SDRAM_A8)) - (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 66 SDRAM_A9)) - (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 56 SDRAM_A11)) - (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_A12)) - (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 44 SDRAM_CKE)) - (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 50 SDRAM_CLK)) - (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 79 SDRAM_DQM1)) - (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) - (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 68 SDRAM_D8)) - (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 65 SDRAM_D9)) - (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 64 SDRAM_D10)) - (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 61 SDRAM_D11)) - (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 57 SDRAM_D12)) - (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 5 +3V3)) - (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 51 SDRAM_D13)) - (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 55 SDRAM_D14)) - (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 46 SDRAM_D15)) - (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (model ./footprints/sdram/TSOP54.3dshapes/TSOP54.wrl - (at (xyz 0 0 0)) - (scale (xyz 0.3937 0.3937 0.3937)) - (rotate (xyz 0 0 90)) - ) - ) - (module emard:emard12mm (layer F.Cu) (tedit 5A54AE11) (tstamp 5A54ADFE) (at 125.342 88.344 90) (descr EMARD) @@ -10179,7 +10180,7 @@ (gr_text +- (at 104.26 100.79) (layer F.SilkS) (tstamp 5A8F5288) (effects (font (size 1.5 1.5) (thickness 0.3))) ) - (gr_text v1.8.10 (at 169.807 101.443) (layer F.SilkS) (tstamp 5B2583F8) + (gr_text v1.8.11 (at 169.807 101.443) (layer F.SilkS) (tstamp 5B2583F8) (effects (font (size 1.5 1.5) (thickness 0.3))) ) (gr_line (start 135.39 80.869) (end 137.422 82.393) (layer B.SilkS) (width 0.2))