diff --git a/ulx3s-cache.lib b/ulx3s-cache.lib index 221ae1a..cc0e207 100644 --- a/ulx3s-cache.lib +++ b/ulx3s-cache.lib @@ -756,36 +756,36 @@ X PR38C P19 -750 100 200 R 50 50 4 1 I X PR44A T19 -750 400 200 R 50 50 4 1 I X PR44C U19 -750 500 200 R 50 50 4 1 I S -550 800 550 -900 5 1 0 N -X PL32C H1 -750 500 200 R 50 50 5 1 I +X PCLKC6_1 F1 750 600 200 L 50 50 5 1 I +X PCLKC6_0 G1 750 700 200 L 50 50 5 1 I +X PL32C H1 -750 300 200 R 50 50 5 1 I X PL32B J1 750 200 200 L 50 50 5 1 I -X PL32B J1 750 400 200 L 50 50 5 1 I -X PL32D K1 750 500 200 L 50 50 5 1 I +X PL32D K1 750 300 200 L 50 50 5 1 I X PL44C L1 -750 -500 200 R 50 50 5 1 I X PL44B M1 750 -600 200 L 50 50 5 1 I X PL44D N1 750 -500 200 L 50 50 5 1 I X PL47A P1 -750 -800 200 R 50 50 5 1 I +X PCLKT6_1 G2 -750 600 200 R 50 50 5 1 I +X PCLKT6_0 H2 -750 700 200 R 50 50 5 1 I X PL32A K2 -750 200 200 R 50 50 5 1 I -X PL32A K2 -750 400 200 R 50 50 5 1 I X PL41D L2 750 -300 200 L 50 50 5 1 I X PL44A N2 -750 -600 200 R 50 50 5 1 I X PL47B P2 750 -800 200 L 50 50 5 1 I -X GR_PCLK6_1 J3 -750 700 200 R 50 50 5 1 I -X PL29D K3 750 700 200 L 50 50 5 1 I +X GR_PCLK6_1 J3 -750 500 200 R 50 50 5 1 I +X PL29D K3 750 500 200 L 50 50 5 1 I X PL41C L3 -750 -300 200 R 50 50 5 1 I X PL41B M3 750 -400 200 L 50 50 5 1 I X PL41A N3 -750 -400 200 R 50 50 5 1 I X GPLL0T_IN P3 -750 -700 200 R 50 50 5 1 I -X GR_PCLK6_0 J4 -750 600 200 R 50 50 5 1 I +X GR_PCLK6_0 J4 -750 400 200 R 50 50 5 1 I X PL35A K4 -750 0 200 R 50 50 5 1 I -X PL32C L4 -750 300 200 R 50 50 5 1 I X PL35C L4 -750 100 200 R 50 50 5 1 I X PL38A M4 -750 -200 200 R 50 50 5 1 I X PL38C N4 -750 -100 200 R 50 50 5 1 I X GPLL0C_IN P4 750 -700 200 L 50 50 5 1 I -X PL29B J5 750 600 200 L 50 50 5 1 I +X PL29B J5 750 400 200 L 50 50 5 1 I X VREF1_6 K5 750 0 200 L 50 50 5 1 I X PL35D L5 750 100 200 L 50 50 5 1 I -X PL35D L5 750 300 200 L 50 50 5 1 I X PL38B N5 750 -200 200 L 50 50 5 1 I X PL38D P5 750 -100 200 L 50 50 5 1 I S -550 800 550 -900 6 1 0 N diff --git a/ulx3s.kicad_pcb b/ulx3s.kicad_pcb index db769cc..7d9bbc1 100644 --- a/ulx3s.kicad_pcb +++ b/ulx3s.kicad_pcb @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4) (general - (links 563) - (no_connects 563) + (links 569) + (no_connects 569) (area 93.949999 61.269999 188.230001 112.370001) (thickness 1.6) (drawings 6) (tracks 0) (zones 0) (modules 113) - (nets 206) + (nets 210) ) (page A4) @@ -130,175 +130,179 @@ (net 34 /power/OSCI_32k) (net 35 /power/OSCO_32k) (net 36 FTDI_nSUSPEND) - (net 37 USB_FTDI_DM) - (net 38 USB_FTDI_DP) - (net 39 "Net-(Q2-Pad3)") - (net 40 SHUTDOWN) - (net 41 /analog/AUDIO_L) - (net 42 /analog/AUDIO_R) - (net 43 GPDI_5V_SCL) - (net 44 GPDI_5V_SDA) - (net 45 GPDI_SDA) - (net 46 GPDI_SCL) - (net 47 /gpdi/VREF2) - (net 48 /blinkey/BTNPU) - (net 49 SD_CMD) - (net 50 SD_CLK) - (net 51 SD_D0) - (net 52 SD_D1) - (net 53 USB5V) - (net 54 /gpio/B11) - (net 55 /gpio/C11) - (net 56 /gpio/A10) - (net 57 /gpio/A11) - (net 58 /gpio/B10) - (net 59 /gpio/A9) - (net 60 /gpio/C10) - (net 61 /gpio/B9) - (net 62 /gpio/E9) - (net 63 /gpio/D9) - (net 64 /gpio/A8) - (net 65 /gpio/A7) - (net 66 /gpio/B8) - (net 67 /gpio/C8) - (net 68 /gpio/D8) - (net 69 /gpio/E8) - (net 70 /gpio/C7) - (net 71 /gpio/C6) - (net 72 /gpio/D7) - (net 73 /gpio/E7) - (net 74 /gpio/D6) - (net 75 /gpio/E6) - (net 76 /gpio/B6) - (net 77 /gpio/A6) - (net 78 /gpio/A19) - (net 79 /gpio/B20) - (net 80 /gpio/A18) - (net 81 /gpio/B19) - (net 82 /gpio/A17) - (net 83 /gpio/B18) - (net 84 /gpio/B17) - (net 85 /gpio/C17) - (net 86 /gpio/C16) - (net 87 /gpio/D16) - (net 88 /gpio/A16) - (net 89 /gpio/B16) - (net 90 /gpio/D15) - (net 91 /gpio/E15) - (net 92 /gpio/B15) - (net 93 /gpio/C15) - (net 94 /gpio/D14) - (net 95 /gpio/E14) - (net 96 /gpio/A14) - (net 97 /gpio/C14) - (net 98 /gpio/D13) - (net 99 /gpio/E13) - (net 100 /gpio/B13) - (net 101 /gpio/C13) - (net 102 /gpio/A12) - (net 103 /gpio/A13) - (net 104 /gpio/D12) - (net 105 /gpio/E12) - (net 106 /gpio/B12) - (net 107 /gpio/C12) - (net 108 /gpio/D11) - (net 109 /gpio/E11) - (net 110 "Net-(BTN0-Pad1)") - (net 111 LED0) - (net 112 LED1) - (net 113 LED2) - (net 114 LED3) - (net 115 LED4) - (net 116 LED5) - (net 117 LED6) - (net 118 LED7) - (net 119 BTN_PWRn) - (net 120 GPDI_ETH_N) - (net 121 GPDI_ETH_P) - (net 122 GPDI_D2_P) - (net 123 GPDI_D2_N) - (net 124 GPDI_D1_P) - (net 125 GPDI_D1_N) - (net 126 GPDI_D0_P) - (net 127 GPDI_D0_N) - (net 128 GPDI_CLK_P) - (net 129 GPDI_CLK_N) - (net 130 GPDI_CEC) - (net 131 nRESET) - (net 132 /usb/FT3V3) - (net 133 FTDI_nDTR) - (net 134 SDRAM_CKE) - (net 135 SDRAM_A7) - (net 136 SDRAM_D15) - (net 137 SDRAM_BA1) - (net 138 SDRAM_D7) - (net 139 SDRAM_A6) - (net 140 SDRAM_CLK) - (net 141 SDRAM_D13) - (net 142 SDRAM_BA0) - (net 143 SDRAM_D6) - (net 144 SDRAM_A5) - (net 145 SDRAM_D14) - (net 146 SDRAM_A11) - (net 147 SDRAM_D12) - (net 148 SDRAM_D5) - (net 149 SDRAM_A4) - (net 150 SDRAM_A10) - (net 151 SDRAM_D11) - (net 152 SDRAM_A3) - (net 153 SDRAM_D4) - (net 154 SDRAM_D10) - (net 155 SDRAM_D9) - (net 156 SDRAM_A9) - (net 157 SDRAM_D3) - (net 158 SDRAM_D8) - (net 159 SDRAM_A8) - (net 160 SDRAM_A2) - (net 161 SDRAM_A1) - (net 162 SDRAM_A0) - (net 163 SDRAM_D2) - (net 164 SDRAM_D1) - (net 165 SDRAM_D0) - (net 166 SDRAM_DQM0) - (net 167 SDRAM_nCS) - (net 168 SDRAM_nRAS) - (net 169 SDRAM_DQM1) - (net 170 SDRAM_nCAS) - (net 171 SDRAM_nWE) - (net 172 /flash/FLASH_nWP) - (net 173 /flash/FLASH_nHOLD) - (net 174 /flash/FLASH_MOSI) - (net 175 /flash/FLASH_MISO) - (net 176 /flash/FLASH_SCK) - (net 177 /flash/FLASH_nCS) - (net 178 /flash/FPGA_PROGRAMN) - (net 179 /flash/FPGA_DONE) - (net 180 /flash/FPGA_INITN) - (net 181 OLED_MOSI) - (net 182 OLED_RES) - (net 183 OLED_DC) - (net 184 OLED_CS) - (net 185 AUDIO_L3) - (net 186 AUDIO_L2) - (net 187 AUDIO_L1) - (net 188 AUDIO_L0) - (net 189 AUDIO_R3) - (net 190 AUDIO_R2) - (net 191 AUDIO_R1) - (net 192 AUDIO_R0) - (net 193 WIFI_EN) - (net 194 FTDI_nRTS) - (net 195 WIFI_GPIO2) - (net 196 FTDI_TXD) - (net 197 FTDI_RXD) - (net 198 WIFI_RXD) - (net 199 WIFI_GPIO0) - (net 200 FTDI_nCTS) - (net 201 WIFI_TXD) - (net 202 FTDI_nRI) - (net 203 FTDI_nDCD) - (net 204 WIFI_GPIO15) - (net 205 /gpdi/CLK_25MHz) + (net 37 "Net-(Q2-Pad3)") + (net 38 SHUTDOWN) + (net 39 /analog/AUDIO_L) + (net 40 /analog/AUDIO_R) + (net 41 GPDI_5V_SCL) + (net 42 GPDI_5V_SDA) + (net 43 GPDI_SDA) + (net 44 GPDI_SCL) + (net 45 /gpdi/VREF2) + (net 46 /blinkey/BTNPU) + (net 47 SD_CMD) + (net 48 SD_CLK) + (net 49 SD_D0) + (net 50 SD_D1) + (net 51 USB5V) + (net 52 "Net-(BTN0-Pad1)") + (net 53 LED0) + (net 54 LED1) + (net 55 LED2) + (net 56 LED3) + (net 57 LED4) + (net 58 LED5) + (net 59 LED6) + (net 60 LED7) + (net 61 BTN_PWRn) + (net 62 GPDI_CEC) + (net 63 nRESET) + (net 64 /usb/FT3V3) + (net 65 FTDI_nDTR) + (net 66 SDRAM_CKE) + (net 67 SDRAM_A7) + (net 68 SDRAM_D15) + (net 69 SDRAM_BA1) + (net 70 SDRAM_D7) + (net 71 SDRAM_A6) + (net 72 SDRAM_CLK) + (net 73 SDRAM_D13) + (net 74 SDRAM_BA0) + (net 75 SDRAM_D6) + (net 76 SDRAM_A5) + (net 77 SDRAM_D14) + (net 78 SDRAM_A11) + (net 79 SDRAM_D12) + (net 80 SDRAM_D5) + (net 81 SDRAM_A4) + (net 82 SDRAM_A10) + (net 83 SDRAM_D11) + (net 84 SDRAM_A3) + (net 85 SDRAM_D4) + (net 86 SDRAM_D10) + (net 87 SDRAM_D9) + (net 88 SDRAM_A9) + (net 89 SDRAM_D3) + (net 90 SDRAM_D8) + (net 91 SDRAM_A8) + (net 92 SDRAM_A2) + (net 93 SDRAM_A1) + (net 94 SDRAM_A0) + (net 95 SDRAM_D2) + (net 96 SDRAM_D1) + (net 97 SDRAM_D0) + (net 98 SDRAM_DQM0) + (net 99 SDRAM_nCS) + (net 100 SDRAM_nRAS) + (net 101 SDRAM_DQM1) + (net 102 SDRAM_nCAS) + (net 103 SDRAM_nWE) + (net 104 /flash/FLASH_nWP) + (net 105 /flash/FLASH_nHOLD) + (net 106 /flash/FLASH_MOSI) + (net 107 /flash/FLASH_MISO) + (net 108 /flash/FLASH_SCK) + (net 109 /flash/FLASH_nCS) + (net 110 /flash/FPGA_PROGRAMN) + (net 111 /flash/FPGA_DONE) + (net 112 /flash/FPGA_INITN) + (net 113 OLED_MOSI) + (net 114 OLED_RES) + (net 115 OLED_DC) + (net 116 OLED_CS) + (net 117 AUDIO_L3) + (net 118 AUDIO_L2) + (net 119 AUDIO_L1) + (net 120 AUDIO_L0) + (net 121 AUDIO_R3) + (net 122 AUDIO_R2) + (net 123 AUDIO_R1) + (net 124 AUDIO_R0) + (net 125 WIFI_EN) + (net 126 FTDI_nRTS) + (net 127 WIFI_GPIO2) + (net 128 FTDI_TXD) + (net 129 FTDI_RXD) + (net 130 WIFI_RXD) + (net 131 WIFI_GPIO0) + (net 132 FTDI_nCTS) + (net 133 WIFI_TXD) + (net 134 FTDI_nRI) + (net 135 FTDI_nDCD) + (net 136 WIFI_GPIO15) + (net 137 /gpdi/CLK_25MHz) + (net 138 GPDI_ETH-) + (net 139 GPDI_ETH+) + (net 140 GPDI_D2+) + (net 141 GPDI_D2-) + (net 142 GPDI_D1+) + (net 143 GPDI_D1-) + (net 144 GPDI_D0+) + (net 145 GPDI_D0-) + (net 146 GPDI_CLK+) + (net 147 GPDI_CLK-) + (net 148 /gpio/B11+) + (net 149 /gpio/B11-) + (net 150 /gpio/A10+) + (net 151 /gpio/A10-) + (net 152 /gpio/B10+) + (net 153 /gpio/B10-) + (net 154 /gpio/B9+) + (net 155 /gpio/B9-) + (net 156 /gpio/D9+) + (net 157 /gpio/D9-) + (net 158 /gpio/A7+) + (net 159 /gpio/A7-) + (net 160 /gpio/C8+) + (net 161 /gpio/C8-) + (net 162 /gpio/E8+) + (net 163 /gpio/E8-) + (net 164 /gpio/C6+) + (net 165 /gpio/C6-) + (net 166 /gpio/E7+) + (net 167 /gpio/E7-) + (net 168 /gpio/E6+) + (net 169 /gpio/E6-) + (net 170 /gpio/A6+) + (net 171 /gpio/A6-) + (net 172 /gpio/A19+) + (net 173 /gpio/A19-) + (net 174 /gpio/A18+) + (net 175 /gpio/A18-) + (net 176 /gpio/A17+) + (net 177 /gpio/A17-) + (net 178 /gpio/B17+) + (net 179 /gpio/B17-) + (net 180 /gpio/C16+) + (net 181 /gpio/C16-) + (net 182 /gpio/A16+) + (net 183 /gpio/A16-) + (net 184 /gpio/D15+) + (net 185 /gpio/D15-) + (net 186 /gpio/B15+) + (net 187 /gpio/B15-) + (net 188 /gpio/D14+) + (net 189 /gpio/D14-) + (net 190 /gpio/A14+) + (net 191 /gpio/A14-) + (net 192 /gpio/D13+) + (net 193 /gpio/D13-) + (net 194 /gpio/B13+) + (net 195 /gpio/B13-) + (net 196 /gpio/A12+) + (net 197 /gpio/A12-) + (net 198 /gpio/D12+) + (net 199 /gpio/D12-) + (net 200 /gpio/B12+) + (net 201 /gpio/B12-) + (net 202 /gpio/D11+) + (net 203 /gpio/D11-) + (net 204 OLED_CLK) + (net 205 FTDI_nDSR) + (net 206 USB_FPGA_D+) + (net 207 USB_FPGA_D-) + (net 208 USB_FTDI_D+) + (net 209 USB_FTDI_D-) (net_class Default "This is the default net class." (clearance 0.127) @@ -331,6 +335,7 @@ (add_net /power/WKUP) (add_net /power/WKn) (add_net /usb/FT3V3) + (add_net FTDI_nDSR) (add_net FTDI_nSUSPEND) (add_net GND) (add_net "Net-(BTN0-Pad1)") @@ -341,8 +346,8 @@ (add_net "Net-(Q2-Pad3)") (add_net SHUTDOWN) (add_net USB5V) - (add_net USB_FTDI_DM) - (add_net USB_FTDI_DP) + (add_net USB_FTDI_D+) + (add_net USB_FTDI_D-) (add_net nRESET) ) @@ -363,62 +368,62 @@ (add_net /flash/FPGA_INITN) (add_net /flash/FPGA_PROGRAMN) (add_net /gpdi/CLK_25MHz) - (add_net /gpio/A10) - (add_net /gpio/A11) - (add_net /gpio/A12) - (add_net /gpio/A13) - (add_net /gpio/A14) - (add_net /gpio/A16) - (add_net /gpio/A17) - (add_net /gpio/A18) - (add_net /gpio/A19) - (add_net /gpio/A6) - (add_net /gpio/A7) - (add_net /gpio/A8) - (add_net /gpio/A9) - (add_net /gpio/B10) - (add_net /gpio/B11) - (add_net /gpio/B12) - (add_net /gpio/B13) - (add_net /gpio/B15) - (add_net /gpio/B16) - (add_net /gpio/B17) - (add_net /gpio/B18) - (add_net /gpio/B19) - (add_net /gpio/B20) - (add_net /gpio/B6) - (add_net /gpio/B8) - (add_net /gpio/B9) - (add_net /gpio/C10) - (add_net /gpio/C11) - (add_net /gpio/C12) - (add_net /gpio/C13) - (add_net /gpio/C14) - (add_net /gpio/C15) - (add_net /gpio/C16) - (add_net /gpio/C17) - (add_net /gpio/C6) - (add_net /gpio/C7) - (add_net /gpio/C8) - (add_net /gpio/D11) - (add_net /gpio/D12) - (add_net /gpio/D13) - (add_net /gpio/D14) - (add_net /gpio/D15) - (add_net /gpio/D16) - (add_net /gpio/D6) - (add_net /gpio/D7) - (add_net /gpio/D8) - (add_net /gpio/D9) - (add_net /gpio/E11) - (add_net /gpio/E12) - (add_net /gpio/E13) - (add_net /gpio/E14) - (add_net /gpio/E15) - (add_net /gpio/E6) - (add_net /gpio/E7) - (add_net /gpio/E8) - (add_net /gpio/E9) + (add_net /gpio/A10+) + (add_net /gpio/A10-) + (add_net /gpio/A12+) + (add_net /gpio/A12-) + (add_net /gpio/A14+) + (add_net /gpio/A14-) + (add_net /gpio/A16+) + (add_net /gpio/A16-) + (add_net /gpio/A17+) + (add_net /gpio/A17-) + (add_net /gpio/A18+) + (add_net /gpio/A18-) + (add_net /gpio/A19+) + (add_net /gpio/A19-) + (add_net /gpio/A6+) + (add_net /gpio/A6-) + (add_net /gpio/A7+) + (add_net /gpio/A7-) + (add_net /gpio/B10+) + (add_net /gpio/B10-) + (add_net /gpio/B11+) + (add_net /gpio/B11-) + (add_net /gpio/B12+) + (add_net /gpio/B12-) + (add_net /gpio/B13+) + (add_net /gpio/B13-) + (add_net /gpio/B15+) + (add_net /gpio/B15-) + (add_net /gpio/B17+) + (add_net /gpio/B17-) + (add_net /gpio/B9+) + (add_net /gpio/B9-) + (add_net /gpio/C16+) + (add_net /gpio/C16-) + (add_net /gpio/C6+) + (add_net /gpio/C6-) + (add_net /gpio/C8+) + (add_net /gpio/C8-) + (add_net /gpio/D11+) + (add_net /gpio/D11-) + (add_net /gpio/D12+) + (add_net /gpio/D12-) + (add_net /gpio/D13+) + (add_net /gpio/D13-) + (add_net /gpio/D14+) + (add_net /gpio/D14-) + (add_net /gpio/D15+) + (add_net /gpio/D15-) + (add_net /gpio/D9+) + (add_net /gpio/D9-) + (add_net /gpio/E6+) + (add_net /gpio/E6-) + (add_net /gpio/E7+) + (add_net /gpio/E7-) + (add_net /gpio/E8+) + (add_net /gpio/E8-) (add_net AUDIO_L0) (add_net AUDIO_L1) (add_net AUDIO_L2) @@ -444,16 +449,16 @@ (add_net GPDI_5V_SCL) (add_net GPDI_5V_SDA) (add_net GPDI_CEC) - (add_net GPDI_CLK_N) - (add_net GPDI_CLK_P) - (add_net GPDI_D0_N) - (add_net GPDI_D0_P) - (add_net GPDI_D1_N) - (add_net GPDI_D1_P) - (add_net GPDI_D2_N) - (add_net GPDI_D2_P) - (add_net GPDI_ETH_N) - (add_net GPDI_ETH_P) + (add_net GPDI_CLK+) + (add_net GPDI_CLK-) + (add_net GPDI_D0+) + (add_net GPDI_D0-) + (add_net GPDI_D1+) + (add_net GPDI_D1-) + (add_net GPDI_D2+) + (add_net GPDI_D2-) + (add_net GPDI_ETH+) + (add_net GPDI_ETH-) (add_net GPDI_SCL) (add_net GPDI_SDA) (add_net JTAG_TCK) @@ -468,6 +473,7 @@ (add_net LED5) (add_net LED6) (add_net LED7) + (add_net OLED_CLK) (add_net OLED_CS) (add_net OLED_DC) (add_net OLED_MOSI) @@ -515,6 +521,8 @@ (add_net SD_CMD) (add_net SD_D0) (add_net SD_D1) + (add_net USB_FPGA_D+) + (add_net USB_FPGA_D-) (add_net WIFI_EN) (add_net WIFI_GPIO0) (add_net WIFI_GPIO15) @@ -677,19 +685,19 @@ (pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 23 SD_3)) (pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 49 SD_CMD)) + (net 47 SD_CMD)) (pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 50 SD_CLK)) + (net 48 SD_CLK)) (pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 51 SD_D0)) + (net 49 SD_D0)) (pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 52 SD_D1)) + (net 50 SD_D1)) (pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask)) (pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask)) (pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask)) @@ -848,9 +856,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -891,9 +899,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -934,9 +942,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -977,9 +985,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1020,9 +1028,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1063,9 +1071,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1106,7 +1114,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 111 LED0)) + (net 53 LED0)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1150,7 +1158,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 112 LED1)) + (net 54 LED1)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1194,7 +1202,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 113 LED2)) + (net 55 LED2)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1238,7 +1246,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 114 LED3)) + (net 56 LED3)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1282,7 +1290,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 115 LED4)) + (net 57 LED4)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1326,7 +1334,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 116 LED5)) + (net 58 LED5)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1370,7 +1378,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 117 LED6)) + (net 59 LED6)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1414,7 +1422,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 118 LED7)) + (net 60 LED7)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1802,7 +1810,7 @@ (pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) - (net 53 USB5V)) + (net 51 USB5V)) (model SMD_Packages.3dshapes/SMD-1206_Pol.wrl (at (xyz 0 0 0)) (scale (xyz 0.17 0.16 0.16)) @@ -2005,7 +2013,7 @@ (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 30 /power/SHUT)) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 SHUTDOWN)) + (net 38 SHUTDOWN)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D7A84D) @@ -2079,11 +2087,11 @@ (pad "" smd rect (at -1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad "" smd rect (at 1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 53 USB5V)) + (net 51 USB5V)) (pad 2 smd rect (at -0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 37 USB_FTDI_DM)) + (net 209 USB_FTDI_D-)) (pad 3 smd rect (at 0 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 38 USB_FTDI_DP)) + (net 208 USB_FTDI_D+)) (pad 4 smd rect (at 0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2129,8 +2137,10 @@ (pad "" smd rect (at 1.2 0 180) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(D9-Pad1)")) - (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) - (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) + (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) + (net 207 USB_FPGA_D-)) + (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) + (net 206 USB_FPGA_D+)) (pad 4 smd rect (at 0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2158,13 +2168,13 @@ (fp_line (start -8.5 -2.5) (end -8.5 2.5) (layer F.SilkS) (width 0.1524)) (fp_line (start -8.5 2.5) (end -7 2.5) (layer F.SilkS) (width 0.1524)) (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -2196,105 +2206,105 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 165 SDRAM_D0)) + (net 97 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_D1)) + (net 96 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 163 SDRAM_D2)) + (net 95 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 157 SDRAM_D3)) + (net 89 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 153 SDRAM_D4)) + (net 85 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 148 SDRAM_D5)) + (net 80 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 143 SDRAM_D6)) + (net 75 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 138 SDRAM_D7)) + (net 70 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 166 SDRAM_DQM0)) + (net 98 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 171 SDRAM_nWE)) + (net 103 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 170 SDRAM_nCAS)) + (net 102 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 168 SDRAM_nRAS)) + (net 100 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 167 SDRAM_nCS)) + (net 99 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 142 SDRAM_BA0)) + (net 74 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 137 SDRAM_BA1)) + (net 69 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 150 SDRAM_A10)) + (net 82 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 162 SDRAM_A0)) + (net 94 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 161 SDRAM_A1)) + (net 93 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 160 SDRAM_A2)) + (net 92 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 152 SDRAM_A3)) + (net 84 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 149 SDRAM_A4)) + (net 81 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 144 SDRAM_A5)) + (net 76 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 139 SDRAM_A6)) + (net 71 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 135 SDRAM_A7)) + (net 67 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 159 SDRAM_A8)) + (net 91 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 156 SDRAM_A9)) + (net 88 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 146 SDRAM_A11)) + (net 78 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 134 SDRAM_CKE)) + (net 66 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 140 SDRAM_CLK)) + (net 72 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 169 SDRAM_DQM1)) + (net 101 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 158 SDRAM_D8)) + (net 90 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 155 SDRAM_D9)) + (net 87 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 154 SDRAM_D10)) + (net 86 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 151 SDRAM_D11)) + (net 83 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 147 SDRAM_D12)) + (net 79 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 141 SDRAM_D13)) + (net 73 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 145 SDRAM_D14)) + (net 77 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 136 SDRAM_D15)) + (net 68 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -2370,7 +2380,7 @@ (pad 2 smd rect (at -1.5 -0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 39 "Net-(Q2-Pad3)")) + (net 37 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2700,7 +2710,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2733,7 +2743,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 "Net-(Q2-Pad3)")) + (net 37 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2764,9 +2774,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 nRESET)) + (net 63 nRESET)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2799,7 +2809,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 36 FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 FTDI_nDTR)) + (net 65 FTDI_nDTR)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2830,7 +2840,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 SHUTDOWN)) + (net 38 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -3061,9 +3071,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 185 AUDIO_L3)) + (net 117 AUDIO_L3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3094,9 +3104,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 186 AUDIO_L2)) + (net 118 AUDIO_L2)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3127,9 +3137,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 187 AUDIO_L1)) + (net 119 AUDIO_L1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3160,9 +3170,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 188 AUDIO_L0)) + (net 120 AUDIO_L0)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3193,9 +3203,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 189 AUDIO_R3)) + (net 121 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3226,9 +3236,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 190 AUDIO_R2)) + (net 122 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3259,9 +3269,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 191 AUDIO_R1)) + (net 123 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3292,9 +3302,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 192 AUDIO_R0)) + (net 124 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3320,209 +3330,209 @@ (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 GPDI_D2_P) (solder_mask_margin 0.04)) + (net 140 GPDI_D2+) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 GPDI_D1_P) (solder_mask_margin 0.04)) + (net 142 GPDI_D1+) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 125 GPDI_D1_N) (solder_mask_margin 0.04)) + (net 143 GPDI_D1-) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 /gpio/B6) (solder_mask_margin 0.04)) + (net 170 /gpio/A6+) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 64 /gpio/A8) (solder_mask_margin 0.04)) + (net 158 /gpio/A7+) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 65 /gpio/A7) (solder_mask_margin 0.04)) + (net 159 /gpio/A7-) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 /gpio/A9) (solder_mask_margin 0.04)) + (net 153 /gpio/B10-) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 /gpio/A10) (solder_mask_margin 0.04)) + (net 150 /gpio/A10+) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 /gpio/A11) (solder_mask_margin 0.04)) + (net 151 /gpio/A10-) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 /gpio/A12) (solder_mask_margin 0.04)) + (net 196 /gpio/A12+) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 /gpio/A13) (solder_mask_margin 0.04)) + (net 197 /gpio/A12-) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 /gpio/A14) (solder_mask_margin 0.04)) + (net 190 /gpio/A14+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 88 /gpio/A16) (solder_mask_margin 0.04)) + (net 182 /gpio/A16+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 /gpio/A17) (solder_mask_margin 0.04)) + (net 176 /gpio/A17+) (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 /gpio/A18) (solder_mask_margin 0.04)) + (net 174 /gpio/A18+) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 /gpio/A19) (solder_mask_margin 0.04)) + (net 172 /gpio/A19+) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 LED3) (solder_mask_margin 0.04)) + (net 56 LED3) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 GPDI_D2_N) (solder_mask_margin 0.04)) + (net 141 GPDI_D2-) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 GPDI_CLK_N) (solder_mask_margin 0.04)) + (net 147 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 GPDI_D0_P) (solder_mask_margin 0.04)) + (net 144 GPDI_D0+) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 /gpio/A6) (solder_mask_margin 0.04)) + (net 171 /gpio/A6-) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 /gpio/C8) (solder_mask_margin 0.04)) + (net 161 /gpio/C8-) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 /gpio/C10) (solder_mask_margin 0.04)) + (net 154 /gpio/B9+) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 /gpio/B10) (solder_mask_margin 0.04)) + (net 152 /gpio/B10+) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 /gpio/B11) (solder_mask_margin 0.04)) + (net 148 /gpio/B11+) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 /gpio/B12) (solder_mask_margin 0.04)) + (net 200 /gpio/B12+) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 /gpio/B13) (solder_mask_margin 0.04)) + (net 194 /gpio/B13+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 /gpio/B15) (solder_mask_margin 0.04)) + (net 186 /gpio/B15+) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 /gpio/B16) (solder_mask_margin 0.04)) + (net 183 /gpio/A16-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 /gpio/B17) (solder_mask_margin 0.04)) + (net 178 /gpio/B17+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 /gpio/B18) (solder_mask_margin 0.04)) + (net 177 /gpio/A17-) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 /gpio/B19) (solder_mask_margin 0.04)) + (net 175 /gpio/A18-) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 /gpio/B20) (solder_mask_margin 0.04)) + (net 173 /gpio/A19-) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 LED2) (solder_mask_margin 0.04)) + (net 55 LED2) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 GPDI_ETH_P) (solder_mask_margin 0.04)) + (net 139 GPDI_ETH+) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 GPDI_CLK_P) (solder_mask_margin 0.04)) + (net 146 GPDI_CLK+) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 GPDI_D0_N) (solder_mask_margin 0.04)) + (net 145 GPDI_D0-) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 /gpio/C7) (solder_mask_margin 0.04)) + (net 164 /gpio/C6+) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 /gpio/C6) (solder_mask_margin 0.04)) + (net 165 /gpio/C6-) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 /gpio/B8) (solder_mask_margin 0.04)) + (net 160 /gpio/C8+) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 /gpio/B9) (solder_mask_margin 0.04)) + (net 155 /gpio/B9-) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 /gpio/C11) (solder_mask_margin 0.04)) + (net 149 /gpio/B11-) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 /gpio/C12) (solder_mask_margin 0.04)) + (net 201 /gpio/B12-) (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 /gpio/C13) (solder_mask_margin 0.04)) + (net 195 /gpio/B13-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 /gpio/C14) (solder_mask_margin 0.04)) + (net 191 /gpio/A14-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 /gpio/C15) (solder_mask_margin 0.04)) + (net 187 /gpio/B15-) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 /gpio/C16) (solder_mask_margin 0.04)) + (net 180 /gpio/C16+) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 /gpio/C17) (solder_mask_margin 0.04)) + (net 179 /gpio/B17-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 66 SDRAM_CKE) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 SDRAM_A7) (solder_mask_margin 0.04)) + (net 67 SDRAM_A7) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 116 LED5) (solder_mask_margin 0.04)) + (net 58 LED5) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 GPDI_ETH_N) (solder_mask_margin 0.04)) + (net 138 GPDI_ETH-) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 45 GPDI_SDA) (solder_mask_margin 0.04)) + (net 43 GPDI_SDA) (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 /gpio/E6) (solder_mask_margin 0.04)) + (net 169 /gpio/E6-) (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 /gpio/E7) (solder_mask_margin 0.04)) + (net 167 /gpio/E7-) (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 /gpio/E8) (solder_mask_margin 0.04)) + (net 163 /gpio/E8-) (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 /gpio/E9) (solder_mask_margin 0.04)) + (net 156 /gpio/D9+) (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 /gpio/D11) (solder_mask_margin 0.04)) + (net 202 /gpio/D11+) (solder_mask_margin 0.04)) (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 104 /gpio/D12) (solder_mask_margin 0.04)) + (net 198 /gpio/D12+) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 /gpio/D13) (solder_mask_margin 0.04)) + (net 192 /gpio/D13+) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 /gpio/D14) (solder_mask_margin 0.04)) + (net 188 /gpio/D14+) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 /gpio/D15) (solder_mask_margin 0.04)) + (net 184 /gpio/D15+) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 87 /gpio/D16) (solder_mask_margin 0.04)) + (net 181 /gpio/C16-) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 69 SDRAM_BA1) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 SDRAM_D7) (solder_mask_margin 0.04)) + (net 70 SDRAM_D7) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 SDRAM_A6) (solder_mask_margin 0.04)) + (net 71 SDRAM_A6) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 LED4) (solder_mask_margin 0.04)) + (net 57 LED4) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 LED1) (solder_mask_margin 0.04)) + (net 54 LED1) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 46 GPDI_SCL) (solder_mask_margin 0.04)) + (net 44 GPDI_SCL) (solder_mask_margin 0.04)) (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 GPDI_CEC) (solder_mask_margin 0.04)) + (net 62 GPDI_CEC) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 /gpio/D6) (solder_mask_margin 0.04)) + (net 168 /gpio/E6+) (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 /gpio/D7) (solder_mask_margin 0.04)) + (net 166 /gpio/E7+) (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 /gpio/D8) (solder_mask_margin 0.04)) + (net 162 /gpio/E8+) (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 63 /gpio/D9) (solder_mask_margin 0.04)) + (net 157 /gpio/D9-) (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 /gpio/E11) (solder_mask_margin 0.04)) + (net 203 /gpio/D11-) (solder_mask_margin 0.04)) (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 105 /gpio/E12) (solder_mask_margin 0.04)) + (net 199 /gpio/D12-) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 /gpio/E13) (solder_mask_margin 0.04)) + (net 193 /gpio/D13-) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 /gpio/E14) (solder_mask_margin 0.04)) + (net 189 /gpio/D14-) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 /gpio/E15) (solder_mask_margin 0.04)) + (net 185 /gpio/D15-) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 74 SDRAM_BA0) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 SDRAM_D6) (solder_mask_margin 0.04)) + (net 75 SDRAM_D6) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 SDRAM_A5) (solder_mask_margin 0.04)) + (net 76 SDRAM_A5) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 130 WIFI_RXD) (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 205 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) + (net 137 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 LED0) (solder_mask_margin 0.04)) + (net 53 LED0) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3548,21 +3558,21 @@ (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 SDRAM_D12) (solder_mask_margin 0.04)) + (net 79 SDRAM_D12) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 SDRAM_D5) (solder_mask_margin 0.04)) + (net 80 SDRAM_D5) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 SDRAM_A4) (solder_mask_margin 0.04)) + (net 81 SDRAM_A4) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 133 WIFI_TXD) (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 129 FTDI_RXD) (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 LED7) (solder_mask_margin 0.04)) + (net 60 LED7) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3588,19 +3598,19 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 151 SDRAM_D11) (solder_mask_margin 0.04)) + (net 83 SDRAM_D11) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 152 SDRAM_A3) (solder_mask_margin 0.04)) + (net 84 SDRAM_A3) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 153 SDRAM_D4) (solder_mask_margin 0.04)) + (net 85 SDRAM_D4) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 194 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 65 FTDI_nDTR) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 128 FTDI_TXD) (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 117 LED6) (solder_mask_margin 0.04)) + (net 59 LED6) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 BTN_PWRn) (solder_mask_margin 0.04)) + (net 61 BTN_PWRn) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3628,21 +3638,21 @@ (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 SDRAM_A9) (solder_mask_margin 0.04)) + (net 88 SDRAM_A9) (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 SDRAM_D3) (solder_mask_margin 0.04)) + (net 89 SDRAM_D3) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 195 WIFI_GPIO2) (solder_mask_margin 0.04)) + (net 125 WIFI_EN) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 196 FTDI_TXD) (solder_mask_margin 0.04)) + (net 126 FTDI_nRTS) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 197 FTDI_RXD) (solder_mask_margin 0.04)) + (net 132 FTDI_nCTS) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 198 WIFI_RXD) (solder_mask_margin 0.04)) + (net 127 WIFI_GPIO2) (solder_mask_margin 0.04)) (pad J6 smd circle (at -3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3668,21 +3678,21 @@ (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 SDRAM_A2) (solder_mask_margin 0.04)) + (net 92 SDRAM_A2) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 SDRAM_A1) (solder_mask_margin 0.04)) + (net 93 SDRAM_A1) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 SDRAM_A0) (solder_mask_margin 0.04)) + (net 94 SDRAM_A0) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 199 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 136 WIFI_GPIO15) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 200 FTDI_nCTS) (solder_mask_margin 0.04)) + (net 205 FTDI_nDSR) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 201 WIFI_TXD) (solder_mask_margin 0.04)) + (net 131 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 202 FTDI_nRI) (solder_mask_margin 0.04)) + (net 134 FTDI_nRI) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 181 OLED_MOSI) (solder_mask_margin 0.04)) + (net 113 OLED_MOSI) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3708,21 +3718,21 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 SDRAM_D2) (solder_mask_margin 0.04)) + (net 95 SDRAM_D2) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_D1) (solder_mask_margin 0.04)) + (net 96 SDRAM_D1) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 SDRAM_D0) (solder_mask_margin 0.04)) + (net 97 SDRAM_D0) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 192 AUDIO_R0) (solder_mask_margin 0.04)) + (net 124 AUDIO_R0) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 184 OLED_CS) (solder_mask_margin 0.04)) + (net 116 OLED_CS) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 203 FTDI_nDCD) (solder_mask_margin 0.04)) + (net 135 FTDI_nDCD) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 204 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 204 OLED_CLK) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3750,15 +3760,15 @@ (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 SDRAM_A8) (solder_mask_margin 0.04)) + (net 91 SDRAM_A8) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 168 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 100 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 187 AUDIO_L1) (solder_mask_margin 0.04)) + (net 119 AUDIO_L1) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 206 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3788,21 +3798,21 @@ (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 SDRAM_D15) (solder_mask_margin 0.04)) + (net 68 SDRAM_D15) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 98 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 169 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 101 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 188 AUDIO_L0) (solder_mask_margin 0.04)) + (net 120 AUDIO_L0) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 191 AUDIO_R1) (solder_mask_margin 0.04)) + (net 123 AUDIO_R1) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 207 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 183 OLED_DC) (solder_mask_margin 0.04)) + (net 115 OLED_DC) (solder_mask_margin 0.04)) (pad N6 smd circle (at -3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N7 smd circle (at -2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3826,23 +3836,23 @@ (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SD_CMD) (solder_mask_margin 0.04)) + (net 47 SD_CMD) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 51 SD_D0) (solder_mask_margin 0.04)) + (net 49 SD_D0) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 150 SDRAM_A10) (solder_mask_margin 0.04)) + (net 82 SDRAM_A10) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 SDRAM_D8) (solder_mask_margin 0.04)) + (net 90 SDRAM_D8) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 189 AUDIO_R3) (solder_mask_margin 0.04)) + (net 121 AUDIO_R3) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 185 AUDIO_L3) (solder_mask_margin 0.04)) + (net 117 AUDIO_L3) (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 190 AUDIO_R2) (solder_mask_margin 0.04)) + (net 122 AUDIO_R2) (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 186 AUDIO_L2) (solder_mask_margin 0.04)) + (net 118 AUDIO_L2) (solder_mask_margin 0.04)) (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 182 OLED_RES) (solder_mask_margin 0.04)) + (net 114 OLED_RES) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3868,15 +3878,15 @@ (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 SDRAM_D13) (solder_mask_margin 0.04)) + (net 73 SDRAM_D13) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 72 SDRAM_CLK) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 177 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 109 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3884,11 +3894,11 @@ (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 24 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SD_CLK) (solder_mask_margin 0.04)) + (net 48 SD_CLK) (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 52 SD_D1) (solder_mask_margin 0.04)) + (net 50 SD_D1) (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 SDRAM_D10) (solder_mask_margin 0.04)) + (net 86 SDRAM_D10) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3928,17 +3938,17 @@ (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 SDRAM_D9) (solder_mask_margin 0.04)) + (net 87 SDRAM_D9) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 171 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 103 SDRAM_nWE) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 99 SDRAM_nCS) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 176 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 108 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3968,17 +3978,17 @@ (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 SDRAM_A11) (solder_mask_margin 0.04)) + (net 78 SDRAM_A11) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 170 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 102 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 SDRAM_D14) (solder_mask_margin 0.04)) + (net 77 SDRAM_D14) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 175 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 107 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 180 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 112 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 27 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4016,9 +4026,9 @@ (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 174 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 106 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 178 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 110 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4056,7 +4066,7 @@ (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 179 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 111 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4125,41 +4135,41 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 120 GPDI_ETH_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 138 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 121 GPDI_ETH_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 139 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 122 GPDI_D2_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 140 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 123 GPDI_D2_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 141 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 124 GPDI_D1_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 142 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 125 GPDI_D1_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 143 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 126 GPDI_D0_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 144 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 127 GPDI_D0_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 145 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 128 GPDI_CLK_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 146 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 129 GPDI_CLK_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 147 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 130 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 62 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 43 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 41 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 44 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 42 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) @@ -4195,19 +4205,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 177 /flash/FLASH_nCS)) + (net 109 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 175 /flash/FLASH_MISO)) + (net 107 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 172 /flash/FLASH_nWP)) + (net 104 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 174 /flash/FLASH_MOSI)) + (net 106 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 176 /flash/FLASH_SCK)) + (net 108 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 173 /flash/FLASH_nHOLD)) + (net 105 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -4283,17 +4293,17 @@ (pad 2 smd rect (at -2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_SCL)) + (net 44 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 GPDI_SDA)) + (net 43 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_5V_SDA)) + (net 42 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_5V_SCL)) + (net 41 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4394,9 +4404,9 @@ (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 201 WIFI_TXD)) + (net 133 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 198 WIFI_RXD)) + (net 130 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 26 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4410,19 +4420,19 @@ (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 199 WIFI_GPIO0)) + (net 131 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 195 WIFI_GPIO2)) + (net 127 WIFI_GPIO2)) (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 204 WIFI_GPIO15)) + (net 136 WIFI_GPIO15)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 52 SD_D1)) + (net 50 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 51 SD_D0)) + (net 49 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 50 SD_CLK)) + (net 48 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 49 SD_CMD)) + (net 47 SD_CMD)) (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) (net 23 SD_3)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) @@ -4440,7 +4450,7 @@ (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4555,33 +4565,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 54 /gpio/B11)) + (net 148 /gpio/B11+)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 55 /gpio/C11)) + (net 149 /gpio/B11-)) (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 56 /gpio/A10)) + (net 150 /gpio/A10+)) (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 57 /gpio/A11)) + (net 151 /gpio/A10-)) (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 58 /gpio/B10)) + (net 152 /gpio/B10+)) (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 59 /gpio/A9)) + (net 153 /gpio/B10-)) (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 60 /gpio/C10)) + (net 154 /gpio/B9+)) (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 61 /gpio/B9)) + (net 155 /gpio/B9-)) (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 62 /gpio/E9)) + (net 156 /gpio/D9+)) (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 63 /gpio/D9)) + (net 157 /gpio/D9-)) (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 64 /gpio/A8)) + (net 158 /gpio/A7+)) (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 65 /gpio/A7)) + (net 159 /gpio/A7-)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 66 /gpio/B8)) + (net 160 /gpio/C8+)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 67 /gpio/C8)) + (net 161 /gpio/C8-)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4591,33 +4601,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 68 /gpio/D8)) + (net 162 /gpio/E8+)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 69 /gpio/E8)) + (net 163 /gpio/E8-)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 70 /gpio/C7)) + (net 164 /gpio/C6+)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 71 /gpio/C6)) + (net 165 /gpio/C6-)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 72 /gpio/D7)) + (net 166 /gpio/E7+)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 73 /gpio/E7)) + (net 167 /gpio/E7-)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 74 /gpio/D6)) + (net 168 /gpio/E6+)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 75 /gpio/E6)) + (net 169 /gpio/E6-)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 76 /gpio/B6)) + (net 170 /gpio/A6+)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 77 /gpio/A6)) + (net 171 /gpio/A6-)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 78 /gpio/A19)) + (net 172 /gpio/A19+)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 79 /gpio/B20)) + (net 173 /gpio/A19-)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 80 /gpio/A18)) + (net 174 /gpio/A18+)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 81 /gpio/B19)) + (net 175 /gpio/A18-)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4740,33 +4750,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 82 /gpio/A17)) + (net 176 /gpio/A17+)) (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 83 /gpio/B18)) + (net 177 /gpio/A17-)) (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 84 /gpio/B17)) + (net 178 /gpio/B17+)) (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 85 /gpio/C17)) + (net 179 /gpio/B17-)) (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 86 /gpio/C16)) + (net 180 /gpio/C16+)) (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 87 /gpio/D16)) + (net 181 /gpio/C16-)) (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 88 /gpio/A16)) + (net 182 /gpio/A16+)) (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 89 /gpio/B16)) + (net 183 /gpio/A16-)) (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 90 /gpio/D15)) + (net 184 /gpio/D15+)) (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 91 /gpio/E15)) + (net 185 /gpio/D15-)) (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 92 /gpio/B15)) + (net 186 /gpio/B15+)) (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 93 /gpio/C15)) + (net 187 /gpio/B15-)) (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 94 /gpio/D14)) + (net 188 /gpio/D14+)) (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 95 /gpio/E14)) + (net 189 /gpio/D14-)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4776,33 +4786,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 96 /gpio/A14)) + (net 190 /gpio/A14+)) (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 97 /gpio/C14)) + (net 191 /gpio/A14-)) (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 98 /gpio/D13)) + (net 192 /gpio/D13+)) (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 99 /gpio/E13)) + (net 193 /gpio/D13-)) (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 100 /gpio/B13)) + (net 194 /gpio/B13+)) (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 101 /gpio/C13)) + (net 195 /gpio/B13-)) (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 102 /gpio/A12)) + (net 196 /gpio/A12+)) (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 103 /gpio/A13)) + (net 197 /gpio/A12-)) (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 104 /gpio/D12)) + (net 198 /gpio/D12+)) (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 105 /gpio/E12)) + (net 199 /gpio/D12-)) (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 106 /gpio/B12)) + (net 200 /gpio/B12+)) (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 107 /gpio/C12)) + (net 201 /gpio/B12-)) (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 108 /gpio/D11)) + (net 202 /gpio/D11+)) (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 109 /gpio/E11)) + (net 203 /gpio/D11-)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4951,15 +4961,16 @@ (net 1 GND)) (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) - (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)) + (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) + (net 204 OLED_CLK)) (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 181 OLED_MOSI)) + (net 113 OLED_MOSI)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 182 OLED_RES)) + (net 114 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 183 OLED_DC)) + (net 115 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 184 OLED_CS)) + (net 116 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5001,9 +5012,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -5039,7 +5050,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 28 /power/WAKEUPn)) ) @@ -5073,9 +5084,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 119 BTN_PWRn)) + (net 61 BTN_PWRn)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 58E794DF) @@ -5103,7 +5114,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5136,7 +5147,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 45 GPDI_SDA)) + (net 43 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5169,7 +5180,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_SCL)) + (net 44 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5202,7 +5213,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5235,7 +5246,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_5V_SCL)) + (net 41 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5268,7 +5279,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_5V_SDA)) + (net 42 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5303,32 +5314,33 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 133 FTDI_nDTR)) + (net 65 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 194 FTDI_nRTS)) + (net 126 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (pad 4 smd rect (at -2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 197 FTDI_RXD)) + (net 129 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 202 FTDI_nRI)) + (net 134 FTDI_nRI)) (pad 6 smd rect (at -2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) - (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask)) + (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) + (net 205 FTDI_nDSR)) (pad 8 smd rect (at -2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 203 FTDI_nDCD)) + (net 135 FTDI_nDCD)) (pad 9 smd rect (at -2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 200 FTDI_nCTS)) + (net 132 FTDI_nCTS)) (pad 10 smd rect (at -2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 27 JTAG_TDO)) (pad 11 smd rect (at 2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 38 USB_FTDI_DP)) + (net 208 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 37 USB_FTDI_DM)) + (net 209 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (pad 14 smd rect (at 2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 131 nRESET)) + (net 63 nRESET)) (pad 15 smd rect (at 2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) @@ -5340,7 +5352,7 @@ (pad 19 smd rect (at 2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 26 JTAG_TMS)) (pad 20 smd rect (at 2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 196 FTDI_TXD)) + (net 128 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5373,7 +5385,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 172 /flash/FLASH_nWP)) + (net 104 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5406,7 +5418,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 173 /flash/FLASH_nHOLD)) + (net 105 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5439,7 +5451,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 174 /flash/FLASH_MOSI)) + (net 106 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5472,7 +5484,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 175 /flash/FLASH_MISO)) + (net 107 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5505,7 +5517,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 176 /flash/FLASH_SCK)) + (net 108 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5538,7 +5550,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 177 /flash/FLASH_nCS)) + (net 109 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5571,7 +5583,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 178 /flash/FPGA_PROGRAMN)) + (net 110 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5604,7 +5616,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 179 /flash/FPGA_DONE)) + (net 111 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5637,7 +5649,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 180 /flash/FPGA_INITN)) + (net 112 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5670,7 +5682,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5750,7 +5762,7 @@ (pad 2 smd rect (at 3.15 -1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) - (net 205 /gpdi/CLK_25MHz)) + (net 137 /gpdi/CLK_25MHz)) (pad 4 smd rect (at -3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -5778,7 +5790,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl diff --git a/ulx3s.kicad_pcb-bak b/ulx3s.kicad_pcb-bak index 6ed9e10..7d9bbc1 100644 --- a/ulx3s.kicad_pcb-bak +++ b/ulx3s.kicad_pcb-bak @@ -1,15 +1,15 @@ (kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4) (general - (links 563) - (no_connects 563) + (links 569) + (no_connects 569) (area 93.949999 61.269999 188.230001 112.370001) (thickness 1.6) (drawings 6) (tracks 0) (zones 0) (modules 113) - (nets 206) + (nets 210) ) (page A4) @@ -130,175 +130,179 @@ (net 34 /power/OSCI_32k) (net 35 /power/OSCO_32k) (net 36 FTDI_nSUSPEND) - (net 37 USB_FTDI_DM) - (net 38 USB_FTDI_DP) - (net 39 "Net-(Q2-Pad3)") - (net 40 SHUTDOWN) - (net 41 /analog/AUDIO_L) - (net 42 /analog/AUDIO_R) - (net 43 GPDI_5V_SCL) - (net 44 GPDI_5V_SDA) - (net 45 GPDI_SDA) - (net 46 GPDI_SCL) - (net 47 /gpdi/VREF2) - (net 48 /blinkey/BTNPU) - (net 49 SD_CMD) - (net 50 SD_CLK) - (net 51 SD_D0) - (net 52 SD_D1) - (net 53 USB5V) - (net 54 /gpio/B11) - (net 55 /gpio/C11) - (net 56 /gpio/A10) - (net 57 /gpio/A11) - (net 58 /gpio/B10) - (net 59 /gpio/A9) - (net 60 /gpio/C10) - (net 61 /gpio/B9) - (net 62 /gpio/E9) - (net 63 /gpio/D9) - (net 64 /gpio/A8) - (net 65 /gpio/A7) - (net 66 /gpio/B8) - (net 67 /gpio/C8) - (net 68 /gpio/D8) - (net 69 /gpio/E8) - (net 70 /gpio/C7) - (net 71 /gpio/C6) - (net 72 /gpio/D7) - (net 73 /gpio/E7) - (net 74 /gpio/D6) - (net 75 /gpio/E6) - (net 76 /gpio/B6) - (net 77 /gpio/A6) - (net 78 /gpio/A19) - (net 79 /gpio/B20) - (net 80 /gpio/A18) - (net 81 /gpio/B19) - (net 82 /gpio/A17) - (net 83 /gpio/B18) - (net 84 /gpio/B17) - (net 85 /gpio/C17) - (net 86 /gpio/C16) - (net 87 /gpio/D16) - (net 88 /gpio/A16) - (net 89 /gpio/B16) - (net 90 /gpio/D15) - (net 91 /gpio/E15) - (net 92 /gpio/B15) - (net 93 /gpio/C15) - (net 94 /gpio/D14) - (net 95 /gpio/E14) - (net 96 /gpio/A14) - (net 97 /gpio/C14) - (net 98 /gpio/D13) - (net 99 /gpio/E13) - (net 100 /gpio/B13) - (net 101 /gpio/C13) - (net 102 /gpio/A12) - (net 103 /gpio/A13) - (net 104 /gpio/D12) - (net 105 /gpio/E12) - (net 106 /gpio/B12) - (net 107 /gpio/C12) - (net 108 /gpio/D11) - (net 109 /gpio/E11) - (net 110 "Net-(BTN0-Pad1)") - (net 111 LED0) - (net 112 LED1) - (net 113 LED2) - (net 114 LED3) - (net 115 LED4) - (net 116 LED5) - (net 117 LED6) - (net 118 LED7) - (net 119 BTN_PWRn) - (net 120 GPDI_ETH_N) - (net 121 GPDI_ETH_P) - (net 122 GPDI_D2_P) - (net 123 GPDI_D2_N) - (net 124 GPDI_D1_P) - (net 125 GPDI_D1_N) - (net 126 GPDI_D0_P) - (net 127 GPDI_D0_N) - (net 128 GPDI_CLK_P) - (net 129 GPDI_CLK_N) - (net 130 GPDI_CEC) - (net 131 nRESET) - (net 132 /usb/FT3V3) - (net 133 FTDI_nDTR) - (net 134 SDRAM_CKE) - (net 135 SDRAM_A7) - (net 136 SDRAM_D15) - (net 137 SDRAM_BA1) - (net 138 SDRAM_D7) - (net 139 SDRAM_A6) - (net 140 SDRAM_CLK) - (net 141 SDRAM_D13) - (net 142 SDRAM_BA0) - (net 143 SDRAM_D6) - (net 144 SDRAM_A5) - (net 145 SDRAM_D14) - (net 146 SDRAM_A11) - (net 147 SDRAM_D12) - (net 148 SDRAM_D5) - (net 149 SDRAM_A4) - (net 150 SDRAM_A10) - (net 151 SDRAM_D11) - (net 152 SDRAM_A3) - (net 153 SDRAM_D4) - (net 154 SDRAM_D10) - (net 155 SDRAM_D9) - (net 156 SDRAM_A9) - (net 157 SDRAM_D3) - (net 158 SDRAM_D8) - (net 159 SDRAM_A8) - (net 160 SDRAM_A2) - (net 161 SDRAM_A1) - (net 162 SDRAM_A0) - (net 163 SDRAM_D2) - (net 164 SDRAM_D1) - (net 165 SDRAM_D0) - (net 166 SDRAM_DQM0) - (net 167 SDRAM_nCS) - (net 168 SDRAM_nRAS) - (net 169 SDRAM_DQM1) - (net 170 SDRAM_nCAS) - (net 171 SDRAM_nWE) - (net 172 /flash/FLASH_nWP) - (net 173 /flash/FLASH_nHOLD) - (net 174 /flash/FLASH_MOSI) - (net 175 /flash/FLASH_MISO) - (net 176 /flash/FLASH_SCK) - (net 177 /flash/FLASH_nCS) - (net 178 /flash/FPGA_PROGRAMN) - (net 179 /flash/FPGA_DONE) - (net 180 /flash/FPGA_INITN) - (net 181 OLED_MOSI) - (net 182 OLED_RES) - (net 183 OLED_DC) - (net 184 OLED_CS) - (net 185 AUDIO_L3) - (net 186 AUDIO_L2) - (net 187 AUDIO_L1) - (net 188 AUDIO_L0) - (net 189 AUDIO_R3) - (net 190 AUDIO_R2) - (net 191 AUDIO_R1) - (net 192 AUDIO_R0) - (net 193 WIFI_EN) - (net 194 FTDI_nRTS) - (net 195 WIFI_GPIO2) - (net 196 FTDI_TXD) - (net 197 FTDI_RXD) - (net 198 WIFI_RXD) - (net 199 WIFI_GPIO0) - (net 200 FTDI_nCTS) - (net 201 WIFI_TXD) - (net 202 FTDI_nRI) - (net 203 FTDI_nDCD) - (net 204 WIFI_GPIO15) - (net 205 /gpdi/CLK_25MHz) + (net 37 "Net-(Q2-Pad3)") + (net 38 SHUTDOWN) + (net 39 /analog/AUDIO_L) + (net 40 /analog/AUDIO_R) + (net 41 GPDI_5V_SCL) + (net 42 GPDI_5V_SDA) + (net 43 GPDI_SDA) + (net 44 GPDI_SCL) + (net 45 /gpdi/VREF2) + (net 46 /blinkey/BTNPU) + (net 47 SD_CMD) + (net 48 SD_CLK) + (net 49 SD_D0) + (net 50 SD_D1) + (net 51 USB5V) + (net 52 "Net-(BTN0-Pad1)") + (net 53 LED0) + (net 54 LED1) + (net 55 LED2) + (net 56 LED3) + (net 57 LED4) + (net 58 LED5) + (net 59 LED6) + (net 60 LED7) + (net 61 BTN_PWRn) + (net 62 GPDI_CEC) + (net 63 nRESET) + (net 64 /usb/FT3V3) + (net 65 FTDI_nDTR) + (net 66 SDRAM_CKE) + (net 67 SDRAM_A7) + (net 68 SDRAM_D15) + (net 69 SDRAM_BA1) + (net 70 SDRAM_D7) + (net 71 SDRAM_A6) + (net 72 SDRAM_CLK) + (net 73 SDRAM_D13) + (net 74 SDRAM_BA0) + (net 75 SDRAM_D6) + (net 76 SDRAM_A5) + (net 77 SDRAM_D14) + (net 78 SDRAM_A11) + (net 79 SDRAM_D12) + (net 80 SDRAM_D5) + (net 81 SDRAM_A4) + (net 82 SDRAM_A10) + (net 83 SDRAM_D11) + (net 84 SDRAM_A3) + (net 85 SDRAM_D4) + (net 86 SDRAM_D10) + (net 87 SDRAM_D9) + (net 88 SDRAM_A9) + (net 89 SDRAM_D3) + (net 90 SDRAM_D8) + (net 91 SDRAM_A8) + (net 92 SDRAM_A2) + (net 93 SDRAM_A1) + (net 94 SDRAM_A0) + (net 95 SDRAM_D2) + (net 96 SDRAM_D1) + (net 97 SDRAM_D0) + (net 98 SDRAM_DQM0) + (net 99 SDRAM_nCS) + (net 100 SDRAM_nRAS) + (net 101 SDRAM_DQM1) + (net 102 SDRAM_nCAS) + (net 103 SDRAM_nWE) + (net 104 /flash/FLASH_nWP) + (net 105 /flash/FLASH_nHOLD) + (net 106 /flash/FLASH_MOSI) + (net 107 /flash/FLASH_MISO) + (net 108 /flash/FLASH_SCK) + (net 109 /flash/FLASH_nCS) + (net 110 /flash/FPGA_PROGRAMN) + (net 111 /flash/FPGA_DONE) + (net 112 /flash/FPGA_INITN) + (net 113 OLED_MOSI) + (net 114 OLED_RES) + (net 115 OLED_DC) + (net 116 OLED_CS) + (net 117 AUDIO_L3) + (net 118 AUDIO_L2) + (net 119 AUDIO_L1) + (net 120 AUDIO_L0) + (net 121 AUDIO_R3) + (net 122 AUDIO_R2) + (net 123 AUDIO_R1) + (net 124 AUDIO_R0) + (net 125 WIFI_EN) + (net 126 FTDI_nRTS) + (net 127 WIFI_GPIO2) + (net 128 FTDI_TXD) + (net 129 FTDI_RXD) + (net 130 WIFI_RXD) + (net 131 WIFI_GPIO0) + (net 132 FTDI_nCTS) + (net 133 WIFI_TXD) + (net 134 FTDI_nRI) + (net 135 FTDI_nDCD) + (net 136 WIFI_GPIO15) + (net 137 /gpdi/CLK_25MHz) + (net 138 GPDI_ETH-) + (net 139 GPDI_ETH+) + (net 140 GPDI_D2+) + (net 141 GPDI_D2-) + (net 142 GPDI_D1+) + (net 143 GPDI_D1-) + (net 144 GPDI_D0+) + (net 145 GPDI_D0-) + (net 146 GPDI_CLK+) + (net 147 GPDI_CLK-) + (net 148 /gpio/B11+) + (net 149 /gpio/B11-) + (net 150 /gpio/A10+) + (net 151 /gpio/A10-) + (net 152 /gpio/B10+) + (net 153 /gpio/B10-) + (net 154 /gpio/B9+) + (net 155 /gpio/B9-) + (net 156 /gpio/D9+) + (net 157 /gpio/D9-) + (net 158 /gpio/A7+) + (net 159 /gpio/A7-) + (net 160 /gpio/C8+) + (net 161 /gpio/C8-) + (net 162 /gpio/E8+) + (net 163 /gpio/E8-) + (net 164 /gpio/C6+) + (net 165 /gpio/C6-) + (net 166 /gpio/E7+) + (net 167 /gpio/E7-) + (net 168 /gpio/E6+) + (net 169 /gpio/E6-) + (net 170 /gpio/A6+) + (net 171 /gpio/A6-) + (net 172 /gpio/A19+) + (net 173 /gpio/A19-) + (net 174 /gpio/A18+) + (net 175 /gpio/A18-) + (net 176 /gpio/A17+) + (net 177 /gpio/A17-) + (net 178 /gpio/B17+) + (net 179 /gpio/B17-) + (net 180 /gpio/C16+) + (net 181 /gpio/C16-) + (net 182 /gpio/A16+) + (net 183 /gpio/A16-) + (net 184 /gpio/D15+) + (net 185 /gpio/D15-) + (net 186 /gpio/B15+) + (net 187 /gpio/B15-) + (net 188 /gpio/D14+) + (net 189 /gpio/D14-) + (net 190 /gpio/A14+) + (net 191 /gpio/A14-) + (net 192 /gpio/D13+) + (net 193 /gpio/D13-) + (net 194 /gpio/B13+) + (net 195 /gpio/B13-) + (net 196 /gpio/A12+) + (net 197 /gpio/A12-) + (net 198 /gpio/D12+) + (net 199 /gpio/D12-) + (net 200 /gpio/B12+) + (net 201 /gpio/B12-) + (net 202 /gpio/D11+) + (net 203 /gpio/D11-) + (net 204 OLED_CLK) + (net 205 FTDI_nDSR) + (net 206 USB_FPGA_D+) + (net 207 USB_FPGA_D-) + (net 208 USB_FTDI_D+) + (net 209 USB_FTDI_D-) (net_class Default "This is the default net class." (clearance 0.127) @@ -331,6 +335,7 @@ (add_net /power/WKUP) (add_net /power/WKn) (add_net /usb/FT3V3) + (add_net FTDI_nDSR) (add_net FTDI_nSUSPEND) (add_net GND) (add_net "Net-(BTN0-Pad1)") @@ -341,8 +346,8 @@ (add_net "Net-(Q2-Pad3)") (add_net SHUTDOWN) (add_net USB5V) - (add_net USB_FTDI_DM) - (add_net USB_FTDI_DP) + (add_net USB_FTDI_D+) + (add_net USB_FTDI_D-) (add_net nRESET) ) @@ -363,62 +368,62 @@ (add_net /flash/FPGA_INITN) (add_net /flash/FPGA_PROGRAMN) (add_net /gpdi/CLK_25MHz) - (add_net /gpio/A10) - (add_net /gpio/A11) - (add_net /gpio/A12) - (add_net /gpio/A13) - (add_net /gpio/A14) - (add_net /gpio/A16) - (add_net /gpio/A17) - (add_net /gpio/A18) - (add_net /gpio/A19) - (add_net /gpio/A6) - (add_net /gpio/A7) - (add_net /gpio/A8) - (add_net /gpio/A9) - (add_net /gpio/B10) - (add_net /gpio/B11) - (add_net /gpio/B12) - (add_net /gpio/B13) - (add_net /gpio/B15) - (add_net /gpio/B16) - (add_net /gpio/B17) - (add_net /gpio/B18) - (add_net /gpio/B19) - (add_net /gpio/B20) - (add_net /gpio/B6) - (add_net /gpio/B8) - (add_net /gpio/B9) - (add_net /gpio/C10) - (add_net /gpio/C11) - (add_net /gpio/C12) - (add_net /gpio/C13) - (add_net /gpio/C14) - (add_net /gpio/C15) - (add_net /gpio/C16) - (add_net /gpio/C17) - (add_net /gpio/C6) - (add_net /gpio/C7) - (add_net /gpio/C8) - (add_net /gpio/D11) - (add_net /gpio/D12) - (add_net /gpio/D13) - (add_net /gpio/D14) - (add_net /gpio/D15) - (add_net /gpio/D16) - (add_net /gpio/D6) - (add_net /gpio/D7) - (add_net /gpio/D8) - (add_net /gpio/D9) - (add_net /gpio/E11) - (add_net /gpio/E12) - (add_net /gpio/E13) - (add_net /gpio/E14) - (add_net /gpio/E15) - (add_net /gpio/E6) - (add_net /gpio/E7) - (add_net /gpio/E8) - (add_net /gpio/E9) + (add_net /gpio/A10+) + (add_net /gpio/A10-) + (add_net /gpio/A12+) + (add_net /gpio/A12-) + (add_net /gpio/A14+) + (add_net /gpio/A14-) + (add_net /gpio/A16+) + (add_net /gpio/A16-) + (add_net /gpio/A17+) + (add_net /gpio/A17-) + (add_net /gpio/A18+) + (add_net /gpio/A18-) + (add_net /gpio/A19+) + (add_net /gpio/A19-) + (add_net /gpio/A6+) + (add_net /gpio/A6-) + (add_net /gpio/A7+) + (add_net /gpio/A7-) + (add_net /gpio/B10+) + (add_net /gpio/B10-) + (add_net /gpio/B11+) + (add_net /gpio/B11-) + (add_net /gpio/B12+) + (add_net /gpio/B12-) + (add_net /gpio/B13+) + (add_net /gpio/B13-) + (add_net /gpio/B15+) + (add_net /gpio/B15-) + (add_net /gpio/B17+) + (add_net /gpio/B17-) + (add_net /gpio/B9+) + (add_net /gpio/B9-) + (add_net /gpio/C16+) + (add_net /gpio/C16-) + (add_net /gpio/C6+) + (add_net /gpio/C6-) + (add_net /gpio/C8+) + (add_net /gpio/C8-) + (add_net /gpio/D11+) + (add_net /gpio/D11-) + (add_net /gpio/D12+) + (add_net /gpio/D12-) + (add_net /gpio/D13+) + (add_net /gpio/D13-) + (add_net /gpio/D14+) + (add_net /gpio/D14-) + (add_net /gpio/D15+) + (add_net /gpio/D15-) + (add_net /gpio/D9+) + (add_net /gpio/D9-) + (add_net /gpio/E6+) + (add_net /gpio/E6-) + (add_net /gpio/E7+) + (add_net /gpio/E7-) + (add_net /gpio/E8+) + (add_net /gpio/E8-) (add_net AUDIO_L0) (add_net AUDIO_L1) (add_net AUDIO_L2) @@ -444,16 +449,16 @@ (add_net GPDI_5V_SCL) (add_net GPDI_5V_SDA) (add_net GPDI_CEC) - (add_net GPDI_CLK_N) - (add_net GPDI_CLK_P) - (add_net GPDI_D0_N) - (add_net GPDI_D0_P) - (add_net GPDI_D1_N) - (add_net GPDI_D1_P) - (add_net GPDI_D2_N) - (add_net GPDI_D2_P) - (add_net GPDI_ETH_N) - (add_net GPDI_ETH_P) + (add_net GPDI_CLK+) + (add_net GPDI_CLK-) + (add_net GPDI_D0+) + (add_net GPDI_D0-) + (add_net GPDI_D1+) + (add_net GPDI_D1-) + (add_net GPDI_D2+) + (add_net GPDI_D2-) + (add_net GPDI_ETH+) + (add_net GPDI_ETH-) (add_net GPDI_SCL) (add_net GPDI_SDA) (add_net JTAG_TCK) @@ -468,6 +473,7 @@ (add_net LED5) (add_net LED6) (add_net LED7) + (add_net OLED_CLK) (add_net OLED_CS) (add_net OLED_DC) (add_net OLED_MOSI) @@ -515,6 +521,8 @@ (add_net SD_CMD) (add_net SD_D0) (add_net SD_D1) + (add_net USB_FPGA_D+) + (add_net USB_FPGA_D-) (add_net WIFI_EN) (add_net WIFI_GPIO0) (add_net WIFI_GPIO15) @@ -677,19 +685,19 @@ (pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 23 SD_3)) (pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 49 SD_CMD)) + (net 47 SD_CMD)) (pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 50 SD_CLK)) + (net 48 SD_CLK)) (pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 51 SD_D0)) + (net 49 SD_D0)) (pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask) - (net 52 SD_D1)) + (net 50 SD_D1)) (pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask)) (pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask)) (pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask)) @@ -848,9 +856,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -891,9 +899,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -934,9 +942,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -977,9 +985,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1020,9 +1028,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1063,9 +1071,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -1106,7 +1114,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 111 LED0)) + (net 53 LED0)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1150,7 +1158,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 112 LED1)) + (net 54 LED1)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1194,7 +1202,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 113 LED2)) + (net 55 LED2)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1238,7 +1246,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 114 LED3)) + (net 56 LED3)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1282,7 +1290,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 115 LED4)) + (net 57 LED4)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1326,7 +1334,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 116 LED5)) + (net 58 LED5)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1370,7 +1378,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 117 LED6)) + (net 59 LED6)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1414,7 +1422,7 @@ (fp_line (start -1.9 0.95) (end -1.9 -0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start -1.9 -0.95) (end 1.9 -0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd rect (at 1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) - (net 118 LED7)) + (net 60 LED7)) (pad 1 smd rect (at -1.04902 0 90) (size 1.19888 1.19888) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model LEDs.3dshapes/LED_0805.wrl @@ -1802,7 +1810,7 @@ (pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask) - (net 53 USB5V)) + (net 51 USB5V)) (model SMD_Packages.3dshapes/SMD-1206_Pol.wrl (at (xyz 0 0 0)) (scale (xyz 0.17 0.16 0.16)) @@ -2005,19 +2013,19 @@ (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 30 /power/SHUT)) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 SHUTDOWN)) + (net 38 SHUTDOWN)) ) (module Diodes_SMD:D_0805 (layer B.Cu) (tedit 574BBB4C) (tstamp 58D7A84D) - (at 172.205 86.82 90) + (at 166.905 77.295 180) (descr "Diode SMD in 0805 package") (tags "smd diode") (path /58D51CAD/58D7BC4A) (attr smd) - (fp_text reference D12 (at 0 -1.6 90) (layer B.SilkS) + (fp_text reference D12 (at 0 -1.6 180) (layer B.SilkS) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (fp_text value 1N4148 (at 0 1.6 90) (layer B.Fab) + (fp_text value 1N4148 (at 0 1.6 180) (layer B.Fab) (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) (fp_line (start -1.8 -0.9) (end -1.8 0.9) (layer B.CrtYd) (width 0.05)) @@ -2036,9 +2044,9 @@ (fp_line (start -1 0.6) (end 1 0.6) (layer B.Fab) (width 0.15)) (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) - (pad 1 smd rect (at -1.05 0 90) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) + (pad 1 smd rect (at -1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) - (pad 2 smd rect (at 1.05 0 90) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) + (pad 2 smd rect (at 1.05 0 180) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 36 FTDI_nSUSPEND)) ) @@ -2079,11 +2087,11 @@ (pad "" smd rect (at -1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad "" smd rect (at 1.2 0) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 53 USB5V)) + (net 51 USB5V)) (pad 2 smd rect (at -0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 37 USB_FTDI_DM)) + (net 209 USB_FTDI_D-)) (pad 3 smd rect (at 0 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) - (net 38 USB_FTDI_DP)) + (net 208 USB_FTDI_D+)) (pad 4 smd rect (at 0.65 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2129,8 +2137,10 @@ (pad "" smd rect (at 1.2 0 180) (size 1.9 1.9) (layers B.Cu B.Paste B.Mask)) (pad 1 smd rect (at -1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 21 "Net-(D9-Pad1)")) - (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) - (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) + (pad 2 smd rect (at -0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) + (net 207 USB_FPGA_D-)) + (pad 3 smd rect (at 0 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) + (net 206 USB_FPGA_D+)) (pad 4 smd rect (at 0.65 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask)) (pad 5 smd rect (at 1.3 2.675 180) (size 0.4 1.35) (layers B.Cu B.Paste B.Mask) (net 1 GND)) @@ -2158,13 +2168,13 @@ (fp_line (start -8.5 -2.5) (end -8.5 2.5) (layer F.SilkS) (width 0.1524)) (fp_line (start -8.5 2.5) (end -7 2.5) (layer F.SilkS) (width 0.1524)) (pad 1 smd rect (at -6.4 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (pad 4 smd rect (at -3.6 3.7 270) (size 2.2 2.8) (layers F.Cu F.Paste F.Mask)) (pad 2 smd rect (at 5.8 3.7 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 5 smd rect (at 9.9 -0.75 270) (size 2.8 2.8) (layers F.Cu F.Paste F.Mask)) (pad 3 smd rect (at -1.7 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (pad 6 smd rect (at -4.5 -3.7 270) (size 2 2.8) (layers F.Cu F.Paste F.Mask)) (pad "" np_thru_hole circle (at -2.5 0 270) (size 1.7 1.7) (drill 1.7) (layers *.Cu *.Mask F.SilkS) (clearance 0.4)) @@ -2196,105 +2206,105 @@ (pad 1 smd rect (at -5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 2 smd rect (at -5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 165 SDRAM_D0)) + (net 97 SDRAM_D0)) (pad 3 smd rect (at -5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 4 smd rect (at -5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_D1)) + (net 96 SDRAM_D1)) (pad 5 smd rect (at -5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 163 SDRAM_D2)) + (net 95 SDRAM_D2)) (pad 6 smd rect (at -5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 7 smd rect (at -5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 157 SDRAM_D3)) + (net 89 SDRAM_D3)) (pad 8 smd rect (at -5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 153 SDRAM_D4)) + (net 85 SDRAM_D4)) (pad 9 smd rect (at -5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 10 smd rect (at -5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 148 SDRAM_D5)) + (net 80 SDRAM_D5)) (pad 11 smd rect (at -5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 143 SDRAM_D6)) + (net 75 SDRAM_D6)) (pad 12 smd rect (at -5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 13 smd rect (at -5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 138 SDRAM_D7)) + (net 70 SDRAM_D7)) (pad 14 smd rect (at -5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 15 smd rect (at -5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 166 SDRAM_DQM0)) + (net 98 SDRAM_DQM0)) (pad 16 smd rect (at -5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 171 SDRAM_nWE)) + (net 103 SDRAM_nWE)) (pad 17 smd rect (at -5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 170 SDRAM_nCAS)) + (net 102 SDRAM_nCAS)) (pad 18 smd rect (at -5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 168 SDRAM_nRAS)) + (net 100 SDRAM_nRAS)) (pad 19 smd rect (at -5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 167 SDRAM_nCS)) + (net 99 SDRAM_nCS)) (pad 20 smd rect (at -5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 142 SDRAM_BA0)) + (net 74 SDRAM_BA0)) (pad 21 smd rect (at -5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 137 SDRAM_BA1)) + (net 69 SDRAM_BA1)) (pad 22 smd rect (at -5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 150 SDRAM_A10)) + (net 82 SDRAM_A10)) (pad 23 smd rect (at -5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 162 SDRAM_A0)) + (net 94 SDRAM_A0)) (pad 24 smd rect (at -5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 161 SDRAM_A1)) + (net 93 SDRAM_A1)) (pad 25 smd rect (at -5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 160 SDRAM_A2)) + (net 92 SDRAM_A2)) (pad 26 smd rect (at -5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 152 SDRAM_A3)) + (net 84 SDRAM_A3)) (pad 27 smd rect (at -5.53 10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 29 smd rect (at 5.53 9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 149 SDRAM_A4)) + (net 81 SDRAM_A4)) (pad 30 smd rect (at 5.53 8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 144 SDRAM_A5)) + (net 76 SDRAM_A5)) (pad 31 smd rect (at 5.53 8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 139 SDRAM_A6)) + (net 71 SDRAM_A6)) (pad 32 smd rect (at 5.53 7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 135 SDRAM_A7)) + (net 67 SDRAM_A7)) (pad 33 smd rect (at 5.53 6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 159 SDRAM_A8)) + (net 91 SDRAM_A8)) (pad 34 smd rect (at 5.53 5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 156 SDRAM_A9)) + (net 88 SDRAM_A9)) (pad 35 smd rect (at 5.53 4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 146 SDRAM_A11)) + (net 78 SDRAM_A11)) (pad 36 smd rect (at 5.53 4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 37 smd rect (at 5.53 3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 134 SDRAM_CKE)) + (net 66 SDRAM_CKE)) (pad 38 smd rect (at 5.53 2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 140 SDRAM_CLK)) + (net 72 SDRAM_CLK)) (pad 39 smd rect (at 5.53 1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 169 SDRAM_DQM1)) + (net 101 SDRAM_DQM1)) (pad 40 smd rect (at 5.53 0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask)) (pad 41 smd rect (at 5.53 0 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 42 smd rect (at 5.53 -0.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 158 SDRAM_D8)) + (net 90 SDRAM_D8)) (pad 43 smd rect (at 5.53 -1.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 44 smd rect (at 5.53 -2.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 155 SDRAM_D9)) + (net 87 SDRAM_D9)) (pad 45 smd rect (at 5.53 -3.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 154 SDRAM_D10)) + (net 86 SDRAM_D10)) (pad 46 smd rect (at 5.53 -4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 47 smd rect (at 5.53 -4.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 151 SDRAM_D11)) + (net 83 SDRAM_D11)) (pad 48 smd rect (at 5.53 -5.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 147 SDRAM_D12)) + (net 79 SDRAM_D12)) (pad 49 smd rect (at 5.53 -6.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 5 +3V3)) (pad 50 smd rect (at 5.53 -7.2 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 141 SDRAM_D13)) + (net 73 SDRAM_D13)) (pad 51 smd rect (at 5.53 -8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 145 SDRAM_D14)) + (net 77 SDRAM_D14)) (pad 52 smd rect (at 5.53 -8.8 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 53 smd rect (at 5.53 -9.6 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) - (net 136 SDRAM_D15)) + (net 68 SDRAM_D15)) (pad 54 smd rect (at 5.53 -10.4 90) (size 0.9 0.56) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (model Housings_SSOP.3dshapes/TSOPII-54_10.16x22.22mm_Pitch0.8mm.wrl @@ -2370,7 +2380,7 @@ (pad 2 smd rect (at -1.5 -0.95 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 1.5 0 90) (size 1.9 0.8) (layers B.Cu B.Paste B.Mask) - (net 39 "Net-(Q2-Pad3)")) + (net 37 "Net-(Q2-Pad3)")) (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2700,7 +2710,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 48 /blinkey/BTNPU)) + (net 46 /blinkey/BTNPU)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2733,7 +2743,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 18 /power/PWREN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 39 "Net-(Q2-Pad3)")) + (net 37 "Net-(Q2-Pad3)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2764,9 +2774,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 131 nRESET)) + (net 63 nRESET)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2775,7 +2785,7 @@ ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 58D8ED91) - (at 170.3 77.93 180) + (at 162.68 77.295 180) (descr "Resistor SMD 0603, hand soldering") (tags "resistor 0603") (path /58D6BF46/58EBA6BD) @@ -2799,7 +2809,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 36 FTDI_nSUSPEND)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 133 FTDI_nDTR)) + (net 65 FTDI_nDTR)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2830,7 +2840,7 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 40 SHUTDOWN)) + (net 38 SHUTDOWN)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl @@ -3061,9 +3071,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 185 AUDIO_L3)) + (net 117 AUDIO_L3)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3094,9 +3104,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 186 AUDIO_L2)) + (net 118 AUDIO_L2)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3127,9 +3137,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 187 AUDIO_L1)) + (net 119 AUDIO_L1)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3160,9 +3170,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 188 AUDIO_L0)) + (net 120 AUDIO_L0)) (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 41 /analog/AUDIO_L)) + (net 39 /analog/AUDIO_L)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3193,9 +3203,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 189 AUDIO_R3)) + (net 121 AUDIO_R3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3226,9 +3236,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 190 AUDIO_R2)) + (net 122 AUDIO_R2)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3259,9 +3269,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 191 AUDIO_R1)) + (net 123 AUDIO_R1)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3292,9 +3302,9 @@ (fp_line (start 0.5 -0.675) (end -0.5 -0.675) (layer B.SilkS) (width 0.15)) (fp_line (start -0.5 0.675) (end 0.5 0.675) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 192 AUDIO_R0)) + (net 124 AUDIO_R0)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 42 /analog/AUDIO_R)) + (net 40 /analog/AUDIO_R)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -3320,209 +3330,209 @@ (pad A2 smd circle (at -6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 12 BTN_L) (solder_mask_margin 0.04)) (pad A3 smd circle (at -6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 122 GPDI_D2_P) (solder_mask_margin 0.04)) + (net 140 GPDI_D2+) (solder_mask_margin 0.04)) (pad A4 smd circle (at -5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 124 GPDI_D1_P) (solder_mask_margin 0.04)) + (net 142 GPDI_D1+) (solder_mask_margin 0.04)) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 125 GPDI_D1_N) (solder_mask_margin 0.04)) + (net 143 GPDI_D1-) (solder_mask_margin 0.04)) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 76 /gpio/B6) (solder_mask_margin 0.04)) + (net 170 /gpio/A6+) (solder_mask_margin 0.04)) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 64 /gpio/A8) (solder_mask_margin 0.04)) + (net 158 /gpio/A7+) (solder_mask_margin 0.04)) (pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 65 /gpio/A7) (solder_mask_margin 0.04)) + (net 159 /gpio/A7-) (solder_mask_margin 0.04)) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 59 /gpio/A9) (solder_mask_margin 0.04)) + (net 153 /gpio/B10-) (solder_mask_margin 0.04)) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 56 /gpio/A10) (solder_mask_margin 0.04)) + (net 150 /gpio/A10+) (solder_mask_margin 0.04)) (pad A11 smd circle (at 0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 57 /gpio/A11) (solder_mask_margin 0.04)) + (net 151 /gpio/A10-) (solder_mask_margin 0.04)) (pad A12 smd circle (at 1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 102 /gpio/A12) (solder_mask_margin 0.04)) + (net 196 /gpio/A12+) (solder_mask_margin 0.04)) (pad A13 smd circle (at 2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 103 /gpio/A13) (solder_mask_margin 0.04)) + (net 197 /gpio/A12-) (solder_mask_margin 0.04)) (pad A14 smd circle (at 2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 96 /gpio/A14) (solder_mask_margin 0.04)) + (net 190 /gpio/A14+) (solder_mask_margin 0.04)) (pad A15 smd circle (at 3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad A16 smd circle (at 4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 88 /gpio/A16) (solder_mask_margin 0.04)) + (net 182 /gpio/A16+) (solder_mask_margin 0.04)) (pad A17 smd circle (at 5.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 82 /gpio/A17) (solder_mask_margin 0.04)) + (net 176 /gpio/A17+) (solder_mask_margin 0.04)) (pad A18 smd circle (at 6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 80 /gpio/A18) (solder_mask_margin 0.04)) + (net 174 /gpio/A18+) (solder_mask_margin 0.04)) (pad A19 smd circle (at 6.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 78 /gpio/A19) (solder_mask_margin 0.04)) + (net 172 /gpio/A19+) (solder_mask_margin 0.04)) (pad B1 smd circle (at -7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 114 LED3) (solder_mask_margin 0.04)) + (net 56 LED3) (solder_mask_margin 0.04)) (pad B2 smd circle (at -6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 9 BTN_D) (solder_mask_margin 0.04)) (pad B3 smd circle (at -6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 123 GPDI_D2_N) (solder_mask_margin 0.04)) + (net 141 GPDI_D2-) (solder_mask_margin 0.04)) (pad B4 smd circle (at -5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 129 GPDI_CLK_N) (solder_mask_margin 0.04)) + (net 147 GPDI_CLK-) (solder_mask_margin 0.04)) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 126 GPDI_D0_P) (solder_mask_margin 0.04)) + (net 144 GPDI_D0+) (solder_mask_margin 0.04)) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 77 /gpio/A6) (solder_mask_margin 0.04)) + (net 171 /gpio/A6-) (solder_mask_margin 0.04)) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 67 /gpio/C8) (solder_mask_margin 0.04)) + (net 161 /gpio/C8-) (solder_mask_margin 0.04)) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 60 /gpio/C10) (solder_mask_margin 0.04)) + (net 154 /gpio/B9+) (solder_mask_margin 0.04)) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 58 /gpio/B10) (solder_mask_margin 0.04)) + (net 152 /gpio/B10+) (solder_mask_margin 0.04)) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 54 /gpio/B11) (solder_mask_margin 0.04)) + (net 148 /gpio/B11+) (solder_mask_margin 0.04)) (pad B12 smd circle (at 1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 106 /gpio/B12) (solder_mask_margin 0.04)) + (net 200 /gpio/B12+) (solder_mask_margin 0.04)) (pad B13 smd circle (at 2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 100 /gpio/B13) (solder_mask_margin 0.04)) + (net 194 /gpio/B13+) (solder_mask_margin 0.04)) (pad B14 smd circle (at 2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad B15 smd circle (at 3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 92 /gpio/B15) (solder_mask_margin 0.04)) + (net 186 /gpio/B15+) (solder_mask_margin 0.04)) (pad B16 smd circle (at 4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 89 /gpio/B16) (solder_mask_margin 0.04)) + (net 183 /gpio/A16-) (solder_mask_margin 0.04)) (pad B17 smd circle (at 5.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 84 /gpio/B17) (solder_mask_margin 0.04)) + (net 178 /gpio/B17+) (solder_mask_margin 0.04)) (pad B18 smd circle (at 6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 83 /gpio/B18) (solder_mask_margin 0.04)) + (net 177 /gpio/A17-) (solder_mask_margin 0.04)) (pad B19 smd circle (at 6.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 81 /gpio/B19) (solder_mask_margin 0.04)) + (net 175 /gpio/A18-) (solder_mask_margin 0.04)) (pad B20 smd circle (at 7.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 79 /gpio/B20) (solder_mask_margin 0.04)) + (net 173 /gpio/A19-) (solder_mask_margin 0.04)) (pad C1 smd circle (at -7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 10 BTN_F1) (solder_mask_margin 0.04)) (pad C2 smd circle (at -6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 113 LED2) (solder_mask_margin 0.04)) + (net 55 LED2) (solder_mask_margin 0.04)) (pad C3 smd circle (at -6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 121 GPDI_ETH_P) (solder_mask_margin 0.04)) + (net 139 GPDI_ETH+) (solder_mask_margin 0.04)) (pad C4 smd circle (at -5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 128 GPDI_CLK_P) (solder_mask_margin 0.04)) + (net 146 GPDI_CLK+) (solder_mask_margin 0.04)) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 127 GPDI_D0_N) (solder_mask_margin 0.04)) + (net 145 GPDI_D0-) (solder_mask_margin 0.04)) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 70 /gpio/C7) (solder_mask_margin 0.04)) + (net 164 /gpio/C6+) (solder_mask_margin 0.04)) (pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 71 /gpio/C6) (solder_mask_margin 0.04)) + (net 165 /gpio/C6-) (solder_mask_margin 0.04)) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 66 /gpio/B8) (solder_mask_margin 0.04)) + (net 160 /gpio/C8+) (solder_mask_margin 0.04)) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 61 /gpio/B9) (solder_mask_margin 0.04)) + (net 155 /gpio/B9-) (solder_mask_margin 0.04)) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 55 /gpio/C11) (solder_mask_margin 0.04)) + (net 149 /gpio/B11-) (solder_mask_margin 0.04)) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 107 /gpio/C12) (solder_mask_margin 0.04)) + (net 201 /gpio/B12-) (solder_mask_margin 0.04)) (pad C13 smd circle (at 2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 101 /gpio/C13) (solder_mask_margin 0.04)) + (net 195 /gpio/B13-) (solder_mask_margin 0.04)) (pad C14 smd circle (at 2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 97 /gpio/C14) (solder_mask_margin 0.04)) + (net 191 /gpio/A14-) (solder_mask_margin 0.04)) (pad C15 smd circle (at 3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 93 /gpio/C15) (solder_mask_margin 0.04)) + (net 187 /gpio/B15-) (solder_mask_margin 0.04)) (pad C16 smd circle (at 4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 86 /gpio/C16) (solder_mask_margin 0.04)) + (net 180 /gpio/C16+) (solder_mask_margin 0.04)) (pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 85 /gpio/C17) (solder_mask_margin 0.04)) + (net 179 /gpio/B17-) (solder_mask_margin 0.04)) (pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 134 SDRAM_CKE) (solder_mask_margin 0.04)) + (net 66 SDRAM_CKE) (solder_mask_margin 0.04)) (pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 135 SDRAM_A7) (solder_mask_margin 0.04)) + (net 67 SDRAM_A7) (solder_mask_margin 0.04)) (pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 116 LED5) (solder_mask_margin 0.04)) + (net 58 LED5) (solder_mask_margin 0.04)) (pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 13 BTN_R) (solder_mask_margin 0.04)) (pad D3 smd circle (at -6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 120 GPDI_ETH_N) (solder_mask_margin 0.04)) + (net 138 GPDI_ETH-) (solder_mask_margin 0.04)) (pad D4 smd circle (at -5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 45 GPDI_SDA) (solder_mask_margin 0.04)) + (net 43 GPDI_SDA) (solder_mask_margin 0.04)) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 75 /gpio/E6) (solder_mask_margin 0.04)) + (net 169 /gpio/E6-) (solder_mask_margin 0.04)) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 73 /gpio/E7) (solder_mask_margin 0.04)) + (net 167 /gpio/E7-) (solder_mask_margin 0.04)) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 69 /gpio/E8) (solder_mask_margin 0.04)) + (net 163 /gpio/E8-) (solder_mask_margin 0.04)) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 62 /gpio/E9) (solder_mask_margin 0.04)) + (net 156 /gpio/D9+) (solder_mask_margin 0.04)) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 108 /gpio/D11) (solder_mask_margin 0.04)) + (net 202 /gpio/D11+) (solder_mask_margin 0.04)) (pad D12 smd circle (at 1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 104 /gpio/D12) (solder_mask_margin 0.04)) + (net 198 /gpio/D12+) (solder_mask_margin 0.04)) (pad D13 smd circle (at 2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 98 /gpio/D13) (solder_mask_margin 0.04)) + (net 192 /gpio/D13+) (solder_mask_margin 0.04)) (pad D14 smd circle (at 2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 94 /gpio/D14) (solder_mask_margin 0.04)) + (net 188 /gpio/D14+) (solder_mask_margin 0.04)) (pad D15 smd circle (at 3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 90 /gpio/D15) (solder_mask_margin 0.04)) + (net 184 /gpio/D15+) (solder_mask_margin 0.04)) (pad D16 smd circle (at 4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 87 /gpio/D16) (solder_mask_margin 0.04)) + (net 181 /gpio/C16-) (solder_mask_margin 0.04)) (pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 137 SDRAM_BA1) (solder_mask_margin 0.04)) + (net 69 SDRAM_BA1) (solder_mask_margin 0.04)) (pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 138 SDRAM_D7) (solder_mask_margin 0.04)) + (net 70 SDRAM_D7) (solder_mask_margin 0.04)) (pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 139 SDRAM_A6) (solder_mask_margin 0.04)) + (net 71 SDRAM_A6) (solder_mask_margin 0.04)) (pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 115 LED4) (solder_mask_margin 0.04)) + (net 57 LED4) (solder_mask_margin 0.04)) (pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E3 smd circle (at -6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 112 LED1) (solder_mask_margin 0.04)) + (net 54 LED1) (solder_mask_margin 0.04)) (pad E4 smd circle (at -5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 46 GPDI_SCL) (solder_mask_margin 0.04)) + (net 44 GPDI_SCL) (solder_mask_margin 0.04)) (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 130 GPDI_CEC) (solder_mask_margin 0.04)) + (net 62 GPDI_CEC) (solder_mask_margin 0.04)) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 74 /gpio/D6) (solder_mask_margin 0.04)) + (net 168 /gpio/E6+) (solder_mask_margin 0.04)) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 72 /gpio/D7) (solder_mask_margin 0.04)) + (net 166 /gpio/E7+) (solder_mask_margin 0.04)) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 68 /gpio/D8) (solder_mask_margin 0.04)) + (net 162 /gpio/E8+) (solder_mask_margin 0.04)) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 63 /gpio/D9) (solder_mask_margin 0.04)) + (net 157 /gpio/D9-) (solder_mask_margin 0.04)) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 109 /gpio/E11) (solder_mask_margin 0.04)) + (net 203 /gpio/D11-) (solder_mask_margin 0.04)) (pad E12 smd circle (at 1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 105 /gpio/E12) (solder_mask_margin 0.04)) + (net 199 /gpio/D12-) (solder_mask_margin 0.04)) (pad E13 smd circle (at 2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 99 /gpio/E13) (solder_mask_margin 0.04)) + (net 193 /gpio/D13-) (solder_mask_margin 0.04)) (pad E14 smd circle (at 2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 95 /gpio/E14) (solder_mask_margin 0.04)) + (net 189 /gpio/D14-) (solder_mask_margin 0.04)) (pad E15 smd circle (at 3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 91 /gpio/E15) (solder_mask_margin 0.04)) + (net 185 /gpio/D15-) (solder_mask_margin 0.04)) (pad E16 smd circle (at 4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 142 SDRAM_BA0) (solder_mask_margin 0.04)) + (net 74 SDRAM_BA0) (solder_mask_margin 0.04)) (pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 143 SDRAM_D6) (solder_mask_margin 0.04)) + (net 75 SDRAM_D6) (solder_mask_margin 0.04)) (pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 144 SDRAM_A5) (solder_mask_margin 0.04)) + (net 76 SDRAM_A5) (solder_mask_margin 0.04)) (pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 130 WIFI_RXD) (solder_mask_margin 0.04)) (pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 205 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) + (net 137 /gpdi/CLK_25MHz) (solder_mask_margin 0.04)) (pad F3 smd circle (at -6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F4 smd circle (at -5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 14 BTN_U) (solder_mask_margin 0.04)) (pad F5 smd circle (at -4.4 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 111 LED0) (solder_mask_margin 0.04)) + (net 53 LED0) (solder_mask_margin 0.04)) (pad F6 smd circle (at -3.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad F7 smd circle (at -2.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3548,21 +3558,21 @@ (pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 147 SDRAM_D12) (solder_mask_margin 0.04)) + (net 79 SDRAM_D12) (solder_mask_margin 0.04)) (pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 148 SDRAM_D5) (solder_mask_margin 0.04)) + (net 80 SDRAM_D5) (solder_mask_margin 0.04)) (pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 149 SDRAM_A4) (solder_mask_margin 0.04)) + (net 81 SDRAM_A4) (solder_mask_margin 0.04)) (pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 133 WIFI_TXD) (solder_mask_margin 0.04)) (pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 129 FTDI_RXD) (solder_mask_margin 0.04)) (pad G3 smd circle (at -6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad G4 smd circle (at -5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G5 smd circle (at -4.4 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 118 LED7) (solder_mask_margin 0.04)) + (net 60 LED7) (solder_mask_margin 0.04)) (pad G6 smd circle (at -3.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G7 smd circle (at -2.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3588,19 +3598,19 @@ (pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 151 SDRAM_D11) (solder_mask_margin 0.04)) + (net 83 SDRAM_D11) (solder_mask_margin 0.04)) (pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 152 SDRAM_A3) (solder_mask_margin 0.04)) + (net 84 SDRAM_A3) (solder_mask_margin 0.04)) (pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 153 SDRAM_D4) (solder_mask_margin 0.04)) + (net 85 SDRAM_D4) (solder_mask_margin 0.04)) (pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 194 FTDI_nRTS) (solder_mask_margin 0.04)) + (net 65 FTDI_nDTR) (solder_mask_margin 0.04)) (pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 128 FTDI_TXD) (solder_mask_margin 0.04)) (pad H3 smd circle (at -6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 117 LED6) (solder_mask_margin 0.04)) + (net 59 LED6) (solder_mask_margin 0.04)) (pad H4 smd circle (at -5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 119 BTN_PWRn) (solder_mask_margin 0.04)) + (net 61 BTN_PWRn) (solder_mask_margin 0.04)) (pad H5 smd circle (at -4.4 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 11 BTN_F2) (solder_mask_margin 0.04)) (pad H6 smd circle (at -3.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3628,21 +3638,21 @@ (pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 156 SDRAM_A9) (solder_mask_margin 0.04)) + (net 88 SDRAM_A9) (solder_mask_margin 0.04)) (pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 157 SDRAM_D3) (solder_mask_margin 0.04)) + (net 89 SDRAM_D3) (solder_mask_margin 0.04)) (pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 195 WIFI_GPIO2) (solder_mask_margin 0.04)) + (net 125 WIFI_EN) (solder_mask_margin 0.04)) (pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad J3 smd circle (at -6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 196 FTDI_TXD) (solder_mask_margin 0.04)) + (net 126 FTDI_nRTS) (solder_mask_margin 0.04)) (pad J4 smd circle (at -5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 197 FTDI_RXD) (solder_mask_margin 0.04)) + (net 132 FTDI_nCTS) (solder_mask_margin 0.04)) (pad J5 smd circle (at -4.4 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 198 WIFI_RXD) (solder_mask_margin 0.04)) + (net 127 WIFI_GPIO2) (solder_mask_margin 0.04)) (pad J6 smd circle (at -3.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad J7 smd circle (at -2.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3668,21 +3678,21 @@ (pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 160 SDRAM_A2) (solder_mask_margin 0.04)) + (net 92 SDRAM_A2) (solder_mask_margin 0.04)) (pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 161 SDRAM_A1) (solder_mask_margin 0.04)) + (net 93 SDRAM_A1) (solder_mask_margin 0.04)) (pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 162 SDRAM_A0) (solder_mask_margin 0.04)) + (net 94 SDRAM_A0) (solder_mask_margin 0.04)) (pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 199 WIFI_GPIO0) (solder_mask_margin 0.04)) + (net 136 WIFI_GPIO15) (solder_mask_margin 0.04)) (pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 200 FTDI_nCTS) (solder_mask_margin 0.04)) + (net 205 FTDI_nDSR) (solder_mask_margin 0.04)) (pad K3 smd circle (at -6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 201 WIFI_TXD) (solder_mask_margin 0.04)) + (net 131 WIFI_GPIO0) (solder_mask_margin 0.04)) (pad K4 smd circle (at -5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 202 FTDI_nRI) (solder_mask_margin 0.04)) + (net 134 FTDI_nRI) (solder_mask_margin 0.04)) (pad K5 smd circle (at -4.4 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 181 OLED_MOSI) (solder_mask_margin 0.04)) + (net 113 OLED_MOSI) (solder_mask_margin 0.04)) (pad K6 smd circle (at -3.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad K7 smd circle (at -2.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3708,21 +3718,21 @@ (pad K17 smd circle (at 5.2 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 163 SDRAM_D2) (solder_mask_margin 0.04)) + (net 95 SDRAM_D2) (solder_mask_margin 0.04)) (pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 164 SDRAM_D1) (solder_mask_margin 0.04)) + (net 96 SDRAM_D1) (solder_mask_margin 0.04)) (pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 165 SDRAM_D0) (solder_mask_margin 0.04)) + (net 97 SDRAM_D0) (solder_mask_margin 0.04)) (pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 192 AUDIO_R0) (solder_mask_margin 0.04)) + (net 124 AUDIO_R0) (solder_mask_margin 0.04)) (pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 184 OLED_CS) (solder_mask_margin 0.04)) + (net 116 OLED_CS) (solder_mask_margin 0.04)) (pad L3 smd circle (at -6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L4 smd circle (at -5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 203 FTDI_nDCD) (solder_mask_margin 0.04)) + (net 135 FTDI_nDCD) (solder_mask_margin 0.04)) (pad L5 smd circle (at -4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 204 WIFI_GPIO15) (solder_mask_margin 0.04)) + (net 204 OLED_CLK) (solder_mask_margin 0.04)) (pad L6 smd circle (at -3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad L7 smd circle (at -2.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3750,15 +3760,15 @@ (pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 159 SDRAM_A8) (solder_mask_margin 0.04)) + (net 91 SDRAM_A8) (solder_mask_margin 0.04)) (pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 168 SDRAM_nRAS) (solder_mask_margin 0.04)) + (net 100 SDRAM_nRAS) (solder_mask_margin 0.04)) (pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 187 AUDIO_L1) (solder_mask_margin 0.04)) + (net 119 AUDIO_L1) (solder_mask_margin 0.04)) (pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad M3 smd circle (at -6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 206 USB_FPGA_D+) (solder_mask_margin 0.04)) (pad M4 smd circle (at -5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M5 smd circle (at -4.4 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3788,21 +3798,21 @@ (pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 136 SDRAM_D15) (solder_mask_margin 0.04)) + (net 68 SDRAM_D15) (solder_mask_margin 0.04)) (pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 166 SDRAM_DQM0) (solder_mask_margin 0.04)) + (net 98 SDRAM_DQM0) (solder_mask_margin 0.04)) (pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 169 SDRAM_DQM1) (solder_mask_margin 0.04)) + (net 101 SDRAM_DQM1) (solder_mask_margin 0.04)) (pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 188 AUDIO_L0) (solder_mask_margin 0.04)) + (net 120 AUDIO_L0) (solder_mask_margin 0.04)) (pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 191 AUDIO_R1) (solder_mask_margin 0.04)) + (net 123 AUDIO_R1) (solder_mask_margin 0.04)) (pad N3 smd circle (at -6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (solder_mask_margin 0.04)) + (net 207 USB_FPGA_D-) (solder_mask_margin 0.04)) (pad N4 smd circle (at -5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N5 smd circle (at -4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 183 OLED_DC) (solder_mask_margin 0.04)) + (net 115 OLED_DC) (solder_mask_margin 0.04)) (pad N6 smd circle (at -3.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad N7 smd circle (at -2.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3826,23 +3836,23 @@ (pad N16 smd circle (at 4.4 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 49 SD_CMD) (solder_mask_margin 0.04)) + (net 47 SD_CMD) (solder_mask_margin 0.04)) (pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 51 SD_D0) (solder_mask_margin 0.04)) + (net 49 SD_D0) (solder_mask_margin 0.04)) (pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 150 SDRAM_A10) (solder_mask_margin 0.04)) + (net 82 SDRAM_A10) (solder_mask_margin 0.04)) (pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 158 SDRAM_D8) (solder_mask_margin 0.04)) + (net 90 SDRAM_D8) (solder_mask_margin 0.04)) (pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 189 AUDIO_R3) (solder_mask_margin 0.04)) + (net 121 AUDIO_R3) (solder_mask_margin 0.04)) (pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 185 AUDIO_L3) (solder_mask_margin 0.04)) + (net 117 AUDIO_L3) (solder_mask_margin 0.04)) (pad P3 smd circle (at -6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 190 AUDIO_R2) (solder_mask_margin 0.04)) + (net 122 AUDIO_R2) (solder_mask_margin 0.04)) (pad P4 smd circle (at -5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 186 AUDIO_L2) (solder_mask_margin 0.04)) + (net 118 AUDIO_L2) (solder_mask_margin 0.04)) (pad P5 smd circle (at -4.4 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 182 OLED_RES) (solder_mask_margin 0.04)) + (net 114 OLED_RES) (solder_mask_margin 0.04)) (pad P6 smd circle (at -3.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 16 +2V5) (solder_mask_margin 0.04)) (pad P7 smd circle (at -2.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3868,15 +3878,15 @@ (pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 141 SDRAM_D13) (solder_mask_margin 0.04)) + (net 73 SDRAM_D13) (solder_mask_margin 0.04)) (pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 140 SDRAM_CLK) (solder_mask_margin 0.04)) + (net 72 SDRAM_CLK) (solder_mask_margin 0.04)) (pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 177 /flash/FLASH_nCS) (solder_mask_margin 0.04)) + (net 109 /flash/FLASH_nCS) (solder_mask_margin 0.04)) (pad R3 smd circle (at -6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad R4 smd circle (at -5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3884,11 +3894,11 @@ (pad R5 smd circle (at -4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 24 JTAG_TDI) (solder_mask_margin 0.04)) (pad R16 smd circle (at 4.4 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 50 SD_CLK) (solder_mask_margin 0.04)) + (net 48 SD_CLK) (solder_mask_margin 0.04)) (pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 52 SD_D1) (solder_mask_margin 0.04)) + (net 50 SD_D1) (solder_mask_margin 0.04)) (pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 154 SDRAM_D10) (solder_mask_margin 0.04)) + (net 86 SDRAM_D10) (solder_mask_margin 0.04)) (pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3928,17 +3938,17 @@ (pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 155 SDRAM_D9) (solder_mask_margin 0.04)) + (net 87 SDRAM_D9) (solder_mask_margin 0.04)) (pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 171 SDRAM_nWE) (solder_mask_margin 0.04)) + (net 103 SDRAM_nWE) (solder_mask_margin 0.04)) (pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 167 SDRAM_nCS) (solder_mask_margin 0.04)) + (net 99 SDRAM_nCS) (solder_mask_margin 0.04)) (pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 5 +3V3) (solder_mask_margin 0.04)) (pad U3 smd circle (at -6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 176 /flash/FLASH_SCK) (solder_mask_margin 0.04)) + (net 108 /flash/FLASH_SCK) (solder_mask_margin 0.04)) (pad U4 smd circle (at -5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad U5 smd circle (at -4.4 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -3968,17 +3978,17 @@ (pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 146 SDRAM_A11) (solder_mask_margin 0.04)) + (net 78 SDRAM_A11) (solder_mask_margin 0.04)) (pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 170 SDRAM_nCAS) (solder_mask_margin 0.04)) + (net 102 SDRAM_nCAS) (solder_mask_margin 0.04)) (pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 145 SDRAM_D14) (solder_mask_margin 0.04)) + (net 77 SDRAM_D14) (solder_mask_margin 0.04)) (pad V1 smd circle (at -7.6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad V2 smd circle (at -6.8 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 175 /flash/FLASH_MISO) (solder_mask_margin 0.04)) + (net 107 /flash/FLASH_MISO) (solder_mask_margin 0.04)) (pad V3 smd circle (at -6 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 180 /flash/FPGA_INITN) (solder_mask_margin 0.04)) + (net 112 /flash/FPGA_INITN) (solder_mask_margin 0.04)) (pad V4 smd circle (at -5.2 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 27 JTAG_TDO) (solder_mask_margin 0.04)) (pad V5 smd circle (at -4.4 6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4016,9 +4026,9 @@ (pad W1 smd circle (at -7.6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W2 smd circle (at -6.8 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 174 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) + (net 106 /flash/FLASH_MOSI) (solder_mask_margin 0.04)) (pad W3 smd circle (at -6 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 178 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) + (net 110 /flash/FPGA_PROGRAMN) (solder_mask_margin 0.04)) (pad W4 smd circle (at -5.2 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad W5 smd circle (at -4.4 6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4056,7 +4066,7 @@ (pad Y2 smd circle (at -6.8 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (solder_mask_margin 0.04)) (pad Y3 smd circle (at -6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) - (net 179 /flash/FPGA_DONE) (solder_mask_margin 0.04)) + (net 111 /flash/FPGA_DONE) (solder_mask_margin 0.04)) (pad Y5 smd circle (at -4.4 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.04)) (pad Y6 smd circle (at -3.6 7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) @@ -4125,41 +4135,41 @@ (pad 0 thru_hole oval (at -7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) (net 1 GND)) (pad 1 smd rect (at -4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 120 GPDI_ETH_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 138 GPDI_ETH-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 2 smd rect (at -4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 121 GPDI_ETH_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 139 GPDI_ETH+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 3 smd rect (at -3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 122 GPDI_D2_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 140 GPDI_D2+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 4 smd rect (at -3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 5 smd rect (at -2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 123 GPDI_D2_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 141 GPDI_D2-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 6 smd rect (at -2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 124 GPDI_D1_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 142 GPDI_D1+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 7 smd rect (at -1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 8 smd rect (at -1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 125 GPDI_D1_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 143 GPDI_D1-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 9 smd rect (at -0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 126 GPDI_D0_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 144 GPDI_D0+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 10 smd rect (at 0 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 11 smd rect (at 0.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 127 GPDI_D0_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 145 GPDI_D0-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 12 smd rect (at 1 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 128 GPDI_CLK_P) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 146 GPDI_CLK+) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 13 smd rect (at 1.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 14 smd rect (at 2 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 129 GPDI_CLK_N) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 147 GPDI_CLK-) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 15 smd rect (at 2.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 130 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 62 GPDI_CEC) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 16 smd rect (at 3 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 1 GND) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 17 smd rect (at 3.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 43 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 41 GPDI_5V_SCL) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 18 smd rect (at 4 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) - (net 44 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) + (net 42 GPDI_5V_SDA) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 19 smd rect (at 4.5 5.55 90) (size 1.6 0.25) (layers F.Cu F.Paste F.Mask) (net 2 +5V) (solder_mask_margin 0.05) (solder_paste_margin -0.01)) (pad 0 thru_hole oval (at 7.3 -1.45) (size 1.3 2.3) (drill oval 0.8 1.8) (layers *.Cu *.Mask F.SilkS) @@ -4195,19 +4205,19 @@ (fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer B.SilkS) (width 0.15)) (fp_line (start -2.075 2.525) (end -3.475 2.525) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 177 /flash/FLASH_nCS)) + (net 109 /flash/FLASH_nCS)) (pad 2 smd rect (at -2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 175 /flash/FLASH_MISO)) + (net 107 /flash/FLASH_MISO)) (pad 3 smd rect (at -2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 172 /flash/FLASH_nWP)) + (net 104 /flash/FLASH_nWP)) (pad 4 smd rect (at -2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 5 smd rect (at 2.7 -1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 174 /flash/FLASH_MOSI)) + (net 106 /flash/FLASH_MOSI)) (pad 6 smd rect (at 2.7 -0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 176 /flash/FLASH_SCK)) + (net 108 /flash/FLASH_SCK)) (pad 7 smd rect (at 2.7 0.635) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 173 /flash/FLASH_nHOLD)) + (net 105 /flash/FLASH_nHOLD)) (pad 8 smd rect (at 2.7 1.905) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl @@ -4283,17 +4293,17 @@ (pad 2 smd rect (at -2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 3 smd rect (at -2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_SCL)) + (net 44 GPDI_SCL)) (pad 4 smd rect (at -2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 45 GPDI_SDA)) + (net 43 GPDI_SDA)) (pad 5 smd rect (at 2.7 -1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_5V_SDA)) + (net 42 GPDI_5V_SDA)) (pad 6 smd rect (at 2.7 -0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_5V_SCL)) + (net 41 GPDI_5V_SCL)) (pad 7 smd rect (at 2.7 0.635 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (pad 8 smd rect (at 2.7 1.905 90) (size 1.55 0.6) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (model Housings_SOIC.3dshapes/SOIC-8_3.9x4.9mm_Pitch1.27mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -4394,9 +4404,9 @@ (pad 37 smd oval (at 8.947434 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 36 smd oval (at 8.947434 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 35 smd oval (at 8.947434 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 201 WIFI_TXD)) + (net 133 WIFI_TXD)) (pad 34 smd oval (at 8.947434 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 198 WIFI_RXD)) + (net 130 WIFI_RXD)) (pad 33 smd oval (at 8.947434 3.167338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 26 JTAG_TMS)) (pad 32 smd oval (at 8.947434 1.897338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4410,19 +4420,19 @@ (pad 27 smd oval (at 8.947434 -4.452662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 26 smd oval (at 8.947434 -5.722662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 25 smd oval (at 8.947434 -6.992662 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 199 WIFI_GPIO0)) + (net 131 WIFI_GPIO0)) (pad 24 smd oval (at 5.662434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 195 WIFI_GPIO2)) + (net 127 WIFI_GPIO2)) (pad 23 smd oval (at 4.392434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 204 WIFI_GPIO15)) + (net 136 WIFI_GPIO15)) (pad 22 smd oval (at 3.122434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 52 SD_D1)) + (net 50 SD_D1)) (pad 21 smd oval (at 1.852434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 51 SD_D0)) + (net 49 SD_D0)) (pad 20 smd oval (at 0.582434 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 50 SD_CLK)) + (net 48 SD_CLK)) (pad 19 smd oval (at -0.687566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) - (net 49 SD_CMD)) + (net 47 SD_CMD)) (pad 18 smd oval (at -1.957566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask) (net 23 SD_3)) (pad 17 smd oval (at -3.227566 -8.482662 180) (size 0.9 2.5) (layers B.Cu B.Paste B.Mask)) @@ -4440,7 +4450,7 @@ (pad 5 smd oval (at -9.052566 4.437338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 4 smd oval (at -9.052566 5.707338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask)) (pad 3 smd oval (at -9.052566 6.977338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (pad 2 smd oval (at -9.052566 8.247338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 1 smd oval (at -9.052566 9.517338 180) (size 2.5 0.9) (layers B.Cu B.Paste B.Mask) @@ -4555,33 +4565,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 54 /gpio/B11)) + (net 148 /gpio/B11+)) (pad 6 thru_hole oval (at 5.08 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 55 /gpio/C11)) + (net 149 /gpio/B11-)) (pad 7 thru_hole oval (at 7.62 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 56 /gpio/A10)) + (net 150 /gpio/A10+)) (pad 8 thru_hole oval (at 7.62 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 57 /gpio/A11)) + (net 151 /gpio/A10-)) (pad 9 thru_hole oval (at 10.16 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 58 /gpio/B10)) + (net 152 /gpio/B10+)) (pad 10 thru_hole oval (at 10.16 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 59 /gpio/A9)) + (net 153 /gpio/B10-)) (pad 11 thru_hole oval (at 12.7 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 60 /gpio/C10)) + (net 154 /gpio/B9+)) (pad 12 thru_hole oval (at 12.7 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 61 /gpio/B9)) + (net 155 /gpio/B9-)) (pad 13 thru_hole oval (at 15.24 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 62 /gpio/E9)) + (net 156 /gpio/D9+)) (pad 14 thru_hole oval (at 15.24 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 63 /gpio/D9)) + (net 157 /gpio/D9-)) (pad 15 thru_hole oval (at 17.78 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 64 /gpio/A8)) + (net 158 /gpio/A7+)) (pad 16 thru_hole oval (at 17.78 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 65 /gpio/A7)) + (net 159 /gpio/A7-)) (pad 17 thru_hole oval (at 20.32 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 66 /gpio/B8)) + (net 160 /gpio/C8+)) (pad 18 thru_hole oval (at 20.32 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 67 /gpio/C8)) + (net 161 /gpio/C8-)) (pad 19 thru_hole oval (at 22.86 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4591,33 +4601,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 68 /gpio/D8)) + (net 162 /gpio/E8+)) (pad 24 thru_hole oval (at 27.94 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 69 /gpio/E8)) + (net 163 /gpio/E8-)) (pad 25 thru_hole oval (at 30.48 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 70 /gpio/C7)) + (net 164 /gpio/C6+)) (pad 26 thru_hole oval (at 30.48 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 71 /gpio/C6)) + (net 165 /gpio/C6-)) (pad 27 thru_hole oval (at 33.02 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 72 /gpio/D7)) + (net 166 /gpio/E7+)) (pad 28 thru_hole oval (at 33.02 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 73 /gpio/E7)) + (net 167 /gpio/E7-)) (pad 29 thru_hole oval (at 35.56 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 74 /gpio/D6)) + (net 168 /gpio/E6+)) (pad 30 thru_hole oval (at 35.56 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 75 /gpio/E6)) + (net 169 /gpio/E6-)) (pad 31 thru_hole oval (at 38.1 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 76 /gpio/B6)) + (net 170 /gpio/A6+)) (pad 32 thru_hole oval (at 38.1 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 77 /gpio/A6)) + (net 171 /gpio/A6-)) (pad 33 thru_hole oval (at 40.64 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 78 /gpio/A19)) + (net 172 /gpio/A19+)) (pad 34 thru_hole oval (at 40.64 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 79 /gpio/B20)) + (net 173 /gpio/A19-)) (pad 35 thru_hole oval (at 43.18 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 80 /gpio/A18)) + (net 174 /gpio/A18+)) (pad 36 thru_hole oval (at 43.18 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 81 /gpio/B19)) + (net 175 /gpio/A18-)) (pad 37 thru_hole oval (at 45.72 0 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4740,33 +4750,33 @@ (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 5 thru_hole oval (at 5.08 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 82 /gpio/A17)) + (net 176 /gpio/A17+)) (pad 6 thru_hole oval (at 5.08 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 83 /gpio/B18)) + (net 177 /gpio/A17-)) (pad 7 thru_hole oval (at 7.62 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 84 /gpio/B17)) + (net 178 /gpio/B17+)) (pad 8 thru_hole oval (at 7.62 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 85 /gpio/C17)) + (net 179 /gpio/B17-)) (pad 9 thru_hole oval (at 10.16 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 86 /gpio/C16)) + (net 180 /gpio/C16+)) (pad 10 thru_hole oval (at 10.16 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 87 /gpio/D16)) + (net 181 /gpio/C16-)) (pad 11 thru_hole oval (at 12.7 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 88 /gpio/A16)) + (net 182 /gpio/A16+)) (pad 12 thru_hole oval (at 12.7 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 89 /gpio/B16)) + (net 183 /gpio/A16-)) (pad 13 thru_hole oval (at 15.24 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 90 /gpio/D15)) + (net 184 /gpio/D15+)) (pad 14 thru_hole oval (at 15.24 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 91 /gpio/E15)) + (net 185 /gpio/D15-)) (pad 15 thru_hole oval (at 17.78 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 92 /gpio/B15)) + (net 186 /gpio/B15+)) (pad 16 thru_hole oval (at 17.78 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 93 /gpio/C15)) + (net 187 /gpio/B15-)) (pad 17 thru_hole oval (at 20.32 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 94 /gpio/D14)) + (net 188 /gpio/D14+)) (pad 18 thru_hole oval (at 20.32 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 95 /gpio/E14)) + (net 189 /gpio/D14-)) (pad 19 thru_hole oval (at 22.86 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) (pad 20 thru_hole oval (at 22.86 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4776,33 +4786,33 @@ (pad 22 thru_hole oval (at 25.4 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 23 thru_hole oval (at 27.94 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 96 /gpio/A14)) + (net 190 /gpio/A14+)) (pad 24 thru_hole oval (at 27.94 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 97 /gpio/C14)) + (net 191 /gpio/A14-)) (pad 25 thru_hole oval (at 30.48 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 98 /gpio/D13)) + (net 192 /gpio/D13+)) (pad 26 thru_hole oval (at 30.48 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 99 /gpio/E13)) + (net 193 /gpio/D13-)) (pad 27 thru_hole oval (at 33.02 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 100 /gpio/B13)) + (net 194 /gpio/B13+)) (pad 28 thru_hole oval (at 33.02 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 101 /gpio/C13)) + (net 195 /gpio/B13-)) (pad 29 thru_hole oval (at 35.56 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 102 /gpio/A12)) + (net 196 /gpio/A12+)) (pad 30 thru_hole oval (at 35.56 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 103 /gpio/A13)) + (net 197 /gpio/A12-)) (pad 31 thru_hole oval (at 38.1 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 104 /gpio/D12)) + (net 198 /gpio/D12+)) (pad 32 thru_hole oval (at 38.1 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 105 /gpio/E12)) + (net 199 /gpio/D12-)) (pad 33 thru_hole oval (at 40.64 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 106 /gpio/B12)) + (net 200 /gpio/B12+)) (pad 34 thru_hole oval (at 40.64 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 107 /gpio/C12)) + (net 201 /gpio/B12-)) (pad 35 thru_hole oval (at 43.18 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 108 /gpio/D11)) + (net 202 /gpio/D11+)) (pad 36 thru_hole oval (at 43.18 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 109 /gpio/E11)) + (net 203 /gpio/D11-)) (pad 37 thru_hole oval (at 45.72 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (pad 38 thru_hole oval (at 45.72 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) @@ -4951,15 +4961,16 @@ (net 1 GND)) (pad 2 thru_hole oval (at -5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) (net 5 +3V3)) - (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask)) + (pad 3 thru_hole oval (at -2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) + (net 204 OLED_CLK)) (pad 4 thru_hole oval (at 0 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 181 OLED_MOSI)) + (net 113 OLED_MOSI)) (pad 5 thru_hole oval (at 2.54 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 182 OLED_RES)) + (net 114 OLED_RES)) (pad 6 thru_hole oval (at 5.08 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 183 OLED_DC)) + (net 115 OLED_DC)) (pad 7 thru_hole oval (at 7.62 0 180) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask) - (net 184 OLED_CS)) + (net 116 OLED_CS)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_1x07.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5001,9 +5012,9 @@ (fp_line (start 2.7 -1) (end 2.7 1) (layer F.SilkS) (width 0.15)) (fp_line (start 1.45 -2.7) (end 1.9 -2.25) (layer F.SilkS) (width 0.15)) (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask) @@ -5039,7 +5050,7 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) (net 28 /power/WAKEUPn)) ) @@ -5073,9 +5084,9 @@ (fp_line (start -1.1 -0.7) (end 0.7 -0.7) (layer B.SilkS) (width 0.15)) (fp_line (start -1.1 0.7) (end 0.7 0.7) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (pad 2 smd rect (at 1.05 0 270) (size 0.8 0.9) (layers B.Cu B.Paste B.Mask) - (net 119 BTN_PWRn)) + (net 61 BTN_PWRn)) ) (module Resistors_SMD:R_0603_HandSoldering (layer B.Cu) (tedit 58307AEF) (tstamp 58E794DF) @@ -5103,7 +5114,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 110 "Net-(BTN0-Pad1)")) + (net 52 "Net-(BTN0-Pad1)")) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5136,7 +5147,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 45 GPDI_SDA)) + (net 43 GPDI_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5169,7 +5180,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 46 GPDI_SCL)) + (net 44 GPDI_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5202,7 +5213,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 47 /gpdi/VREF2)) + (net 45 /gpdi/VREF2)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5235,7 +5246,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 43 GPDI_5V_SCL)) + (net 41 GPDI_5V_SCL)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5268,7 +5279,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 44 GPDI_5V_SDA)) + (net 42 GPDI_5V_SDA)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5303,32 +5314,33 @@ (fp_line (start -3.4 3.45) (end 2.325 3.45) (layer B.SilkS) (width 0.15)) (fp_line (start -2.325 -3.375) (end 2.325 -3.375) (layer B.SilkS) (width 0.15)) (pad 1 smd rect (at -2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 133 FTDI_nDTR)) + (net 65 FTDI_nDTR)) (pad 2 smd rect (at -2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 194 FTDI_nRTS)) + (net 126 FTDI_nRTS)) (pad 3 smd rect (at -2.9 1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (pad 4 smd rect (at -2.9 0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 197 FTDI_RXD)) + (net 129 FTDI_RXD)) (pad 5 smd rect (at -2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 202 FTDI_nRI)) + (net 134 FTDI_nRI)) (pad 6 smd rect (at -2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) - (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask)) + (pad 7 smd rect (at -2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) + (net 205 FTDI_nDSR)) (pad 8 smd rect (at -2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 203 FTDI_nDCD)) + (net 135 FTDI_nDCD)) (pad 9 smd rect (at -2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 200 FTDI_nCTS)) + (net 132 FTDI_nCTS)) (pad 10 smd rect (at -2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 27 JTAG_TDO)) (pad 11 smd rect (at 2.9 -2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 38 USB_FTDI_DP)) + (net 208 USB_FTDI_D+)) (pad 12 smd rect (at 2.9 -2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 37 USB_FTDI_DM)) + (net 209 USB_FTDI_D-)) (pad 13 smd rect (at 2.9 -1.625 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 132 /usb/FT3V3)) + (net 64 /usb/FT3V3)) (pad 14 smd rect (at 2.9 -0.975 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 131 nRESET)) + (net 63 nRESET)) (pad 15 smd rect (at 2.9 -0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 2 +5V)) (pad 16 smd rect (at 2.9 0.325 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) @@ -5340,7 +5352,7 @@ (pad 19 smd rect (at 2.9 2.275 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) (net 26 JTAG_TMS)) (pad 20 smd rect (at 2.9 2.925 90) (size 1 0.4) (layers B.Cu B.Paste B.Mask) - (net 196 FTDI_TXD)) + (net 128 FTDI_TXD)) (model Housings_SSOP.3dshapes/SSOP-20_4.4x6.5mm_Pitch0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5373,7 +5385,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 172 /flash/FLASH_nWP)) + (net 104 /flash/FLASH_nWP)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5406,7 +5418,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 173 /flash/FLASH_nHOLD)) + (net 105 /flash/FLASH_nHOLD)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5439,7 +5451,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 174 /flash/FLASH_MOSI)) + (net 106 /flash/FLASH_MOSI)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5472,7 +5484,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 175 /flash/FLASH_MISO)) + (net 107 /flash/FLASH_MISO)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5505,7 +5517,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 176 /flash/FLASH_SCK)) + (net 108 /flash/FLASH_SCK)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5538,7 +5550,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 177 /flash/FLASH_nCS)) + (net 109 /flash/FLASH_nCS)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5571,7 +5583,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 178 /flash/FPGA_PROGRAMN)) + (net 110 /flash/FPGA_PROGRAMN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5604,7 +5616,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 179 /flash/FPGA_DONE)) + (net 111 /flash/FPGA_DONE)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5637,7 +5649,7 @@ (pad 1 smd rect (at -1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 90) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 180 /flash/FPGA_INITN)) + (net 112 /flash/FPGA_INITN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5670,7 +5682,7 @@ (pad 1 smd rect (at -1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) (pad 2 smd rect (at 1.1 0 180) (size 1.2 0.9) (layers B.Cu B.Paste B.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -5750,7 +5762,7 @@ (pad 2 smd rect (at 3.15 -1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 1 GND)) (pad 3 smd rect (at 3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) - (net 205 /gpdi/CLK_25MHz)) + (net 137 /gpdi/CLK_25MHz)) (pad 4 smd rect (at -3.15 1.25 270) (size 2.2 1.4) (layers B.Cu B.Paste B.Mask) (net 5 +3V3)) ) @@ -5778,7 +5790,7 @@ (fp_line (start -1.27 1.27) (end -1.27 3.81) (layer F.SilkS) (width 0.15)) (fp_line (start -1.27 3.81) (end 1.27 3.81) (layer F.SilkS) (width 0.15)) (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) - (net 193 WIFI_EN)) + (net 125 WIFI_EN)) (pad 2 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask) (net 1 GND)) (model Socket_Strips.3dshapes/Socket_Strip_Straight_2x01.wrl