readme update

6 years ago · 78e4a8ddbb
parent 148611c2d7
commit 78e4a8ddbb
1 changed files with 1 additions and 1 deletions
--- a/README.md
+++ b/README.md
@ -155,4 +155,4 @@ Test the prototype.
    [ ] route 16-channel ADC
    [x] move 8 LEDs a bit down and right
    [x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins 
-    [ ] additional 2 differential lines for US2
+    [x] additional 2 differential lines for US2