diff --git a/gpio.bak b/gpio.bak index f6538aa..0b988e4 100644 --- a/gpio.bak +++ b/gpio.bak @@ -734,4 +734,8 @@ Text Notes 8350 5100 0 60 ~ 0 26 Text Notes 8350 5200 0 60 ~ 0 27 +Text GLabel 4200 2200 0 60 Input ~ 0 +USB_FPGA_PULL_D+ +Text GLabel 5700 2200 2 60 Input ~ 0 +USB_FPGA_PULL_D- $EndSCHEMATC diff --git a/gpio.sch b/gpio.sch index f6538aa..fde065f 100644 --- a/gpio.sch +++ b/gpio.sch @@ -734,4 +734,12 @@ Text Notes 8350 5100 0 60 ~ 0 26 Text Notes 8350 5200 0 60 ~ 0 27 +Text GLabel 4200 2200 0 60 Input ~ 0 +USB_FPGA_PULL_D+ +Text GLabel 5700 2200 2 60 Input ~ 0 +USB_FPGA_PULL_D- +Text Notes 2800 2250 0 60 ~ 0 +NC v1.7 +Text Notes 6750 2250 0 60 ~ 0 +NC v1.7 $EndSCHEMATC diff --git a/ulx3s.bak b/ulx3s.bak index 9efd198..668a254 100644 --- a/ulx3s.bak +++ b/ulx3s.bak @@ -49,7 +49,7 @@ encoding utf-8 Sheet 1 11 Title "ULX3S" Date "" -Rev "1.7.9" +Rev "1.7.10" Comp "FER+RIZ+RADIONA" Comment1 "Root sheet" Comment2 "" diff --git a/usb.bak b/usb.bak index 051c1da..0566a4a 100644 --- a/usb.bak +++ b/usb.bak @@ -750,4 +750,40 @@ Text Notes 7500 1400 0 60 ~ 0 SD_D2 v1.7 Text Notes 10600 1900 0 60 ~ 0 SD_CLK v1.7 +Text GLabel 1700 4250 0 60 Input ~ 0 +USB_FPGA_PULL_D+ +Text GLabel 1700 4400 0 60 Input ~ 0 +USB_FPGA_PULL_D- +$Comp +L R R63 +U 1 1 5A71E38F +P 1850 4250 +F 0 "R63" V 1930 4250 50 0000 C CNN +F 1 "15k" V 1850 4250 50 0000 C CNN +F 2 "Resistors_SMD:R_0603" V 1780 4250 50 0001 C CNN +F 3 "" H 1850 4250 50 0000 C CNN + 1 1850 4250 + 0 -1 -1 0 +$EndComp +$Comp +L R R64 +U 1 1 5A71E566 +P 1850 4400 +F 0 "R64" V 1930 4400 50 0000 C CNN +F 1 "15k" V 1850 4400 50 0000 C CNN +F 2 "Resistors_SMD:R_0603" V 1780 4400 50 0001 C CNN +F 3 "" H 1850 4400 50 0000 C CNN + 1 1850 4400 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 2000 4250 2350 4250 +Wire Wire Line + 2000 4400 2350 4400 +Text Label 2050 4400 0 60 ~ 0 +FPD- +Text Label 2050 4250 0 60 ~ 0 +FPD+ +Text Notes 750 4100 0 60 ~ 0 +USB pull lines connected to\nBANK0 on "gpio" sheet $EndSCHEMATC diff --git a/usb.sch b/usb.sch index 051c1da..0566a4a 100644 --- a/usb.sch +++ b/usb.sch @@ -750,4 +750,40 @@ Text Notes 7500 1400 0 60 ~ 0 SD_D2 v1.7 Text Notes 10600 1900 0 60 ~ 0 SD_CLK v1.7 +Text GLabel 1700 4250 0 60 Input ~ 0 +USB_FPGA_PULL_D+ +Text GLabel 1700 4400 0 60 Input ~ 0 +USB_FPGA_PULL_D- +$Comp +L R R63 +U 1 1 5A71E38F +P 1850 4250 +F 0 "R63" V 1930 4250 50 0000 C CNN +F 1 "15k" V 1850 4250 50 0000 C CNN +F 2 "Resistors_SMD:R_0603" V 1780 4250 50 0001 C CNN +F 3 "" H 1850 4250 50 0000 C CNN + 1 1850 4250 + 0 -1 -1 0 +$EndComp +$Comp +L R R64 +U 1 1 5A71E566 +P 1850 4400 +F 0 "R64" V 1930 4400 50 0000 C CNN +F 1 "15k" V 1850 4400 50 0000 C CNN +F 2 "Resistors_SMD:R_0603" V 1780 4400 50 0001 C CNN +F 3 "" H 1850 4400 50 0000 C CNN + 1 1850 4400 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 2000 4250 2350 4250 +Wire Wire Line + 2000 4400 2350 4400 +Text Label 2050 4400 0 60 ~ 0 +FPD- +Text Label 2050 4250 0 60 ~ 0 +FPD+ +Text Notes 750 4100 0 60 ~ 0 +USB pull lines connected to\nBANK0 on "gpio" sheet $EndSCHEMATC