readme update

pull/3/head
davor 7 years ago
parent 17485f15fb
commit 8726a39647

@ -66,3 +66,4 @@ section (thicker power lines, separately routed feedback)
[ ] compile a f32c bitstream using the schematics
[ ] connect more lines from ESP-32 to FPGA
[ ] connect FPGA USB D+/D- with 1.5k pullup in USB 1.1 (full speed) mode
[ ] Jumpers to switch 2.5V/3.3V for left IO banks

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