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Code Issues 19 Pull Requests Releases Wiki Activity

reorder SDRAM to FPGA connection for straightforward routing

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pull/3/head
davor 8 years ago
parent 01d1cad2ec
commit a8f1214b27
6 changed files with 881 additions and 219 deletions
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28
gpio.bak
Unescape View File

@ -206,23 +206,23 @@ $EndComp
$Comp
L GND #PWR012
U 1 1 58E6D59D
P 2400 1850
F 0 "#PWR012" H 2400 1600 50 0001 C CNN
F 1 "GND" H 2400 1700 50 0000 C CNN
F 2 "" H 2400 1850 60 0000 C CNN
F 3 "" H 2400 1850 60 0000 C CNN
1 2400 1850
P 2450 1850
F 0 "#PWR012" H 2450 1600 50 0001 C CNN
F 1 "GND" H 2450 1700 50 0000 C CNN
F 2 "" H 2450 1850 60 0000 C CNN
F 3 "" H 2450 1850 60 0000 C CNN
1 2450 1850
0 -1 1 0
$EndComp
$Comp
L +3V3 #PWR013
U 1 1 58E6D5A3
P 2550 1750
F 0 "#PWR013" H 2550 1600 50 0001 C CNN
F 1 "+3V3" H 2550 1890 50 0000 C CNN
F 2 "" H 2550 1750 50 0000 C CNN
F 3 "" H 2550 1750 50 0000 C CNN
1 2550 1750
P 2600 1750
F 0 "#PWR013" H 2600 1600 50 0001 C CNN
F 1 "+3V3" H 2600 1890 50 0000 C CNN
F 2 "" H 2600 1750 50 0000 C CNN
F 3 "" H 2600 1750 50 0000 C CNN
1 2600 1750
0 1 1 0
$EndComp
$Comp
@ -284,9 +284,9 @@ Wire Wire Line
Wire Wire Line
1300 1850 1600 1850
Wire Wire Line
2400 1850 2100 1850
2450 1850 2100 1850
Wire Wire Line
2100 1750 2550 1750
2100 1750 2600 1750
Wire Wire Line
1150 1750 1600 1750
Wire Wire Line

90
ram.bak
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@ -236,69 +236,69 @@ F 3 "" H 8250 4100 60 0000 C CNN
3 9300 3150
1 0 0 -1
$EndComp
Text GLabel 10050 2450 2 60 Input ~ 0
Text GLabel 10050 5750 2 60 Input ~ 0
SDRAM_D0
Text GLabel 10050 2550 2 60 Input ~ 0
Text GLabel 8550 5750 0 60 Input ~ 0
SDRAM_D1
Text GLabel 10050 2650 2 60 Input ~ 0
SDRAM_D2
Text GLabel 10050 2750 2 60 Input ~ 0
Text GLabel 8550 2650 0 60 Input ~ 0
SDRAM_D3
Text GLabel 10050 2850 2 60 Input ~ 0
Text GLabel 8550 3950 0 60 Input ~ 0
SDRAM_D4
Text GLabel 10050 2950 2 60 Input ~ 0
Text GLabel 10050 3550 2 60 Input ~ 0
SDRAM_D5
Text GLabel 10050 3050 2 60 Input ~ 0
Text GLabel 8550 5550 0 60 Input ~ 0
SDRAM_D6
Text GLabel 10050 3150 2 60 Input ~ 0
SDRAM_D7
Text GLabel 10050 5150 2 60 Input ~ 0
SDRAM_D7
Text GLabel 8550 2750 0 60 Input ~ 0
SDRAM_D8
Text GLabel 10050 4750 2 60 Input ~ 0
Text GLabel 8550 2850 0 60 Input ~ 0
SDRAM_D9
Text GLabel 10050 4850 2 60 Input ~ 0
Text GLabel 10050 2950 2 60 Input ~ 0
SDRAM_D10
Text GLabel 10050 3550 2 60 Input ~ 0
Text GLabel 8550 2950 0 60 Input ~ 0
SDRAM_D11
Text GLabel 10050 3650 2 60 Input ~ 0
Text GLabel 10050 3050 2 60 Input ~ 0
SDRAM_D12
Text GLabel 10050 5050 2 60 Input ~ 0
Text GLabel 8550 3050 0 60 Input ~ 0
SDRAM_D13
Text GLabel 10050 4950 2 60 Input ~ 0
Text GLabel 10050 3150 2 60 Input ~ 0
SDRAM_D14
Text GLabel 10050 5650 2 60 Input ~ 0
Text GLabel 8550 3150 0 60 Input ~ 0
SDRAM_D15
Text GLabel 8550 2450 0 60 Input ~ 0
Text GLabel 8550 5050 0 60 Input ~ 0
SDRAM_A0
Text GLabel 8550 2550 0 60 Input ~ 0
Text GLabel 8550 5150 0 60 Input ~ 0
SDRAM_A1
Text GLabel 8550 2650 0 60 Input ~ 0
Text GLabel 10050 5250 2 60 Input ~ 0
SDRAM_A2
Text GLabel 8550 2750 0 60 Input ~ 0
Text GLabel 8550 5250 0 60 Input ~ 0
SDRAM_A3
Text GLabel 8550 2850 0 60 Input ~ 0
Text GLabel 10050 6050 2 60 Input ~ 0
SDRAM_A4
Text GLabel 8550 2950 0 60 Input ~ 0
Text GLabel 10050 5950 2 60 Input ~ 0
SDRAM_A5
Text GLabel 8550 3050 0 60 Input ~ 0
Text GLabel 8550 6050 0 60 Input ~ 0
SDRAM_A6
Text GLabel 8550 3150 0 60 Input ~ 0
Text GLabel 8550 5950 0 60 Input ~ 0
SDRAM_A7
Text GLabel 8550 5850 0 60 Input ~ 0
Text GLabel 10050 2450 2 60 Input ~ 0
SDRAM_A8
Text GLabel 8550 3350 0 60 Input ~ 0
Text GLabel 10050 2550 2 60 Input ~ 0
SDRAM_A9
Text GLabel 8550 5150 0 60 Input ~ 0
Text GLabel 10050 5050 2 60 Input ~ 0
SDRAM_A10
Text GLabel 8550 4650 0 60 Input ~ 0
Text GLabel 8550 2450 0 60 Input ~ 0
SDRAM_A11
Text GLabel 8550 3650 0 60 Input ~ 0
Text GLabel 8550 4950 0 60 Input ~ 0
SDRAM_BA0
Text GLabel 8550 3750 0 60 Input ~ 0
Text GLabel 8550 4850 0 60 Input ~ 0
SDRAM_BA1
Text GLabel 8550 5050 0 60 Input ~ 0
Text GLabel 10050 2750 2 60 Input ~ 0
SDRAM_CLK
Text GLabel 8550 3950 0 60 Input ~ 0
Text GLabel 8550 2550 0 60 Input ~ 0
SDRAM_CKE
$Comp
L LFE5U-25F-6BG381C U1
@ -311,32 +311,32 @@ F 3 "" H 8250 6200 60 0000 C CNN
4 9300 5250
1 0 0 -1
$EndComp
Text GLabel 10050 5850 2 60 Input ~ 0
Text GLabel 10050 4850 2 60 Input ~ 0
SDRAM_DQM0
Text GLabel 10050 5950 2 60 Input ~ 0
Text GLabel 10050 2850 2 60 Input ~ 0
SDRAM_DQM1
Text GLabel 8550 5950 0 60 Input ~ 0
Text GLabel 10050 4950 2 60 Input ~ 0
SDRAM_nRAS
Text GLabel 8550 4750 0 60 Input ~ 0
Text GLabel 8550 4650 0 60 Input ~ 0
SDRAM_nCAS
Text GLabel 8550 4850 0 60 Input ~ 0
Text GLabel 10050 4750 2 60 Input ~ 0
SDRAM_nWE
Text GLabel 8550 4950 0 60 Input ~ 0
Text GLabel 8550 4750 0 60 Input ~ 0
SDRAM_nCS
Text GLabel 8550 5350 0 60 Input ~ 0
SD_CMD
Text GLabel 8550 5450 0 60 Input ~ 0
SD_CMD
Text GLabel 8550 5850 0 60 Input ~ 0
SD_D0
Text GLabel 8550 5250 0 60 Input ~ 0
Text GLabel 8550 5350 0 60 Input ~ 0
SD_CLK
Text GLabel 8550 5550 0 60 Input ~ 0
Text GLabel 8550 5650 0 60 Input ~ 0
SD_D3
Text GLabel 10050 5250 2 60 Input ~ 0
SD_D1
Text GLabel 10050 5350 2 60 Input ~ 0
SD_D2
SD_D1
Text GLabel 10050 5450 2 60 Input ~ 0
SD_WP
SD_D2
Text GLabel 10050 5550 2 60 Input ~ 0
SD_WP
Text GLabel 10050 5650 2 60 Input ~ 0
SD_CD
$EndSCHEMATC

90
ram.sch
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@ -236,69 +236,69 @@ F 3 "" H 8250 4100 60 0000 C CNN
3 9300 3150
1 0 0 -1
$EndComp
Text GLabel 10050 2450 2 60 Input ~ 0
Text GLabel 10050 5750 2 60 Input ~ 0
SDRAM_D0
Text GLabel 10050 2550 2 60 Input ~ 0
Text GLabel 8550 5750 0 60 Input ~ 0
SDRAM_D1
Text GLabel 10050 2650 2 60 Input ~ 0
SDRAM_D2
Text GLabel 10050 2750 2 60 Input ~ 0
Text GLabel 8550 2650 0 60 Input ~ 0
SDRAM_D3
Text GLabel 10050 2850 2 60 Input ~ 0
Text GLabel 8550 3350 0 60 Input ~ 0
SDRAM_D4
Text GLabel 10050 2950 2 60 Input ~ 0
Text GLabel 10050 3550 2 60 Input ~ 0
SDRAM_D5
Text GLabel 10050 3050 2 60 Input ~ 0
Text GLabel 8550 5550 0 60 Input ~ 0
SDRAM_D6
Text GLabel 10050 3150 2 60 Input ~ 0
SDRAM_D7
Text GLabel 10050 5150 2 60 Input ~ 0
SDRAM_D7
Text GLabel 8550 2750 0 60 Input ~ 0
SDRAM_D8
Text GLabel 10050 4750 2 60 Input ~ 0
Text GLabel 8550 2850 0 60 Input ~ 0
SDRAM_D9
Text GLabel 10050 4850 2 60 Input ~ 0
Text GLabel 10050 2950 2 60 Input ~ 0
SDRAM_D10
Text GLabel 10050 3550 2 60 Input ~ 0
Text GLabel 8550 2950 0 60 Input ~ 0
SDRAM_D11
Text GLabel 10050 3650 2 60 Input ~ 0
Text GLabel 10050 3050 2 60 Input ~ 0
SDRAM_D12
Text GLabel 10050 5050 2 60 Input ~ 0
Text GLabel 8550 3050 0 60 Input ~ 0
SDRAM_D13
Text GLabel 10050 4950 2 60 Input ~ 0
Text GLabel 10050 3150 2 60 Input ~ 0
SDRAM_D14
Text GLabel 10050 5650 2 60 Input ~ 0
Text GLabel 8550 3150 0 60 Input ~ 0
SDRAM_D15
Text GLabel 8550 2450 0 60 Input ~ 0
Text GLabel 8550 5050 0 60 Input ~ 0
SDRAM_A0
Text GLabel 8550 2550 0 60 Input ~ 0
Text GLabel 8550 5150 0 60 Input ~ 0
SDRAM_A1
Text GLabel 8550 2650 0 60 Input ~ 0
Text GLabel 10050 5250 2 60 Input ~ 0
SDRAM_A2
Text GLabel 8550 2750 0 60 Input ~ 0
Text GLabel 8550 5250 0 60 Input ~ 0
SDRAM_A3
Text GLabel 8550 2850 0 60 Input ~ 0
Text GLabel 10050 6050 2 60 Input ~ 0
SDRAM_A4
Text GLabel 8550 2950 0 60 Input ~ 0
Text GLabel 10050 5950 2 60 Input ~ 0
SDRAM_A5
Text GLabel 8550 3050 0 60 Input ~ 0
Text GLabel 8550 6050 0 60 Input ~ 0
SDRAM_A6
Text GLabel 8550 3150 0 60 Input ~ 0
Text GLabel 8550 5950 0 60 Input ~ 0
SDRAM_A7
Text GLabel 8550 5850 0 60 Input ~ 0
Text GLabel 10050 2450 2 60 Input ~ 0
SDRAM_A8
Text GLabel 8550 3350 0 60 Input ~ 0
Text GLabel 10050 2550 2 60 Input ~ 0
SDRAM_A9
Text GLabel 8550 5150 0 60 Input ~ 0
Text GLabel 10050 5050 2 60 Input ~ 0
SDRAM_A10
Text GLabel 8550 4650 0 60 Input ~ 0
Text GLabel 8550 2450 0 60 Input ~ 0
SDRAM_A11
Text GLabel 8550 3650 0 60 Input ~ 0
Text GLabel 8550 4950 0 60 Input ~ 0
SDRAM_BA0
Text GLabel 8550 3750 0 60 Input ~ 0
Text GLabel 8550 4850 0 60 Input ~ 0
SDRAM_BA1
Text GLabel 8550 5050 0 60 Input ~ 0
Text GLabel 10050 2750 2 60 Input ~ 0
SDRAM_CLK
Text GLabel 8550 3950 0 60 Input ~ 0
Text GLabel 8550 2550 0 60 Input ~ 0
SDRAM_CKE
$Comp
L LFE5U-25F-6BG381C U1
@ -311,32 +311,32 @@ F 3 "" H 8250 6200 60 0000 C CNN
4 9300 5250
1 0 0 -1
$EndComp
Text GLabel 10050 5850 2 60 Input ~ 0
Text GLabel 10050 4850 2 60 Input ~ 0
SDRAM_DQM0
Text GLabel 10050 5950 2 60 Input ~ 0
Text GLabel 10050 2850 2 60 Input ~ 0
SDRAM_DQM1
Text GLabel 8550 5950 0 60 Input ~ 0
Text GLabel 10050 4950 2 60 Input ~ 0
SDRAM_nRAS
Text GLabel 8550 4750 0 60 Input ~ 0
Text GLabel 8550 4650 0 60 Input ~ 0
SDRAM_nCAS
Text GLabel 8550 4850 0 60 Input ~ 0
Text GLabel 10050 4750 2 60 Input ~ 0
SDRAM_nWE
Text GLabel 8550 4950 0 60 Input ~ 0
Text GLabel 8550 4750 0 60 Input ~ 0
SDRAM_nCS
Text GLabel 8550 5350 0 60 Input ~ 0
SD_CMD
Text GLabel 8550 5450 0 60 Input ~ 0
SD_CMD
Text GLabel 8550 5850 0 60 Input ~ 0
SD_D0
Text GLabel 8550 5250 0 60 Input ~ 0
Text GLabel 8550 5350 0 60 Input ~ 0
SD_CLK
Text GLabel 8550 5550 0 60 Input ~ 0
Text GLabel 8550 5650 0 60 Input ~ 0
SD_D3
Text GLabel 10050 5250 2 60 Input ~ 0
SD_D1
Text GLabel 10050 5350 2 60 Input ~ 0
SD_D2
SD_D1
Text GLabel 10050 5450 2 60 Input ~ 0
SD_WP
SD_D2
Text GLabel 10050 5550 2 60 Input ~ 0
SD_WP
Text GLabel 10050 5650 2 60 Input ~ 0
SD_CD
$EndSCHEMATC

42
ulx3s-cache.lib
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@ -1107,34 +1107,36 @@ X GR_PCLK2_1 G19 -750 400 200 R 50 50 3 1 I
X PCLKT2_1 J19 -750 600 200 R 50 50 3 1 I
X PCLKC2_1 K19 750 600 200 L 50 50 3 1 I
S -550 800 550 -900 4 1 0 N
X PCLKT3_1 L20 -750 -700 200 R 50 50 4 1 I
X PCLKC3_1 M20 750 -700 200 L 50 50 4 1 I
X PR38B N20 750 100 200 L 50 50 4 1 I
X PCLKT3_1 L20 -750 -800 200 R 50 50 4 1 I
X PCLKC3_1 M20 750 -800 200 L 50 50 4 1 I
X PR38B N20 750 0 200 L 50 50 4 1 I
X PR41A P20 -750 200 200 R 50 50 4 1 I
X PR41B R20 750 200 200 L 50 50 4 1 I
X PR41C T20 -750 300 200 R 50 50 4 1 I
X PR41D U20 750 300 200 L 50 50 4 1 I
X GR_PCLK3_0 L16 -750 -500 200 R 50 50 4 1 I
X PR32A N16 -750 -300 200 R 50 50 4 1 I
X VREF1_3 P16 750 -100 200 L 50 50 4 1 I
X PR35C R16 -750 0 200 R 50 50 4 1 I
X GR_PCLK3_0 L16 -750 -600 200 R 50 50 4 1 I
X PR32A N16 -750 -400 200 R 50 50 4 1 I
X VREF1_3 P16 750 -200 200 L 50 50 4 1 I
X PR35C R16 -750 -100 200 R 50 50 4 1 I
X GPLL0T_IN U16 -750 700 200 R 50 50 4 1 I
X PR29B L17 750 -500 200 L 50 50 4 1 I
X PR32B M17 750 -300 200 L 50 50 4 1 I
X PR35A N17 -750 -100 200 R 50 50 4 1 I
X PR32D P17 750 -200 200 L 50 50 4 1 I
X PR35D R17 750 0 200 L 50 50 4 1 I
X PR29B L17 750 -600 200 L 50 50 4 1 I
X PR32B M17 750 -400 200 L 50 50 4 1 I
X PR35A N17 -750 -200 200 R 50 50 4 1 I
X PR32D P17 750 -300 200 L 50 50 4 1 I
X PR35D R17 750 -100 200 L 50 50 4 1 I
X GPLL0C_IN T17 750 700 200 L 50 50 4 1 I
X PR47B U17 750 600 200 L 50 50 4 1 I
X GR_PCLK3_1 L18 -750 -400 200 R 50 50 4 1 I
X PR29D M18 750 -400 200 L 50 50 4 1 I
X PR32C N18 -750 -200 200 R 50 50 4 1 I
X PR38D P18 750 200 200 L 50 50 4 1 I
X GR_PCLK3_1 L18 -750 -500 200 R 50 50 4 1 I
X PR29D M18 750 -500 200 L 50 50 4 1 I
X PR32C N18 -750 -300 200 R 50 50 4 1 I
X PR38D P18 750 100 200 L 50 50 4 1 I
X PR44B R18 750 400 200 L 50 50 4 1 I
X PR44D T18 750 500 200 L 50 50 4 1 I
X PR47A U18 -750 600 200 R 50 50 4 1 I
X PCLKT3_0 L19 -750 -600 200 R 50 50 4 1 I
X PCLKC3_0 M19 750 -600 200 L 50 50 4 1 I
X PR38A N19 -750 100 200 R 50 50 4 1 I
X PR38C P19 -750 200 200 R 50 50 4 1 I
X PCLKT3_0 L19 -750 -700 200 R 50 50 4 1 I
X PCLKC3_0 M19 750 -700 200 L 50 50 4 1 I
X PR38A N19 -750 0 200 R 50 50 4 1 I
X PR38C P19 -750 100 200 R 50 50 4 1 I
X PR44A T19 -750 400 200 R 50 50 4 1 I
X PR44C U19 -750 500 200 R 50 50 4 1 I
S -550 800 550 -900 5 1 0 N

424
ulx3s.kicad_pcb
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@ -2,11 +2,11 @@
(general
(links 569)
(no_connects 569)
(area 71.010001 43.48 197.572001 118.732339)
(no_connects 533)
(area 93.949999 61.269999 188.230001 112.370001)
(thickness 1.6)
(drawings 6)
(tracks 0)
(tracks 329)
(zones 0)
(modules 113)
(nets 210)
@ -2183,7 +2183,7 @@
)
(module TSOP54:TSOP54 (layer F.Cu) (tedit 55BAC4E8) (tstamp 58D85778)
(at 163.315 83.01 90)
(at 165.08 87.8 90)
(descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)")
(tags "TSOPII 0.8")
(path /58D6D507/58D8506F)
@ -3313,7 +3313,7 @@
)
(module lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm (layer F.Cu) (tedit 58D8FE92) (tstamp 58D8D57E)
(at 138.08 87.2)
(at 138.48 87.8)
(path /56AC389C/56AC4242)
(attr smd)
(fp_text reference U1 (at -7.6 -9.2) (layer F.SilkS)
@ -3438,11 +3438,11 @@
(pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 179 /gpio/B17-) (solder_mask_margin 0.04))
(pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 66 SDRAM_CKE) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 67 SDRAM_A7) (solder_mask_margin 0.04))
(net 68 SDRAM_D15) (solder_mask_margin 0.04))
(pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 58 LED5) (solder_mask_margin 0.04))
(pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3478,11 +3478,11 @@
(pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 69 SDRAM_BA1) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 70 SDRAM_D7) (solder_mask_margin 0.04))
(net 77 SDRAM_D14) (solder_mask_margin 0.04))
(pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 71 SDRAM_A6) (solder_mask_margin 0.04))
(net 73 SDRAM_D13) (solder_mask_margin 0.04))
(pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 57 LED4) (solder_mask_margin 0.04))
(pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3518,11 +3518,11 @@
(pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 74 SDRAM_BA0) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 75 SDRAM_D6) (solder_mask_margin 0.04))
(net 79 SDRAM_D12) (solder_mask_margin 0.04))
(pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 76 SDRAM_A5) (solder_mask_margin 0.04))
(net 83 SDRAM_D11) (solder_mask_margin 0.04))
(pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 130 WIFI_RXD) (solder_mask_margin 0.04))
(pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3558,11 +3558,11 @@
(pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 79 SDRAM_D12) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 80 SDRAM_D5) (solder_mask_margin 0.04))
(net 86 SDRAM_D10) (solder_mask_margin 0.04))
(pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 81 SDRAM_A4) (solder_mask_margin 0.04))
(net 87 SDRAM_D9) (solder_mask_margin 0.04))
(pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 133 WIFI_TXD) (solder_mask_margin 0.04))
(pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3598,11 +3598,11 @@
(pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 83 SDRAM_D11) (solder_mask_margin 0.04))
(net 80 SDRAM_D5) (solder_mask_margin 0.04))
(pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 84 SDRAM_A3) (solder_mask_margin 0.04))
(net 90 SDRAM_D8) (solder_mask_margin 0.04))
(pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 85 SDRAM_D4) (solder_mask_margin 0.04))
(net 101 SDRAM_DQM1) (solder_mask_margin 0.04))
(pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 65 FTDI_nDTR) (solder_mask_margin 0.04))
(pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3638,11 +3638,11 @@
(pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 88 SDRAM_A9) (solder_mask_margin 0.04))
(net 85 SDRAM_D4) (solder_mask_margin 0.04))
(pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 89 SDRAM_D3) (solder_mask_margin 0.04))
(net 72 SDRAM_CLK) (solder_mask_margin 0.04))
(pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 125 WIFI_EN) (solder_mask_margin 0.04))
(pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3678,11 +3678,11 @@
(pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
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@ -3720,9 +3720,9 @@
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@ -3754,15 +3754,15 @@
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(segment (start 152.516082 90.867276) (end 166.457276 90.867276) (width 0.19) (layer F.Cu) (net 100))
(segment (start 151.01738 92.365978) (end 152.516082 90.867276) (width 0.19) (layer F.Cu) (net 100))
(segment (start 147.391155 93) (end 148.025177 92.365978) (width 0.19) (layer F.Cu) (net 100))
(segment (start 146.08 93) (end 147.391155 93) (width 0.19) (layer F.Cu) (net 100))
(segment (start 148.025177 92.365978) (end 151.01738 92.365978) (width 0.19) (layer F.Cu) (net 100))
(segment (start 146.08 85) (end 153.142151 85) (width 0.19) (layer F.Cu) (net 101))
(segment (start 153.303229 85.161078) (end 164.918922 85.161078) (width 0.19) (layer F.Cu) (net 101))
(segment (start 153.142151 85) (end 153.303229 85.161078) (width 0.19) (layer F.Cu) (net 101))
(segment (start 164.918922 85.161078) (end 166.68 83.4) (width 0.19) (layer F.Cu) (net 101))
(segment (start 166.68 83.4) (end 166.68 82.27) (width 0.19) (layer F.Cu) (net 101))
(segment (start 152.647392 91.184287) (end 165.974287 91.184287) (width 0.19) (layer F.Cu) (net 102))
(segment (start 167.48 92.69) (end 167.48 93.33) (width 0.19) (layer F.Cu) (net 102))
(segment (start 144.88 93.4) (end 147.517456 93.4) (width 0.19) (layer F.Cu) (net 102))
(segment (start 165.974287 91.184287) (end 167.48 92.69) (width 0.19) (layer F.Cu) (net 102))
(segment (start 148.234467 92.682989) (end 151.14869 92.682989) (width 0.19) (layer F.Cu) (net 102))
(segment (start 144.48 93) (end 144.88 93.4) (width 0.19) (layer F.Cu) (net 102))
(segment (start 147.517456 93.4) (end 148.234467 92.682989) (width 0.19) (layer F.Cu) (net 102))
(segment (start 151.14869 92.682989) (end 152.647392 91.184287) (width 0.19) (layer F.Cu) (net 102))
(segment (start 166.68 93.33) (end 166.68 92.69) (width 0.19) (layer F.Cu) (net 103))
(segment (start 148.560306 93) (end 148.371143 93.189163) (width 0.19) (layer F.Cu) (net 103))
(segment (start 166.68 92.69) (end 165.491298 91.501298) (width 0.19) (layer F.Cu) (net 103))
(segment (start 151.28 93) (end 148.560306 93) (width 0.19) (layer F.Cu) (net 103))
(segment (start 165.491298 91.501298) (end 152.778702 91.501298) (width 0.19) (layer F.Cu) (net 103))
(segment (start 152.778702 91.501298) (end 151.28 93) (width 0.19) (layer F.Cu) (net 103))
(segment (start 144.88 92.6) (end 147.78198 92.6) (width 0.19) (layer In1.Cu) (net 103))
(segment (start 148.144144 92.962164) (end 148.371143 93.189163) (width 0.19) (layer In1.Cu) (net 103))
(segment (start 147.78198 92.6) (end 148.144144 92.962164) (width 0.19) (layer In1.Cu) (net 103))
(via (at 148.371143 93.189163) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 103))
(segment (start 144.48 92.2) (end 144.88 92.6) (width 0.19) (layer F.Cu) (net 103))
(via (at 144.88 92.6) (size 0.454) (drill 0.254) (layers F.Cu B.Cu) (net 103))
)

426
ulx3s.kicad_pcb-bak
Unescape View File

@ -2,11 +2,11 @@
(general
(links 569)
(no_connects 569)
(area 71.010001 43.48 197.572001 118.732339)
(no_connects 533)
(area 93.949999 61.269999 188.230001 112.370001)
(thickness 1.6)
(drawings 6)
(tracks 0)
(tracks 329)
(zones 0)
(modules 113)
(nets 210)
@ -65,7 +65,7 @@
(pad_to_mask_clearance 0.2)
(aux_axis_origin 82.67 62.69)
(grid_origin 86.48 79.2)
(visible_elements 7FFFFFFF)
(visible_elements 7FFF7FFF)
(pcbplotparams
(layerselection 0x010f0_80000007)
(usegerberextensions false)
@ -2183,7 +2183,7 @@
)
(module TSOP54:TSOP54 (layer F.Cu) (tedit 55BAC4E8) (tstamp 58D85778)
(at 163.315 83.01 90)
(at 165.08 87.8 90)
(descr "TSOPII-54: Plastic Thin Small Outline Package; 54 leads; body width 10.16mm; (see 128m-as4c4m32s-tsopii.pdf and http://www.infineon.com/cms/packages/SMD_-_Surface_Mounted_Devices/P-PG-TSOPII/P-TSOPII-54-1.html)")
(tags "TSOPII 0.8")
(path /58D6D507/58D8506F)
@ -3313,7 +3313,7 @@
)
(module lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm (layer F.Cu) (tedit 58D8FE92) (tstamp 58D8D57E)
(at 138.08 87.2)
(at 138.48 87.8)
(path /56AC389C/56AC4242)
(attr smd)
(fp_text reference U1 (at -7.6 -9.2) (layer F.SilkS)
@ -3438,11 +3438,11 @@
(pad C17 smd circle (at 5.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 179 /gpio/B17-) (solder_mask_margin 0.04))
(pad C18 smd circle (at 6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 66 SDRAM_CKE) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad C19 smd circle (at 6.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad C20 smd circle (at 7.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 67 SDRAM_A7) (solder_mask_margin 0.04))
(net 68 SDRAM_D15) (solder_mask_margin 0.04))
(pad D1 smd circle (at -7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 58 LED5) (solder_mask_margin 0.04))
(pad D2 smd circle (at -6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3478,11 +3478,11 @@
(pad D17 smd circle (at 5.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad D18 smd circle (at 6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 69 SDRAM_BA1) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad D19 smd circle (at 6.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 70 SDRAM_D7) (solder_mask_margin 0.04))
(net 77 SDRAM_D14) (solder_mask_margin 0.04))
(pad D20 smd circle (at 7.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 71 SDRAM_A6) (solder_mask_margin 0.04))
(net 73 SDRAM_D13) (solder_mask_margin 0.04))
(pad E1 smd circle (at -7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 57 LED4) (solder_mask_margin 0.04))
(pad E2 smd circle (at -6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3518,11 +3518,11 @@
(pad E17 smd circle (at 5.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad E18 smd circle (at 6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 74 SDRAM_BA0) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad E19 smd circle (at 6.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 75 SDRAM_D6) (solder_mask_margin 0.04))
(net 79 SDRAM_D12) (solder_mask_margin 0.04))
(pad E20 smd circle (at 7.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 76 SDRAM_A5) (solder_mask_margin 0.04))
(net 83 SDRAM_D11) (solder_mask_margin 0.04))
(pad F1 smd circle (at -7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 130 WIFI_RXD) (solder_mask_margin 0.04))
(pad F2 smd circle (at -6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3558,11 +3558,11 @@
(pad F17 smd circle (at 5.2 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad F18 smd circle (at 6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 79 SDRAM_D12) (solder_mask_margin 0.04))
(solder_mask_margin 0.04))
(pad F19 smd circle (at 6.8 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 80 SDRAM_D5) (solder_mask_margin 0.04))
(net 86 SDRAM_D10) (solder_mask_margin 0.04))
(pad F20 smd circle (at 7.6 -3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 81 SDRAM_A4) (solder_mask_margin 0.04))
(net 87 SDRAM_D9) (solder_mask_margin 0.04))
(pad G1 smd circle (at -7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 133 WIFI_TXD) (solder_mask_margin 0.04))
(pad G2 smd circle (at -6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3598,11 +3598,11 @@
(pad G17 smd circle (at 5.2 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad G18 smd circle (at 6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 83 SDRAM_D11) (solder_mask_margin 0.04))
(net 80 SDRAM_D5) (solder_mask_margin 0.04))
(pad G19 smd circle (at 6.8 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 84 SDRAM_A3) (solder_mask_margin 0.04))
(net 90 SDRAM_D8) (solder_mask_margin 0.04))
(pad G20 smd circle (at 7.6 -2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 85 SDRAM_D4) (solder_mask_margin 0.04))
(net 101 SDRAM_DQM1) (solder_mask_margin 0.04))
(pad H1 smd circle (at -7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 65 FTDI_nDTR) (solder_mask_margin 0.04))
(pad H2 smd circle (at -6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3638,11 +3638,11 @@
(pad H17 smd circle (at 5.2 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad H18 smd circle (at 6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 88 SDRAM_A9) (solder_mask_margin 0.04))
(net 85 SDRAM_D4) (solder_mask_margin 0.04))
(pad H19 smd circle (at 6.8 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad H20 smd circle (at 7.6 -2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 89 SDRAM_D3) (solder_mask_margin 0.04))
(net 72 SDRAM_CLK) (solder_mask_margin 0.04))
(pad J1 smd circle (at -7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 125 WIFI_EN) (solder_mask_margin 0.04))
(pad J2 smd circle (at -6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3678,11 +3678,11 @@
(pad J17 smd circle (at 5.2 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad J18 smd circle (at 6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 92 SDRAM_A2) (solder_mask_margin 0.04))
(net 89 SDRAM_D3) (solder_mask_margin 0.04))
(pad J19 smd circle (at 6.8 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 93 SDRAM_A1) (solder_mask_margin 0.04))
(net 66 SDRAM_CKE) (solder_mask_margin 0.04))
(pad J20 smd circle (at 7.6 -1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 94 SDRAM_A0) (solder_mask_margin 0.04))
(net 78 SDRAM_A11) (solder_mask_margin 0.04))
(pad K1 smd circle (at -7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 136 WIFI_GPIO15) (solder_mask_margin 0.04))
(pad K2 smd circle (at -6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3720,9 +3720,9 @@
(pad K18 smd circle (at 6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 95 SDRAM_D2) (solder_mask_margin 0.04))
(pad K19 smd circle (at 6.8 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 96 SDRAM_D1) (solder_mask_margin 0.04))
(net 88 SDRAM_A9) (solder_mask_margin 0.04))
(pad K20 smd circle (at 7.6 -0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 97 SDRAM_D0) (solder_mask_margin 0.04))
(net 91 SDRAM_A8) (solder_mask_margin 0.04))
(pad L1 smd circle (at -7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 124 AUDIO_R0) (solder_mask_margin 0.04))
(pad L2 smd circle (at -6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3754,15 +3754,15 @@
(pad L15 smd circle (at 3.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 5 +3V3) (solder_mask_margin 0.04))
(pad L16 smd circle (at 4.4 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(net 49 SD_D0) (solder_mask_margin 0.04))
(pad L17 smd circle (at 5.2 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad L18 smd circle (at 6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(net 96 SDRAM_D1) (solder_mask_margin 0.04))
(pad L19 smd circle (at 6.8 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 91 SDRAM_A8) (solder_mask_margin 0.04))
(net 67 SDRAM_A7) (solder_mask_margin 0.04))
(pad L20 smd circle (at 7.6 0.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 100 SDRAM_nRAS) (solder_mask_margin 0.04))
(net 71 SDRAM_A6) (solder_mask_margin 0.04))
(pad M1 smd circle (at -7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 119 AUDIO_L1) (solder_mask_margin 0.04))
(pad M2 smd circle (at -6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3798,11 +3798,11 @@
(pad M17 smd circle (at 5.2 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad M18 smd circle (at 6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 68 SDRAM_D15) (solder_mask_margin 0.04))
(net 97 SDRAM_D0) (solder_mask_margin 0.04))
(pad M19 smd circle (at 6.8 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 98 SDRAM_DQM0) (solder_mask_margin 0.04))
(net 76 SDRAM_A5) (solder_mask_margin 0.04))
(pad M20 smd circle (at 7.6 1.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 101 SDRAM_DQM1) (solder_mask_margin 0.04))
(net 81 SDRAM_A4) (solder_mask_margin 0.04))
(pad N1 smd circle (at -7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 120 AUDIO_L0) (solder_mask_margin 0.04))
(pad N2 smd circle (at -6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3838,11 +3838,11 @@
(pad N17 smd circle (at 5.2 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 47 SD_CMD) (solder_mask_margin 0.04))
(pad N18 smd circle (at 6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 49 SD_D0) (solder_mask_margin 0.04))
(net 75 SDRAM_D6) (solder_mask_margin 0.04))
(pad N19 smd circle (at 6.8 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 82 SDRAM_A10) (solder_mask_margin 0.04))
(net 84 SDRAM_A3) (solder_mask_margin 0.04))
(pad N20 smd circle (at 7.6 2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 90 SDRAM_D8) (solder_mask_margin 0.04))
(net 92 SDRAM_A2) (solder_mask_margin 0.04))
(pad P1 smd circle (at -7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 121 AUDIO_R3) (solder_mask_margin 0.04))
(pad P2 smd circle (at -6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3878,11 +3878,11 @@
(pad P17 smd circle (at 5.2 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad P18 smd circle (at 6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 73 SDRAM_D13) (solder_mask_margin 0.04))
(net 70 SDRAM_D7) (solder_mask_margin 0.04))
(pad P19 smd circle (at 6.8 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 72 SDRAM_CLK) (solder_mask_margin 0.04))
(net 93 SDRAM_A1) (solder_mask_margin 0.04))
(pad P20 smd circle (at 7.6 2.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(net 94 SDRAM_A0) (solder_mask_margin 0.04))
(pad R1 smd circle (at -7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad R2 smd circle (at -6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3898,11 +3898,11 @@
(pad R17 smd circle (at 5.2 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 50 SD_D1) (solder_mask_margin 0.04))
(pad R18 smd circle (at 6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 86 SDRAM_D10) (solder_mask_margin 0.04))
(net 98 SDRAM_DQM0) (solder_mask_margin 0.04))
(pad R19 smd circle (at 6.8 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04))
(pad R20 smd circle (at 7.6 3.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(net 82 SDRAM_A10) (solder_mask_margin 0.04))
(pad T1 smd circle (at -7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad T2 smd circle (at -6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3938,11 +3938,11 @@
(pad T17 smd circle (at 5.2 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad T18 smd circle (at 6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 87 SDRAM_D9) (solder_mask_margin 0.04))
(pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 103 SDRAM_nWE) (solder_mask_margin 0.04))
(pad T19 smd circle (at 6.8 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 69 SDRAM_BA1) (solder_mask_margin 0.04))
(pad T20 smd circle (at 7.6 4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 99 SDRAM_nCS) (solder_mask_margin 0.04))
(net 74 SDRAM_BA0) (solder_mask_margin 0.04))
(pad U1 smd circle (at -7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad U2 smd circle (at -6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3978,11 +3978,11 @@
(pad U17 smd circle (at 5.2 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04))
(pad U18 smd circle (at 6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 78 SDRAM_A11) (solder_mask_margin 0.04))
(pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 102 SDRAM_nCAS) (solder_mask_margin 0.04))
(pad U19 smd circle (at 6.8 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 99 SDRAM_nCS) (solder_mask_margin 0.04))
(pad U20 smd circle (at 7.6 5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 77 SDRAM_D14) (solder_mask_margin 0.04))
(net 100 SDRAM_nRAS) (solder_mask_margin 0.04))
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