schematics: connecting SHUTDOWN to FPGA

7 years ago · f5de9a85ed
parent fdfc6525ea
commit f5de9a85ed
4 changed files with 7 additions and 1 deletions
--- a/README.md
+++ b/README.md
@ -125,4 +125,4 @@ Make the prototype.
    [x] Reconnect WIFI_OFF so that jumper has priority
    [x] 25MHz oscillator: needs clearance from LEDs, move under USB1
    [ ] connect SPI Flash Quad Mode (QSPI)
-    [ ] connect SHUTDOWN to FPGA
+    [x] connect SHUTDOWN to FPGA
--- a/flash.bak
+++ b/flash.bak
@ -489,4 +489,6 @@ F 4 "www.mouser.com" H 6400 2850 60  0001 C CNN "Distributor1_URL"
 	7    6400 2850
 	1    0    0    -1  
 $EndComp
+Text Notes 1500 3500 0    60   ~ 0
+For programming Flash thru JTAG see\nLattice FPGA-TN-02050
 $EndSCHEMATC
--- a/ram.bak
+++ b/ram.bak
@ -412,4 +412,6 @@ F 4 "www.mouser.com" H 9300 5250 60  0001 C CNN "Distributor1_URL"
 	4    9300 5250
 	1    0    0    -1  
 $EndComp
+Text GLabel 10050 4850 2    60   Input ~ 0
+SHUTDOWN
 $EndSCHEMATC
--- a/ram.sch
+++ b/ram.sch
@ -412,4 +412,6 @@ F 4 "www.mouser.com" H 9300 5250 60  0001 C CNN "Distributor1_URL"
 	4    9300 5250
 	1    0    0    -1  
 $EndComp
+Text GLabel 8550 3450 0    60   Input ~ 0
+SHUTDOWN
 $EndSCHEMATC