From f7dc501e2c11e39444b229562779824aece79d26 Mon Sep 17 00:00:00 2001 From: davor Date: Wed, 31 Jan 2018 15:53:22 +0100 Subject: [PATCH] readme update --- README.md | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index a960eaa..28dd6ac 100644 --- a/README.md +++ b/README.md @@ -154,5 +154,7 @@ Test the prototype. [x] move 8 LEDs a bit down and right [x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins [x] additional 2 differential lines for US2 - [ ] additional US2 pins for pullup 1.5k and pulldown 15k + [x] additional US2 pins for pullup 1.5k + [x] additional US2 pins for pull up-down 15k + [ ] unified US2 pullup/down: resistor-diode nework for pullup 1.5k and pulldown 15k [ ] clear silkscreen mess with Cx under FPGA