davor
|
ecc833665c
|
PCB: usage of 3D alternate footprint for molex hindged SD card slot (disabled)
rename .wrl_disabled -> .wrl to enable
|
7 years ago |
|
davor
|
c7565d5ebf
|
footprints: 3D model for molex 47219-2001
|
7 years ago |
|
Emard
|
a740f61867
|
gerbers update
|
7 years ago |
|
Emard
|
aaa60b7b10
|
PCB: improving situation under SD card
|
7 years ago |
|
Emard
|
0bc4c77cc1
|
gerbers update
|
7 years ago |
|
Emard
|
a1414e91ca
|
PCB: trac cosmetix for SD card to lower possibility of short circuit
unter "no pattern area"
|
7 years ago |
|
Emard
|
995702a9f6
|
gerbers update
|
7 years ago |
|
Emard
|
dfb8ddf36c
|
PCB: avoiding short circuits under SD card.
One big VIA deleted, 2 smaller VIAs placed at the top of the
GND pad under ESP32
|
7 years ago |
|
Emard
|
c2df7f5c6d
|
gerbers update
|
7 years ago |
|
Emard
|
8ebde324d0
|
PCB: trac cosmetix
|
7 years ago |
|
Emard
|
5b7bba8d2e
|
gerbers update
|
7 years ago |
|
Emard
|
2bbb20f0f5
|
PCB: moving L4 away from L1
|
7 years ago |
|
Emard
|
8bc30d2356
|
PCB: make 3D models of 2.54mm headers invisible by renaming .wrl -> .wrl_disabled
|
7 years ago |
|
Emard
|
80a41670c1
|
BOM update RV3
|
7 years ago |
|
Emard
|
9b576dcef8
|
schematics update: RV3 placed
|
7 years ago |
|
Emard
|
a3fbb57845
|
BOM update C56=C57=3.3pF
|
7 years ago |
|
Emard
|
029339ae94
|
schematics C56=C57=3.3pF
|
7 years ago |
|
davor
|
7894697a9a
|
BOM v2.0
|
7 years ago |
|
davor
|
322efd4635
|
pic v2.0
|
7 years ago |
|
davor
|
b5474d6f07
|
schematics pdf v2.0
|
7 years ago |
|
davor
|
77f386d6ba
|
gerbers v2.0
|
7 years ago |
|
davor
|
cc62f91073
|
PCB v2.0
|
7 years ago |
|
davor
|
c90665620d
|
schematics v2.0
|
7 years ago |
|
Emard
|
84ad1f2da6
|
BOM update
|
7 years ago |
|
Emard
|
87643fd9d7
|
PCB: renamed references BTNx -> Bx and silkscreen writing PWR, F1, F2, UP, DOWN, LEFT, RIGHT
|
7 years ago |
|
Emard
|
4f3da8f86c
|
schematics: Rename references BTNx -> Bx
|
7 years ago |
|
Emard
|
5e6c44aeff
|
PCB: silkscreen names for buttons 0-6: PWR, F1, F2, U, D, L, R
|
7 years ago |
|
Emard
|
ec829fb988
|
readme update
|
7 years ago |
|
Emard
|
9690186c35
|
PCB: GND-thru VIAs and Non-GND yellow layer clearance from board's edge
|
7 years ago |
|
Emard
|
321d7afdff
|
readme update
|
7 years ago |
|
Emard
|
098c1f73d9
|
PCB: routing IN/OUT 5V away from board's edge
|
7 years ago |
|
Emard
|
0e9a54a9c6
|
PCB: trac cosmetix
|
7 years ago |
|
Emard
|
dbcd477093
|
PCB: copper fill updated
|
7 years ago |
|
Emard
|
887fe1b8b7
|
BOM v1.9.5
|
7 years ago |
|
Emard
|
77209ebca1
|
PCB: silkscreen cosmetix
|
7 years ago |
|
Emard
|
a3ccbe8159
|
PCB v1.9.5: Noise filter for ADC (L4,C58,C59)
|
7 years ago |
|
Emard
|
4ee6ab82f3
|
ulx3s-cache.lib (for L4 footprint)
|
7 years ago |
|
Emard
|
0f35cf56a0
|
schematics v1.9.5: Noise filter for ADC (L4,C58,C59)
|
7 years ago |
|
Emard
|
54337e4586
|
readme update (noise filter for ADC)
|
7 years ago |
|
Emard
|
a043e882cc
|
PCB: updated values for C56, C57
|
7 years ago |
|
Emard
|
c9a31514ad
|
BOM v1.9.4: PN for C56, C57, Y2
|
7 years ago |
|
Emard
|
fb387cd68b
|
schematics v1.9.4: correct PN Y2 quartz 32768Hz/6pF and matching
load capacitance of 6pF with C56=C57=10pF for RTC MCP7904
|
7 years ago |
|
Emard
|
1f5e9a10b7
|
PCB: further separating RV2 from RV3
|
7 years ago |
|
Emard
|
b621862a68
|
PCB: RV3 enabled 3D model and insertion coordinates
|
7 years ago |
|
Emard
|
5103a78486
|
PCB v1.9.4: silkscreen cosmetix
|
7 years ago |
|
Emard
|
ae20ff2331
|
PCB: more space between RV2 and RV3
|
7 years ago |
|
Emard
|
c98c7c136b
|
PCB: silkscreen cosmetix
|
7 years ago |
|
Emard
|
d19f96ee5d
|
Merge branch 'master' of https://github.com/emard/ulx3s
import other changes
|
7 years ago |
|
Emard
|
4c36281509
|
PCB: BAT1 pad size enlarged 0.2 mm and pad clearance set to 0.7 mm
|
7 years ago |
|
davor
|
6bd8e08f9b
|
schematics: Green LED Digikey PN
|
7 years ago |
