Emard
|
dfcd39ecf4
|
PCB v2.1.6: trac cosmetix around SDRAM
|
6 years ago |
|
Emard
|
2f6f450ce3
|
PCB: updated SDRAM footprint and trac cosmetix
|
6 years ago |
|
Emard
|
59c3943ce9
|
PCB: adc silkscreen cosmetix
|
6 years ago |
|
Emard
|
c7e9196ce2
|
PCB: updating dipswitch and adc silkscreen
|
6 years ago |
|
Emard
|
9848db7076
|
PCB: update footprints for ADC and USBSERIAL
grid origin to lower left edge of PCB
|
6 years ago |
|
Emard
|
90f43a53b8
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
91a831541e
|
PCB v2.1.5: ADC land pattern pads distance now 4.68 mm
|
6 years ago |
|
Emard
|
2863267e27
|
PCB: trac cosmetix under BGA
|
6 years ago |
|
Emard
|
dee86c02f7
|
PCB: one BGA pad was doubly connected to GND, now single connection.
|
6 years ago |
|
Emard
|
aa58166786
|
PCB: move SW1 mark at Fab layer to more visible place
|
6 years ago |
|
Emard
|
9361e1b3b9
|
PCB v2.1.4: ADC footprint according to Maxim packaging information
|
6 years ago |
|
Emard
|
e67da73514
|
PCB: re-enabling ESP32 in 3D view
|
6 years ago |
|
Emard
|
4c76c26cae
|
PCB: copper fill keepout from USB pads, "skriptarnica.hr" written under ESP32
|
6 years ago |
|
Emard
|
7d9c40b7b8
|
footprints, PCB: dipswitch footprint moved to directory "footprints/dipswitch/dipswitch_smd.pretty"
|
6 years ago |
|
Emard
|
0f52e86c05
|
PCB: uncluttering Fab layers
|
6 years ago |
|
Emard
|
f46af906b7
|
PCB v2.1.3: mostly NOP changes going into next PCB release
|
6 years ago |
|
Emard
|
55bb335121
|
PCB: fixing Fab layers for assembly layout printed on paper sheet
|
6 years ago |
|
Emard
|
8c4d1cddc0
|
PCB: route GP14 thru nearest VIA and leave space to
balance 45deg routing to SDRAM.
|
6 years ago |
|
Emard
|
5936d9a722
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
7880718881
|
PCB: all copper traces under BGA 0.127 mm width
|
6 years ago |
|
Emard
|
08bffeb7e3
|
PCB: re-run DRC after schematics v2.1.2 to make sure for NOP change
|
6 years ago |
|
Emard
|
95f06be717
|
partially fixed fab layer (need to fix many footprints too)
|
6 years ago |
|
Emard
|
432ada4878
|
PCB: copper fill keepout area around GPDI and ADC,
thicker trace 0.127->0.19 for 2.5V under BGA
|
6 years ago |
|
Emard
|
7286403ff3
|
PCB v2.1.2: trac cosmetix under BGA
|
6 years ago |
|
Emard
|
7a31fc77a4
|
PCB: connecting each BGA pad with max 1 track (thermal relief)
|
6 years ago |
|
Emard
|
be4d757c29
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
96c3dfe16f
|
PCB v2.1.1: copper fill cosmetix
|
6 years ago |
|
Emard
|
6ebd1367f2
|
PCB: grid origin to lower left edge of PCB
|
6 years ago |
|
Emard
|
6138a03c05
|
PCB: in2.Cu fill minimal width increased 0.1->0.126 mm
More than this >=0.127 mm DRC will not pass
|
6 years ago |
|
Emard
|
cf0c54059c
|
PCB v2.1
|
6 years ago |
|
Emard
|
b7fd68a25f
|
PCB: more GND VIAs
|
6 years ago |
|
Emard
|
6e2b08c1e3
|
PCB: solder paste to copper clearance -0.025 mm from each edge
|
6 years ago |
|
Emard
|
1f7c73ee9c
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
ea9638730e
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
e43e4c3452
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
3d1d25b4f8
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
2af23a8cfc
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
4bd061b9f5
|
PCB v2.0.10: trac & via cosmetix
|
6 years ago |
|
Emard
|
797d383599
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
807be26e47
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
28caee6000
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
acb0a3d0ab
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
6a0c0ab47f
|
PCB: silkscreen block for handwritten notes
|
6 years ago |
|
Emard
|
3021028ff5
|
PCB: trac cosmetix, routing BTN_R around to allow more BGA GND VIAs
|
6 years ago |
|
Emard
|
6d07a69129
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
893f23e27c
|
PCB: add more VIAs under BGA
|
6 years ago |
|
Emard
|
854f71bdda
|
PCB: FPGA again set as visible in 3D view
|
6 years ago |
|
Emard
|
676837ef3d
|
PCB v2.0.9: trac/via cosmetix
|
6 years ago |
|
Emard
|
91b435bdfa
|
PCB v2.0.8: removing fill GND top layer under BGA, trac cosmetix
|
6 years ago |
|
Emard
|
ca91d6bb34
|
PCB: reducing copper traces on top layer under BGA to 0.127 mm
|
6 years ago |
