3bffe6e0e7
schematics: move clock capable text GP18->GP17 after connector
...
rotation things got shifted....
6 years ago
05db5c7070
schematics: fix numbering on mirrored J1/J2
6 years ago
797b2bff41
schematics: J1,J2 pin numbering note
6 years ago
bc1e6e013a
schematics update: J1 and J2 mirrored in order to have
...
the same visual appearance as on physical PCB.
6 years ago
808b0fc003
schematics update with differential and single-ended notes
6 years ago
2e96aefdb1
schematics: mark wifi DAC pins on J1 connector
6 years ago
996a12ae32
schematics: marking clock-capable gp/gn pins
6 years ago
ec948ee6b9
schematics v2.1: renaming diode PCB jumpers RD -> D
6 years ago
79e99bf474
schematics: Mark as NC all BGA pins which are NC in 12F FPGA chip.
...
So those pins can be recognized in PCB as having no net name.
Those pins may have use on other chips 25F, 45F or 85F but we
won't used those pins because the buard is designed to for
work for all.
6 years ago
3e832aa000
schematics: instead of 0-ohm resistors, use normally closed PCB solder jumper
6 years ago
6d44289060
schematics: 3 power schottky diodes replaced with 0-ohm jumpers
7 years ago
111c56bbb6
schematics: USB footprints reduced pad size for improved centering
7 years ago
49b3c44d0f
schematics: v1.8.9
7 years ago
2988e8661f
schematics: Replace 3 power schottky diodes with 0-ohm resistors
7 years ago
b92dc5b639
schematics: specified BLUE LED PN bin code with lowest Vf (2.8-3.0V)
7 years ago
f6a531c377
schematics: rename "Do not install" -> "Leave empty"
7 years ago
786b2466cf
schematics: change filed names for parts BOM suitable for 1-click-bom.tsv
...
MFG_PN->MPN, Distributor1_PN->Mouser, Distributor1_URL->Mouser_URL
7 years ago
a1c2e8228f
schematics: changing old rescue symbols with new from kicad 5 library
7 years ago
d4c8b8d798
schematics: updating new diodes symbols
7 years ago
323c7d78b7
schematics: hopefully getting rid of all references to micro-gpdi-d
7 years ago
853497d403
schematics: replace 45F chip with 85F
7 years ago
b006a34b71
schematics: C54 22uF for 3V RTC battery
7 years ago
3996e140ef
schematics: kicad 5 load and save
7 years ago
db50639a60
schematics: 4 22nF capacitors for 2.5/3.3V and 3.3V near J1 and J2 connector
7 years ago
fe35db8fbb
schematics: 2V5_3V3 instead fixed 3.3V to J1 connector
7 years ago
54dcca20fa
schematics: usb pull pins moved from gpio to gpdi bank
...
gpio is planned to become be voltage changeable 2.5/3.3V
while pulls should go to 3.3V
7 years ago
78edad49df
schematics: US2 lines for pull with 15k
7 years ago
2f3cc59274
schematics: adding mouser P/N
7 years ago
b205d52f4f
schematics: sprinkling 22nF decoupling capacitors under FPGA
7 years ago
a04b74cc61
schematics, footprints: micro usb cleanup
7 years ago
6079a51257
schematics: symbol for SDRAM copied from rescue to proper library
7 years ago
c1053dd7bd
schematics: cleanup of MFG_PN to simplify BOM
7 years ago
804ac1c309
schematics: Add some PN's for the BOM
7 years ago
6b50f65544
footprints: FPGA renaming Quad SPI lines D2,D3
...
schematics: reference FPGA footprint directly (not from rescue file)
7 years ago
e81d05b68d
schematics: renaming pins J..+- to GP,GN..
7 years ago
5b7c755ee1
schematics: flip audio 0-3
7 years ago
f4d7692c91
schematics: SD card symbol with 2 CD pins connected to GND
7 years ago
c87e9f6c4c
schematics: renumbering dipswitch pins to match writing on the
...
part, pins 1-4 from left to right
7 years ago
3915779e0c
schematics: part numbers and URLs of datasheets and manufacturers
...
of most chips and connectors. Small parts not done yet.
7 years ago
2b2420fe37
schematics: text labels that enumerate differential pairs on 2.54mm connector
7 years ago
a5a51a8f28
connected missing SD card pins to esp-32
7 years ago
cca17d282d
open-close to check that everything loads fine
7 years ago
35b3a8b3dd
changing to 45F which is production device now
...
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
7 years ago
050a70079a
move one audio-v pin from bank0 to bank7 so
...
now all audio jack pins are on bank7
7 years ago
0d71e508ae
analog: audio ring2 resistor DAC network connected to FPGA
...
copper infill is getting thin, so minimal-thickness traces
are used 0.127 mm
7 years ago
ba4c8e8d22
PCB v1.6 SDRAM fully reworked
7 years ago
e4fc99887e
moving GND and VCC on schematics symbols to
...
common locations for planned PCB which
supports upgrade path for example
12F->25F->45F->85F and if possible ECP5U->ECP5UM
7 years ago
07de158d38
R56 for FT231X rev A,B,C workaround from TN140_FT231X Errata
7 years ago
10df092413
using modified ECP5 footprint
7 years ago
91ac1cc478
D8,D9,D51,D52: SMA package 2A low drop low profile
7 years ago
emard