davor
|
5d5a4031cc
|
pins VREF named on schematic symbol of fpga
|
8 years ago |
|
davor
|
067962ec48
|
fpga schematic symbol: renumbering bank units
|
8 years ago |
|
davor
|
4d31d658fb
|
Added pins for remaining banks.
Need to verify if everything is correct.
|
8 years ago |
|
davor
|
b62dc97d89
|
adding BANK2 pins to FPGA shematic symbol
|
8 years ago |
|
davor
|
09c209e137
|
BGA reducing solder mask clearance
|
8 years ago |
|
davor
|
d64741e825
|
BGA pads smaller 0.4->0.35 mm
|
8 years ago |
|
davor
|
aa1e65bd71
|
small edits
|
8 years ago |
|
davor
|
f6326e22d9
|
changing BANK0 (Unit A) shematic symbol and
adding BANK1 (Unit B)
|
8 years ago |
|
Davor
|
25672b71ff
|
updating pins for BANK1 (still incomplete)
|
8 years ago |
|
davor
|
3f8b5009a9
|
Uploading initial kicad project for ULX3S
|
9 years ago |
