davor
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a7de1a4e58
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power button
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8 years ago |
|
davor
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5d5a4031cc
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pins VREF named on schematic symbol of fpga
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8 years ago |
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davor
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a60712b2f6
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place renumbered schematic units of the fpga chip
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8 years ago |
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davor
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067962ec48
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fpga schematic symbol: renumbering bank units
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8 years ago |
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davor
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e2899667ef
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place all available banks to gpio page
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8 years ago |
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davor
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4d31d658fb
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Added pins for remaining banks.
Need to verify if everything is correct.
|
8 years ago |
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davor
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c3889467a0
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rename gpio pins same as BGA pin e.g. A9, C11, ...
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8 years ago |
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davor
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4f3fabdb5f
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oled updated on the schematic and PCB
|
8 years ago |
|
davor
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27e311a270
|
improving oled pcb footprint
|
8 years ago |
|
davor
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4626f7a0e3
|
oled schematic symbol
|
8 years ago |
|
davor
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b1062e5795
|
place oled symbol on pcb
|
8 years ago |
|
davor
|
650c95b52b
|
oled pinput
|
8 years ago |
|
davor
|
9edeb3ae1e
|
oled footprint
|
8 years ago |
|
davor
|
6639abded3
|
add 4 mounting holes
|
8 years ago |
|
davor
|
b661cacede
|
Change to 2x20 pin headers, PCB layout currently sub-optimal
|
8 years ago |
|
davor
|
f7185a0ff7
|
improving wifi SD and JTAG pinouts.
Unsure of JTAG (GPIO20 is NC on ESP-32S module?)
|
8 years ago |
|
davor
|
e50f754eb4
|
esp32 module pinout
|
8 years ago |
|
davor
|
f9ba6fa20b
|
chage ESP8266-12E to ESP32S
approximate (maybe incorrect) connections - need review
(programming esp from fpga, jtag, sd, chip enable)
|
8 years ago |
|
davor
|
a0dae5bb6a
|
another diode to duscharge C14 at shutdown
|
8 years ago |
|
Davor
|
cf01d5cc8d
|
Power: Replace discharge resistor which leaks with
a diode for discharge C at shutdown
HDMI pin 0 is now the shield and connected to GND
|
8 years ago |
|
Davor
|
75375ac1e8
|
readme update
|
8 years ago |
|
Davor
|
7b1ce8fc93
|
readme update
|
8 years ago |
|
Davor
|
f9e8652943
|
readme update
|
8 years ago |
|
Davor
|
0c9d9f0c10
|
readme update
|
8 years ago |
|
Davor
|
f6e80bdd12
|
readme update
|
8 years ago |
|
Davor
|
a79dba2e5e
|
readme update
|
8 years ago |
|
Davor
|
8110cea7fa
|
moving DAC resistor network closer to 3.5mm jack
|
8 years ago |
|
davor
|
5d4ce79295
|
connecting BANK2 to PMOD connectors
|
8 years ago |
|
davor
|
b62dc97d89
|
adding BANK2 pins to FPGA shematic symbol
|
8 years ago |
|
davor
|
dc6ea57d67
|
Label button pullup net "BTNPU"
|
8 years ago |
|
davor
|
222f4805b3
|
SDRAM add global labels for signals
|
8 years ago |
|
davor
|
23c4cde741
|
GPDI I2C 5V level shifter
|
8 years ago |
|
davor
|
9132d32bc8
|
gerber update
|
8 years ago |
|
davor
|
7fd0f561fc
|
Add SPI flash chip
|
8 years ago |
|
davor
|
b6697c4012
|
Audio 3.5mm jack resistor network
|
8 years ago |
|
davor
|
26295ebeee
|
HDMI normal size footprint
|
8 years ago |
|
davor
|
88172e2730
|
gerber output example
|
8 years ago |
|
davor
|
499b223bda
|
small changes
|
8 years ago |
|
davor
|
09c209e137
|
BGA reducing solder mask clearance
|
8 years ago |
|
davor
|
d64741e825
|
BGA pads smaller 0.4->0.35 mm
|
8 years ago |
|
davor
|
aa8fac622b
|
SD card to sperate "sdcard" sheet
small rearranging and comments
|
8 years ago |
|
davor
|
4b5faa4f58
|
eeprom for FT2232
|
8 years ago |
|
Davor
|
ddd08e597e
|
JTAG port to USB sheet
|
8 years ago |
|
Davor
|
6729ad635e
|
updating transistors pin order
|
8 years ago |
|
Davor
|
c17b4cfa73
|
connecting FT2232 with JTAG
|
8 years ago |
|
Davor
|
8fae84cd39
|
add FT2232H-56Q footprint
|
8 years ago |
|
Davor
|
09c26de536
|
Corrected SDRAM schematic symbol
|
8 years ago |
|
Davor
|
728e442b49
|
crystal footprint rename Ceramic->plastic, label nets
|
8 years ago |
|
Davor
|
64741b460a
|
add footprint for crystal 32768 Hz
|
8 years ago |
|
Davor
|
1db6760885
|
disallow micro via
normal via routing example
|
8 years ago |
