davor
|
97c6191f71
|
PCB: origins to lower left corner, so all insertion positions in centroid file are now positive,
silkscreen cosmetics
|
7 years ago |
davor
|
5586a57fc0
|
PCB: origins for coordinates, drill and place set to upper left corner
|
7 years ago |
davor
|
bc88a6e2ae
|
PCB: silkscreen SW1 moved to visible position and similar cosmetics
|
7 years ago |
davor
|
ce6ee9ea3d
|
PCB: silkscreen cosmetics
|
7 years ago |
davor
|
6f74d5170e
|
PCB: use new footprint for Y1
|
7 years ago |
davor
|
27f6b96d3b
|
PCB: v1.7.3 SD card footprint centered, CD pins to GND
|
7 years ago |
Emard
|
42455ba7b0
|
PCB: use 3D model for SD card
|
7 years ago |
Emard
|
7d9309cc21
|
PCB: use new 2D footprint ABS25 with pin 1 mark for Y2
|
7 years ago |
Emard
|
c4f5429eca
|
PCB: use new abs25 3D model
|
7 years ago |
davor
|
fb3b02d103
|
PCB: dipswitch 3D update
|
7 years ago |
davor
|
abc824a998
|
PCB: correct 3D shape for SDRAM chip
|
7 years ago |
davor
|
6c7902e963
|
PCB: update SW1 pins renumbering and orientation
|
7 years ago |
davor
|
0277b4009b
|
SMD dipswitch model converted to VRML (dipswitch_smd.wrl)
and included in 3D viewer. scale and orientation is wrong,
currently fixed in PCB 3D model parameters
|
7 years ago |
Emard
|
da99fe090b
|
schematics: imported netlist from schematics. no phyiscal layout change.
|
7 years ago |
Emard
|
dd642d0578
|
PCB: wider SDRAM footprint and trac cosmetix
|
7 years ago |
Emard
|
36b79925fa
|
PCB: swap U2,U2, version 1.7.2
Footprint ESP-32 a little bit moved
|
7 years ago |
Emard
|
ebc6e501fe
|
PCB: update SDRAM new pitch
|
7 years ago |
Emard
|
775c304aee
|
PCB: swap U4,U5, move via a bit away from switcher pad
|
7 years ago |
Emard
|
df1930e887
|
PCB: swap L2 <-> L3
|
7 years ago |
Emard
|
2d56b3ba29
|
PCB v1.7.1 increased SDRAM pitch 0.8 -> 0.8077 mm
|
7 years ago |
Emard
|
7dd439cae6
|
PCB: use SOA008 footprint for SPI flash chip
|
7 years ago |
Emard
|
d363ae009d
|
PCB: update with I2C footprint
|
7 years ago |
Emard
|
eee33da15b
|
PCB: RTC footprint updated
|
7 years ago |
Emard
|
36fed52378
|
PCB: Reoriented SD card slot placed
|
7 years ago |
Emard
|
27d45661c9
|
PCB: SD card proper insertion orientation
|
7 years ago |
Emard
|
1364d53520
|
PCB: audio jack update
|
7 years ago |
Emard
|
cdf9e06d06
|
PCB: I2C SM8 package used with proper 3D orientation
|
7 years ago |
Emard
|
d0802747ac
|
PCB: NXP RTC footprint changed to SOT96-1 properly oriented
|
7 years ago |
Emard
|
ebfbe5a298
|
PCB: re-run DRC
|
7 years ago |
Emard
|
9b3494741b
|
PCB: some parts were not enabled for insertion
(Normal+Insert) must be checked to appear on centroid list
|
7 years ago |
Emard
|
483906c052
|
PCB: change according to schematics 1.2V->1.1V
|
7 years ago |
Emard
|
f3c834cf54
|
PCB: SD card slot part name and esp-32 3D shape
|
7 years ago |
davor
|
9692fea61d
|
cosmetix: LED D22 moved a bit left to be symmetrical
|
7 years ago |
Emard
|
1c498602ad
|
silkscreen "+-" markings
|
7 years ago |
Emard
|
ef5f8c5100
|
Labels on J1/J2 connectors
|
7 years ago |
Emard
|
66459da5c7
|
WIFI VSPI connected on PCB
|
7 years ago |
Emard
|
c8084d5419
|
updating LED symbols on PCB
trac cosmetix
|
7 years ago |
Emard
|
c75a671e06
|
WIFI LED on PCB
|
7 years ago |
Emard
|
b0a41af38f
|
trac cosmetix
|
7 years ago |
Emard
|
fea181ae72
|
CEC resistor on PCB
|
7 years ago |
Emard
|
ca9fcf4df4
|
connecting missing SD card pins on PCB
|
7 years ago |
Emard
|
68299246cf
|
trac cosmetix
|
7 years ago |
Emard
|
da5b2c9c59
|
trac cosmetiscs: optimizing +5V to closest point
thickening 3.3V and GND on 2.54 mm header
|
7 years ago |
Emard
|
d68058d1ae
|
PCB properly set true-complenet A9-B10
|
7 years ago |
Emard
|
cae3c0a488
|
trac cosmetix
|
7 years ago |
Emard
|
35b3a8b3dd
|
changing to 45F which is production device now
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
|
7 years ago |
davor
|
050a70079a
|
move one audio-v pin from bank0 to bank7 so
now all audio jack pins are on bank7
|
7 years ago |
davor
|
5769ed05ae
|
trac cosmetix
|
7 years ago |
davor
|
f5688676a5
|
trac cosmetix
|
7 years ago |
davor
|
0d71e508ae
|
analog: audio ring2 resistor DAC network connected to FPGA
copper infill is getting thin, so minimal-thickness traces
are used 0.127 mm
|
7 years ago |