820064c65e
NXP RTC SOT96-1 package, same as SOIC-8 but oriented with pin 1
...
in upper left quadrant, according to NXP SOT96-1 tape and reel datasheet
7 years ago
afa3ace80b
esp-32 3D model
7 years ago
702be2aa9e
FPGA chip bank 0: swap sides A9<->B10 (true-complement was wrong)
7 years ago
35b3a8b3dd
changing to 45F which is production device now
...
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
7 years ago
ba4c8e8d22
PCB v1.6 SDRAM fully reworked
7 years ago
9d8be27731
logo "HRVATSKI PROIZVOD" enlarged and moved towards audio connector
7 years ago
220f575442
schematic "power" sheet and footprint cosmetics
7 years ago
1ea88bda53
Adding pins to schematic symbols for all chips in unit "H" (SERDES)
...
Non-serdes chips need GND connection on unit "H".
"power" sheet now connects GND's at unit "H".
7 years ago
8f452e4d43
filling up serdes block 50,51 for UM85F, halway done.
...
VCC are also planned to be moved to that block
7 years ago
fffde2cf88
Additional GND for 85F chips
7 years ago
6c23919a2d
Schematic symbol for 12F. Currently just a copy of 25F
...
and checked bank0 pinout, and randomly power bank seems to fit
at first glance.
7 years ago
e4fc99887e
moving GND and VCC on schematics symbols to
...
common locations for planned PCB which
supports upgrade path for example
12F->25F->45F->85F and if possible ECP5U->ECP5UM
7 years ago
151cf46186
added missing jumper footprint
7 years ago
77b35c7bd2
battery, remove silkscreen printing from the pad
...
and other small silkscreen updates
7 years ago
b6f388d228
ESP-32S footprint changed to avoid
...
silkscreen writing over the pads,
small cosmetics around
7 years ago
cf8da0d984
Logos EMARD, RADIONA, RIZ, FER, HRVATSKI PROIZVOD
...
Gerbers update
7 years ago
a913ffb675
Micro SD outline moved to correct layer (b.mask->f.fab)
7 years ago
ae1aee7f5e
Micro SD contacts were OK for SCHD3A100.
...
Readme update.
Silkscreen outline drawn.
7 years ago
52c02d540c
Footprint ALPS SCHD3A0100 (obsolete but traditionally good)
7 years ago
cb69b2cc9a
ECP5 85E schematic footprint
7 years ago
3aac13deb4
footprint for ECP5:
...
fix 25E device, small pin naming swapping BANK0 one pin A/B
new 45E device, modified pin names to fit (needs more review)
new 85E device but pin names are wrong (need more work)
7 years ago
732323094c
BGA footprint: silkscreen ticks for verification
...
of relative alignment between BGA silkscreen and the pads
7 years ago
d463d17f18
32768Hz crystal ABS25 footprint now correct
7 years ago
eaf4c2402a
Fab layer, moving values to avoid overlap writings
...
GPDI footprint edited to remove some unneeded lines
Gerbers update
7 years ago
5a2eb8220f
silkscreen on top layer: avoiding writing on solder pads
7 years ago
e15ab7d84f
removing battery circle from the sikscreen
...
(changing footprint)
7 years ago
7569433437
removing OLED outline from the silkscreen
...
(footprint changed)
7 years ago
6b9a07a7ab
BGA footprint with double squares for manual alignment
7 years ago
ee20b46f6d
connecting ADC substrate pad to GND
8 years ago
2153a220a0
schematic symbol for ADC MAX11123
...
small PCB traces cleanup
ADC chip placed on PCB but connected only to GND
8 years ago
eb3fc2ec70
connecting some GNDs and GNDing unnamed shield pads on USB connectors
8 years ago
a4b74230d3
fixing errors in schem symbol BANK6
8 years ago
af58a36fbd
delete old FPGA schem. symbol component from the library
8 years ago
e5f97e1897
schematic symbol FPGA: mark bank physical location
...
on the floorplan
8 years ago
4a26254f9a
correcting schematic symbol of FPGA
8 years ago
01d1cad2ec
add missing pins in schematic symbol for BANK3
8 years ago
d0791b1e47
correcting few pin numbering errors in FPGA schematic symbols
8 years ago
40aef19979
FPGA schematic symbol add mssing PR41A, PR41B to BANK3
8 years ago
75e4f9b564
correct footprint for crystal oscillator 25 MHz
8 years ago
9570c1137b
small edits
8 years ago
a477fbd050
connecting flash config chip
8 years ago
5221d8270a
add footprint for several ftdi usbserial chip
...
including FT231X
8 years ago
2de9717740
fpga bga schematic symbol set exact chip name
8 years ago
5d5a4031cc
pins VREF named on schematic symbol of fpga
8 years ago
067962ec48
fpga schematic symbol: renumbering bank units
8 years ago
4d31d658fb
Added pins for remaining banks.
...
Need to verify if everything is correct.
8 years ago
27e311a270
improving oled pcb footprint
8 years ago
4626f7a0e3
oled schematic symbol
8 years ago
9edeb3ae1e
oled footprint
8 years ago
f9ba6fa20b
chage ESP8266-12E to ESP32S
...
approximate (maybe incorrect) connections - need review
(programming esp from fpga, jtag, sd, chip enable)
8 years ago
Emard