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Function Test Clock #32

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opened 5 years ago by jebba · 7 comments
jebba commented 5 years ago
Owner

Function Test Clock

Function Test Clock
jebba added this to the 3.0.8 milestone 5 years ago
jebba self-assigned this 5 years ago
jebba added the Function label 5 years ago
Ghost commented 5 years ago

I use this selftest for clock and alarm test...

https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32c-85k-vector-v20/ulx3s_v20_85f_f32c_selftest_100mhz_flash.img

I usually rename this to .bit and uploading it with ujprog -j flash (permanent)
So with that I check FLASH and most peripheral ...

I use this selftest for clock and alarm test... https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32c-85k-vector-v20/ulx3s_v20_85f_f32c_selftest_100mhz_flash.img I usually rename this to .bit and uploading it with ujprog -j flash (permanent) So with that I check FLASH and most peripheral ...
jebba commented 5 years ago
Poster
Owner 
$ ujprog -j flash ulx3s_v20_85f_f32c_selftest_100mhz_flash.bit 
ULX2S / ULX3S JTAG programmer v 3.0.92 (built Oct 12 2019 17:09:17)
Cannot find JTAG cable.


$ FleaFPGA-JTAG -l
    FleaFPGA-JTAG utility by Xark (built: Oct 19 2019 16:35:17)
        based on ispVME(tm) V12.2 Copyright 1998-2011.
                 Lattice Semiconductor Corp.

Available FTDI devices:  (with * next to possible FleaFPGA devices)
 * 0 FTDI-230X  - ULX3S FPGA 85K v3.0.8                    #2

Total time        : 0:00.0
Done...
<pre> $ ujprog -j flash ulx3s_v20_85f_f32c_selftest_100mhz_flash.bit ULX2S / ULX3S JTAG programmer v 3.0.92 (built Oct 12 2019 17:09:17) Cannot find JTAG cable. $ FleaFPGA-JTAG -l FleaFPGA-JTAG utility by Xark (built: Oct 19 2019 16:35:17) based on ispVME(tm) V12.2 Copyright 1998-2011. Lattice Semiconductor Corp. Available FTDI devices: (with * next to possible FleaFPGA devices) * 0 FTDI-230X - ULX3S FPGA 85K v3.0.8 #2 Total time : 0:00.0 Done... </pre>
jebba commented 5 years ago
Poster
Owner

If I try to program the SVF file in that directory:

$ openocd -f $FPGADIR/PATCH/ulx3s.cfg  -c  "init; svf ulx3s_v20_85f_f32c_selftest_2ws_89mhz.svf ; exit"
Open On-Chip Debugger 0.10.0+dev-00954-gded67990 (2019-10-20-13:21)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
Info : clock speed 1000 kHz
Info : JTAG tap: lfe5um85.tap tap/device found: 0x01113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x0)
Warn : JTAG tap: lfe5um85.tap       UNEXPECTED: 0x01113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x0)
Error: JTAG tap: lfe5um85.tap  expected 1 of 1: 0x41113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x4)
Error: Trying to use configured scan chain anyway...
Error: lfe5um85.tap: IR capture error; saw 0x1 not 0x5
Warn : Bypassing JTAG setup events due to errors
Warn : gdb services need one or more targets defined
svf processing file: "ulx3s_v20_85f_f32c_selftest_2ws_89mhz.svf"
HDR	0;
HIR	0;
TDR	0;
TIR	0;
ENDDR	DRPAUSE;
ENDIR	IRPAUSE;
STATE	IDLE;
SIR	8	TDI  (E0);
		MASK (FFFFFFFF);
SIR	8	TDI  (1C);
			 FFFFFFFFFFFFFFFFFFFFFFFFFFFF);
SIR	8	TDI  (C6);
SDR	8	TDI  (00);
RUNTEST	IDLE	2 TCK	1.00E-02 SEC;
SIR	8	TDI  (3C);
RUNTEST	IDLE	2 TCK	1.00E-03 SEC;
		MASK (00024040);
SIR	8	TDI  (0E);
SDR	8	TDI  (01);
RUNTEST	IDLE	2 TCK	2.00E-01 SEC;
SIR	8	TDI  (3C);
		MASK (0000B000);
SIR	8	TDI  (46);
SDR	8	TDI  (01);
RUNTEST	IDLE	2 TCK	1.00E-02 SEC;
SIR	8	TDI  (7A);
			 FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF);
			 006200000000000000FFDBC000000000000000000000005000000000000000FF23C3000000C80000);

...

			 000000000000000000FFE4E400000000000000000000000000000000000044FF0024000000000000);
			 00000000000000FF0024000000000000000000000000000000000000FF0024000000000000000000);
Error: tdo check error at line 51
Error:     READ = 0x1113043
Error:     WANT = 0x41113043
Error:     MASK = 0xffffffff
Error: fail to run command at line 12527
Error: tdo check error at line 51
Error:     READ = 0x1113043
Error:     WANT = 0x41113043
Error:     MASK = 0xffffffff
Time used: 0m21s943ms 
svf file programmed failed

Note, I have been able to program .svf files I created with nextpnr on this board with openocd, but I haven't been able to flash any of the pre-made .svf.

If I try to program the SVF file in that directory: <pre> $ openocd -f $FPGADIR/PATCH/ulx3s.cfg -c "init; svf ulx3s_v20_85f_f32c_selftest_2ws_89mhz.svf ; exit" Open On-Chip Debugger 0.10.0+dev-00954-gded67990 (2019-10-20-13:21) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html Info : only one transport option; autoselect 'jtag' Info : clock speed 1000 kHz Info : JTAG tap: lfe5um85.tap tap/device found: 0x01113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x0) Warn : JTAG tap: lfe5um85.tap UNEXPECTED: 0x01113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x0) Error: JTAG tap: lfe5um85.tap expected 1 of 1: 0x41113043 (mfg: 0x021 (Lattice Semi.), part: 0x1113, ver: 0x4) Error: Trying to use configured scan chain anyway... Error: lfe5um85.tap: IR capture error; saw 0x1 not 0x5 Warn : Bypassing JTAG setup events due to errors Warn : gdb services need one or more targets defined svf processing file: "ulx3s_v20_85f_f32c_selftest_2ws_89mhz.svf" HDR 0; HIR 0; TDR 0; TIR 0; ENDDR DRPAUSE; ENDIR IRPAUSE; STATE IDLE; SIR 8 TDI (E0); MASK (FFFFFFFF); SIR 8 TDI (1C); FFFFFFFFFFFFFFFFFFFFFFFFFFFF); SIR 8 TDI (C6); SDR 8 TDI (00); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (3C); RUNTEST IDLE 2 TCK 1.00E-03 SEC; MASK (00024040); SIR 8 TDI (0E); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 2.00E-01 SEC; SIR 8 TDI (3C); MASK (0000B000); SIR 8 TDI (46); SDR 8 TDI (01); RUNTEST IDLE 2 TCK 1.00E-02 SEC; SIR 8 TDI (7A); FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF); 006200000000000000FFDBC000000000000000000000005000000000000000FF23C3000000C80000); ... 000000000000000000FFE4E400000000000000000000000000000000000044FF0024000000000000); 00000000000000FF0024000000000000000000000000000000000000FF0024000000000000000000); Error: tdo check error at line 51 Error: READ = 0x1113043 Error: WANT = 0x41113043 Error: MASK = 0xffffffff Error: fail to run command at line 12527 Error: tdo check error at line 51 Error: READ = 0x1113043 Error: WANT = 0x41113043 Error: MASK = 0xffffffff Time used: 0m21s943ms svf file programmed failed </pre> Note, I have been able to program `.svf` files I created with nextpnr on this board with openocd, but I haven't been able to flash any of the pre-made .svf.
Ghost commented 5 years ago

Yes, all we need to do is recompile or unpack, and pack with your ID -- I will check with EMARD can he recompile with you ID ...

Yes, all we need to do is recompile or unpack, and pack with your ID -- I will check with EMARD can he recompile with you ID ...
Ghost commented 5 years ago

If you got ujprog working you can try with EMARD version

https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32c-85k-vector-v20/ulx3s_v20_m85f_f32c_selftest_2ws_89mhz.bit

uploading bitstream
ujprog f32c-85k-vector-v20/ulx3s_v20_m85f_f32c_selftest_2ws_89mhz.bit

Sending fw to f32c
f32cup.py f32c-bin/selftest-mcp7940n.bin

f32cup.py is here:
https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32cup.py

If you got ujprog working you can try with EMARD version https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32c-85k-vector-v20/ulx3s_v20_m85f_f32c_selftest_2ws_89mhz.bit uploading bitstream ujprog f32c-85k-vector-v20/ulx3s_v20_m85f_f32c_selftest_2ws_89mhz.bit Sending fw to f32c f32cup.py f32c-bin/selftest-mcp7940n.bin f32cup.py is here: https://github.com/emard/ulx3s-bin/blob/master/fpga/f32c/f32cup.py
jebba commented 5 years ago
Poster
Owner

This works. See comments in #30, #35, #36.

Not tested with battery. See #39 for battery test.

This works. See comments in #30, #35, #36. Not tested with battery. See #39 for battery test.
jebba closed this issue 5 years ago
jebba commented 5 years ago
Poster
Owner

Hold down P1 for a few secs during self test and the clock will start.

Both boards PASS.

Hold down P1 for a few secs during self test and the clock will start. Both boards PASS.
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Reference: forksand/fs-ulx3s#32
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