# SAM3XA ADC

## Analog-to-digital Converter (ADC) User Interface

### Registers

Register Mapping
Address | Register | Name | Access | Reset
--- | --- | --- | --- | ---
0x400C0000 | Control Register | ADC_CR | write-only | -
0x400C0004 | Mode Register | ADC_MR | read-write | 0x00000000
0x400C0008 | Channel Sequence Register 1 | ADC_SEQR1 | read-write | 0x00000000
0x400C000C | Channel Sequence Register 2 | ADC_SEQR2 | read-write | 0x00000000
0x400C0010 | Channel Enable Register | ADC_CHER | write-only | -
0x400C0014 | Channel Disable Register | ADC_CHDR | write-only | -
0x400C0018 | Channel Status Register | ADC_CHSR | read-only | 0x00000000
0x400C0020 | Last Converted Data Register | ADC_LCDR | read-only | 0x00000000
0x400C0024 | Interrupt Enable Register | ADC_IER | write-only | -
0x400C0028 | Interrupt Disable Register | ADC_IDR | write-only | -
0x400C002C | Interrupt Mask Register | ADC_IMR | read-only | 0x00000000
0x400C0030 | Interrupt Status Register | ADC_ISR | read-only | 0x00000000
0x400C003C | Overrun Status Register | ADC_OVER | read-only | 0x00000000
0x400C0040 | Extended Mode Register | ADC_EMR | read-write | 0x00000000
0x400C0044 | Compare Window Register | ADC_CWR | read-write | 0x00000000
0x400C0048 | Channel Gain Register | ADC_CGR | read-write | 0x00000000
0x400C004C | Channel Offset Register | ADC_COR | read-write | 0x00000000
0x400C0050 | Channel Data Register | ADC_CDR[16] | read-only | 0x0
0x400C0094 | Analog Control Register | ADC_ACR | read-write | 0x00000100
0x400C00E4 | Write Protect Mode Register | ADC_WPMR | read-write | 0x00000000
0x400C00E8 | Write Protect Status Register | ADC_WPSR | read-only | 0x00000000
0x400C0100 | Receive Pointer Register | ADC_RPR | read-write | 0x00000000
0x400C0104 | Receive Counter Register | ADC_RCR | read-write | 0x00000000
0x400C0110 | Receive Next Pointer Register | ADC_RNPR | read-write | 0x00000000
0x400C0114 | Receive Next Counter Register | ADC_RNCR | read-write | 0x00000000
0x400C0120 | Transfer Control Register | ADC_PTCR | write-only | 0x00000000
0x400C0124 | Transfer Status Register | ADC_PTSR | read-only | 0x00000000

### Register Fields

#### ADC Control Register

Name: ADC_CR

Access: write-only

Address: 0x400C0000

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | START | SWRST

- SWRST: Software Reset

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Resets the ADC simulating a hardware reset.

- START: Start Conversion

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Begins analog-to-digital conversion.

#### ADC Mode Register

Name: ADC_MR

Access: read-write

Address: 0x400C0004

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
USEQ | - | TRANSFER | TRACKTIM
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
ANACH | - | SETTLING | STARTUP
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
PRESCAL
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
FREERUN | FWUP | SLEEP | LOWRES | TRGSEL | TRGEN

- TRGEN: Trigger Enable

  Value | Name | Description
  --- | --- | ---
  0 | DIS | Hardware triggers are disabled. Starting a conversion is only possible by software.
  1 | EN | Hardware trigger selected by TRGSEL field is enabled.

- TRGSEL: Trigger Selection

  Value | Name | Description
  --- | --- | ---
  0x0 | ADC_TRIG0 | External : ADCTRG
  0x1 | ADC_TRIG1 | TIOA Output of the Timer Counter Channel 0
  0x2 | ADC_TRIG2 | TIOA Output of the Timer Counter Channel 1
  0x3 | ADC_TRIG3 | TIOA Output of the Timer Counter Channel 2
  0x4 | ADC_TRIG4 | PWM Event Line 0
  0x5 | ADC_TRIG5 | PWM Event Line 0

- LOWRES: Resolution

  Value | Name | Description
  --- | --- | ---
  0 | BITS_12 | 12-bit resolution
  1 | BITS_10 | 10-bit resolution

- SLEEP: Sleep Mode

  Value | Name | Description
  --- | --- | ---
  0 | NORMAL | Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions
  1 | SLEEP | Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions

- FWUP: Fast Wake Up

  Value | Name | Description
  --- | --- | ---
  0 | OFF | Normal Sleep Mode: The sleep mode is defined by the SLEEP bit
  1 | ON | Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF

- FREERUN: Free Run Mode

  Value | Name | Description
  --- | --- | ---
  0 | OFF | Normal Mode
  1 | ON | Free Run Mode: Never wait for any trigger.

- PRESCAL: Prescaler Rate Selection

-

- STARTUP: Start Up Time

  Value | Name | Description
  --- | --- | ---
  0x0 | SUT0 | 0 periods of ADCClock
  0x1 | SUT8 | 8 periods of ADCClock
  0x2 | SUT16 | 16 periods of ADCClock
  0x3 | SUT24 | 24 periods of ADCClock
  0x4 | SUT64 | 64 periods of ADCClock
  0x5 | SUT80 | 80 periods of ADCClock
  0x6 | SUT96 | 96 periods of ADCClock
  0x7 | SUT112 | 112 periods of ADCClock
  0x8 | SUT512 | 512 periods of ADCClock
  0x9 | SUT576 | 576 periods of ADCClock
  0xA | SUT640 | 640 periods of ADCClock
  0xB | SUT704 | 704 periods of ADCClock
  0xC | SUT768 | 768 periods of ADCClock
  0xD | SUT832 | 832 periods of ADCClock
  0xE | SUT896 | 896 periods of ADCClock
  0xF | SUT960 | 960 periods of ADCClock

- SETTLING: Analog Settling Time

  Value | Name | Description
  --- | --- | ---
  0x0 | AST3 | 3 periods of ADCClock
  0x1 | AST5 | 5 periods of ADCClock
  0x2 | AST9 | 9 periods of ADCClock
  0x3 | AST17 | 17 periods of ADCClock

- ANACH: Analog Change

  Value | Name | Description
  --- | --- | ---
  0 | NONE | No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for all channels
  1 | ALLOWED | Allows different analog settings for each channel. See ADC_CGR and ADC_COR Registers

- TRACKTIM: Tracking Time

-

- TRANSFER: Transfer Period

-

- USEQ: Use Sequence Enable

  Value | Name | Description
  --- | --- | ---
  0 | NUM_ORDER | Normal Mode: The controller converts channels in a simple numeric order.
  1 | REG_ORDER | User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers.

#### ADC Channel Sequence Register 1

Name: ADC_SEQR1

Access: read-write

Address: 0x400C0008

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
USCH8 | USCH7
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
USCH6 | USCH5
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
USCH4 | USCH3
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
USCH2 | USCH1

- USCH1: User Sequence Number 1

-

- USCH2: User Sequence Number 2

-

- USCH3: User Sequence Number 3

-

- USCH4: User Sequence Number 4

-

- USCH5: User Sequence Number 5

-

- USCH6: User Sequence Number 6

-

- USCH7: User Sequence Number 7

-

- USCH8: User Sequence Number 8

-

#### ADC Channel Sequence Register 2

Name: ADC_SEQR2

Access: read-write

Address: 0x400C000C

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
USCH16 | USCH15
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
USCH14 | USCH13
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
USCH12 | USCH11
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
USCH10 | USCH9

- USCH9: User Sequence Number 9

-

- USCH10: User Sequence Number 10

-

- USCH11: User Sequence Number 11

-

- USCH12: User Sequence Number 12

-

- USCH13: User Sequence Number 13

-

- USCH14: User Sequence Number 14

-

- USCH15: User Sequence Number 15

-

- USCH16: User Sequence Number 16

-

#### ADC Channel Enable Register

Name: ADC_CHER

Access: write-only

Address: 0x400C0010

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0

- CH0: Channel 0 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH1: Channel 1 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH2: Channel 2 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH3: Channel 3 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH4: Channel 4 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH5: Channel 5 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH6: Channel 6 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH7: Channel 7 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH8: Channel 8 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH9: Channel 9 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH10: Channel 10 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH11: Channel 11 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH12: Channel 12 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH13: Channel 13 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH14: Channel 14 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

- CH15: Channel 15 Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding channel.

#### ADC Channel Disable Register

Name: ADC_CHDR

Access: write-only

Address: 0x400C0014

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0

- CH0: Channel 0 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH1: Channel 1 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH2: Channel 2 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH3: Channel 3 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH4: Channel 4 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH5: Channel 5 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH6: Channel 6 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH7: Channel 7 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH8: Channel 8 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH9: Channel 9 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH10: Channel 10 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH11: Channel 11 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH12: Channel 12 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH13: Channel 13 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH14: Channel 14 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

- CH15: Channel 15 Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding channel.

#### ADC Channel Status Register

Name: ADC_CHSR

Access: read-only

Address: 0x400C0018

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
CH15 | CH14 | CH13 | CH12 | CH11 | CH10 | CH9 | CH8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
CH7 | CH6 | CH5 | CH4 | CH3 | CH2 | CH1 | CH0

- CH0: Channel 0 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH1: Channel 1 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH2: Channel 2 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH3: Channel 3 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH4: Channel 4 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH5: Channel 5 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH6: Channel 6 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH7: Channel 7 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH8: Channel 8 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH9: Channel 9 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH10: Channel 10 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH11: Channel 11 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH12: Channel 12 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH13: Channel 13 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH14: Channel 14 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

- CH15: Channel 15 Status

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding channel is disabled.
  1 | - | Corresponding channel is enabled.

#### ADC Last Converted Data Register

Name: ADC_LCDR

Access: read-only

Address: 0x400C0020

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
CHNB | LDATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
LDATA

- LDATA: Last Data Converted

-

- CHNB: Channel Number

-

#### ADC Interrupt Enable Register

Name: ADC_IER

Access: write-only

Address: 0x400C0024

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | RXBUFF | ENDRX | COMPE | GOVRE | DRDY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
EOC15 | EOC14 | EOC13 | EOC12 | EOC11 | EOC10 | EOC9 | EOC8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
EOC7 | EOC6 | EOC5 | EOC4 | EOC3 | EOC2 | EOC1 | EOC0

- EOC0: End of Conversion Interrupt Enable 0

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC1: End of Conversion Interrupt Enable 1

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC2: End of Conversion Interrupt Enable 2

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC3: End of Conversion Interrupt Enable 3

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC4: End of Conversion Interrupt Enable 4

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC5: End of Conversion Interrupt Enable 5

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC6: End of Conversion Interrupt Enable 6

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC7: End of Conversion Interrupt Enable 7

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC8: End of Conversion Interrupt Enable 8

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC9: End of Conversion Interrupt Enable 9

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC10: End of Conversion Interrupt Enable 10

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC11: End of Conversion Interrupt Enable 11

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC12: End of Conversion Interrupt Enable 12

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC13: End of Conversion Interrupt Enable 13

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC14: End of Conversion Interrupt Enable 14

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- EOC15: End of Conversion Interrupt Enable 15

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- DRDY: Data Ready Interrupt Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- GOVRE: General Overrun Error Interrupt Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- COMPE: Comparison Event Interrupt Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- ENDRX: End of Receive Buffer Interrupt Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

- RXBUFF: Receive Buffer Full Interrupt Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the corresponding interrupt.

#### ADC Interrupt Disable Register

Name: ADC_IDR

Access: write-only

Address: 0x400C0028

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | RXBUFF | ENDRX | COMPE | GOVRE | DRDY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
EOC15 | EOC14 | EOC13 | EOC12 | EOC11 | EOC10 | EOC9 | EOC8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
EOC7 | EOC6 | EOC5 | EOC4 | EOC3 | EOC2 | EOC1 | EOC0

- EOC0: End of Conversion Interrupt Disable 0

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC1: End of Conversion Interrupt Disable 1

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC2: End of Conversion Interrupt Disable 2

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC3: End of Conversion Interrupt Disable 3

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC4: End of Conversion Interrupt Disable 4

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC5: End of Conversion Interrupt Disable 5

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC6: End of Conversion Interrupt Disable 6

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC7: End of Conversion Interrupt Disable 7

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC8: End of Conversion Interrupt Disable 8

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC9: End of Conversion Interrupt Disable 9

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC10: End of Conversion Interrupt Disable 10

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC11: End of Conversion Interrupt Disable 11

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC12: End of Conversion Interrupt Disable 12

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC13: End of Conversion Interrupt Disable 13

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC14: End of Conversion Interrupt Disable 14

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- EOC15: End of Conversion Interrupt Disable 15

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- DRDY: Data Ready Interrupt Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- GOVRE: General Overrun Error Interrupt Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- COMPE: Comparison Event Interrupt Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- ENDRX: End of Receive Buffer Interrupt Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

- RXBUFF: Receive Buffer Full Interrupt Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the corresponding interrupt.

#### ADC Interrupt Mask Register

Name: ADC_IMR

Access: read-only

Address: 0x400C002C

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | RXBUFF | ENDRX | COMPE | GOVRE | DRDY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
EOC15 | EOC14 | EOC13 | EOC12 | EOC11 | EOC10 | EOC9 | EOC8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
EOC7 | EOC6 | EOC5 | EOC4 | EOC3 | EOC2 | EOC1 | EOC0

- EOC0: End of Conversion Interrupt Mask 0

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC1: End of Conversion Interrupt Mask 1

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC2: End of Conversion Interrupt Mask 2

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC3: End of Conversion Interrupt Mask 3

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC4: End of Conversion Interrupt Mask 4

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC5: End of Conversion Interrupt Mask 5

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC6: End of Conversion Interrupt Mask 6

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC7: End of Conversion Interrupt Mask 7

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC8: End of Conversion Interrupt Mask 8

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC9: End of Conversion Interrupt Mask 9

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC10: End of Conversion Interrupt Mask 10

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC11: End of Conversion Interrupt Mask 11

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC12: End of Conversion Interrupt Mask 12

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC13: End of Conversion Interrupt Mask 13

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC14: End of Conversion Interrupt Mask 14

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- EOC15: End of Conversion Interrupt Mask 15

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- DRDY: Data Ready Interrupt Mask

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- GOVRE: General Overrun Error Interrupt Mask

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- COMPE: Comparison Event Interrupt Mask

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- ENDRX: End of Receive Buffer Interrupt Mask

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

- RXBUFF: Receive Buffer Full Interrupt Mask

  Value | Name | Description
  --- | --- | ---
  0 | - | The corresponding interrupt is disabled.
  1 | - | The corresponding interrupt is enabled.

#### ADC Interrupt Status Register

Name: ADC_ISR

Access: read-only

Address: 0x400C0030

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | RXBUFF | ENDRX | COMPE | GOVRE | DRDY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
EOC15 | EOC14 | EOC13 | EOC12 | EOC11 | EOC10 | EOC9 | EOC8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
EOC7 | EOC6 | EOC5 | EOC4 | EOC3 | EOC2 | EOC1 | EOC0

- EOC0: End of Conversion 0

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC1: End of Conversion 1

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC2: End of Conversion 2

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC3: End of Conversion 3

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC4: End of Conversion 4

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC5: End of Conversion 5

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC6: End of Conversion 6

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC7: End of Conversion 7

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC8: End of Conversion 8

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC9: End of Conversion 9

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC10: End of Conversion 10

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC11: End of Conversion 11

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC12: End of Conversion 12

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC13: End of Conversion 13

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC14: End of Conversion 14

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- EOC15: End of Conversion 15

  Value | Name | Description
  --- | --- | ---
  0 | - | Corresponding analog channel is disabled, or the conversion is not finished. This flag is cleared when reading the cor-responding ADC_CDRx registers.
  1 | - | Corresponding analog channel is enabled and conversion is complete.

- DRDY: Data Ready

  Value | Name | Description
  --- | --- | ---
  0 | - | No data has been converted since the last read of ADC_LCDR.
  1 | - | At least one data has been converted and is available in ADC_LCDR.

- GOVRE: General Overrun Error

  Value | Name | Description
  --- | --- | ---
  0 | - | No General Overrun Error occurred since the last read of ADC_ISR.
  1 | - | At least one General Overrun Error has occurred since the last read of ADC_ISR.

- COMPE: Comparison Error

  Value | Name | Description
  --- | --- | ---
  0 | - | No Comparison Error since the last read of ADC_ISR.
  1 | - | At least one Comparison Error has occurred since the last read of ADC_ISR.

- ENDRX: End of RX Buffer

  Value | Name | Description
  --- | --- | ---
  0 | - | The Receive Counter Register has not reached 0 since the last write in ADC_RCR or ADC_RNCR.
  1 | - | The Receive Counter Register has reached 0 since the last write in ADC_RCR or ADC_RNCR.

- RXBUFF: RX Buffer Full

  Value | Name | Description
  --- | --- | ---
  0 | - | ADC_RCR or ADC_RNCR have a value other than 0.
  1 | - | Both ADC_RCR and ADC_RNCR have a value of 0.

#### ADC Overrun Status Register

Name: ADC_OVER

Access: read-only

Address: 0x400C003C

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
OVRE15 | OVRE14 | OVRE13 | OVRE12 | OVRE11 | OVRE10 | OVRE9 | OVRE8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
OVRE7 | OVRE6 | OVRE5 | OVRE4 | OVRE3 | OVRE2 | OVRE1 | OVRE0

- OVRE0: Overrun Error 0

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE1: Overrun Error 1

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE2: Overrun Error 2

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE3: Overrun Error 3

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE4: Overrun Error 4

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE5: Overrun Error 5

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE6: Overrun Error 6

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE7: Overrun Error 7

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE8: Overrun Error 8

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE9: Overrun Error 9

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE10: Overrun Error 10

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE11: Overrun Error 11

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE12: Overrun Error 12

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE13: Overrun Error 13

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE14: Overrun Error 14

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

- OVRE15: Overrun Error 15

  Value | Name | Description
  --- | --- | ---
  0 | - | No overrun error on the corresponding channel since the last read of ADC_OVER.
  1 | - | There has been an overrun error on the corresponding channel since the last read of ADC_OVER.

#### ADC Extended Mode Register

Name: ADC_EMR

Access: read-write

Address: 0x400C0040

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | TAG
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | CMPFILTER | - | - | CMPALL | -
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
CMPSEL | - | - | CMPMODE

- CMPMODE: Comparison Mode

  Value | Name | Description
  --- | --- | ---
  0x0 | LOW | Generates an event when the converted data is lower than the low threshold of the window.
  0x1 | HIGH | Generates an event when the converted data is higher than the high threshold of the window.
  0x2 | IN | Generates an event when the converted data is in the comparison window.
  0x3 | OUT | Generates an event when the converted data is out of the comparison window.

- CMPSEL: Comparison Selected Channel

-

- CMPALL: Compare All Channels

  Value | Name | Description
  --- | --- | ---
  0 | - | Only channel indicated in CMPSEL field is compared.
  1 | - | All channels are compared.

- CMPFILTER: Compare Event Filtering

-

- TAG: TAG of ADC_LDCR register

  Value | Name | Description
  --- | --- | ---
  0 | - | set CHNB to zero in ADC_LDCR.
  1 | - | append the channel number to the conversion result in ADC_LDCR register.

#### ADC Compare Window Register

Name: ADC_CWR

Access: read-write

Address: 0x400C0044

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | HIGHTHRES
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
HIGHTHRES
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | LOWTHRES
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
LOWTHRES

- LOWTHRES: Low Threshold

-

- HIGHTHRES: High Threshold

-

#### ADC Channel Gain Register

Name: ADC_CGR

Access: read-write

Address: 0x400C0048

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
GAIN15 | GAIN14 | GAIN13 | GAIN12
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
GAIN11 | GAIN10 | GAIN9 | GAIN8
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
GAIN7 | GAIN6 | GAIN5 | GAIN4
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
GAIN3 | GAIN2 | GAIN1 | GAIN0

- GAIN0: Gain for channel 0

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN1: Gain for channel 1

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN2: Gain for channel 2

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN3: Gain for channel 3

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN4: Gain for channel 4

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN5: Gain for channel 5

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN6: Gain for channel 6

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN7: Gain for channel 7

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN8: Gain for channel 8

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN9: Gain for channel 9

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN10: Gain for channel 10

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN11: Gain for channel 11

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN12: Gain for channel 12

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN13: Gain for channel 13

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN14: Gain for channel 14

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

- GAIN15: Gain for channel 15

  Value | Name | Description
  --- | --- | ---
  0x1 | - | 0.5
  0xB | - | 1
  0x66 | - | 2
  0x72 | - | 2

#### ADC Channel Offset Register

Name: ADC_COR

Access: read-write

Address: 0x400C004C

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
DIFF15 | DIFF14 | DIFF13 | DIFF12 | DIFF11 | DIFF10 | DIFF9 | DIFF8
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
DIFF7 | DIFF6 | DIFF5 | DIFF4 | DIFF3 | DIFF2 | DIFF1 | DIFF0
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
OFF15 | OFF14 | OFF13 | OFF12 | OFF11 | OFF10 | OFF9 | OFF8
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
OFF7 | OFF6 | OFF5 | OFF4 | OFF3 | OFF2 | OFF1 | OFF0

- OFF0: Offset for channel 0

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF1: Offset for channel 1

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF2: Offset for channel 2

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF3: Offset for channel 3

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF4: Offset for channel 4

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF5: Offset for channel 5

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF6: Offset for channel 6

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF7: Offset for channel 7

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF8: Offset for channel 8

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF9: Offset for channel 9

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF10: Offset for channel 10

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF11: Offset for channel 11

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF12: Offset for channel 12

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF13: Offset for channel 13

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF14: Offset for channel 14

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- OFF15: Offset for channel 15

  Value | Name | Description
  --- | --- | ---
  0 | - | No Offset.
  1 | - | center the analog signal on Vrefin/2 before the gain scaling. The Offset applied is: (G-1)Vrefin/2

- DIFF0: Differential inputs for channel 0

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF1: Differential inputs for channel 1

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF2: Differential inputs for channel 2

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF3: Differential inputs for channel 3

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF4: Differential inputs for channel 4

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF5: Differential inputs for channel 5

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF6: Differential inputs for channel 6

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF7: Differential inputs for channel 7

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF8: Differential inputs for channel 8

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF9: Differential inputs for channel 9

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF10: Differential inputs for channel 10

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF11: Differential inputs for channel 11

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF12: Differential inputs for channel 12

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF13: Differential inputs for channel 13

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF14: Differential inputs for channel 14

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

- DIFF15: Differential inputs for channel 15

  Value | Name | Description
  --- | --- | ---
  0 | - | Single Ended Mode.
  1 | - | Fully Differential Mode.

#### ADC Channel Data Register

Name: ADC_CDR[0:15]

Access: read-only

Address: 0x400C0050

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
DATA

- DATA: Converted Data

-

#### ADC Analog Control Register

Name: ADC_ACR

Access: read-write

Address: 0x400C0094

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | IBCTL
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | TSON | - | - | - | -

- TSON: Temperature Sensor On

  Value | Name | Description
  --- | --- | ---
  0 | - | temperature sensor is off.
  1 | - | temperature sensor is on.

- IBCTL: ADC Bias Current Control

-

#### ADC Write Protect Mode Register

Name: ADC_WPMR

Access: read-write

Address: 0x400C00E4

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
WPKEY
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
WPKEY
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
WPKEY
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | WPEN

- WPEN: Write Protect Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | Disables the Write Protect if WPKEY corresponds to 0x414443 ("ADC" in ASCII).
  1 | - | Enables the Write Protect if WPKEY corresponds to 0x414443 ("ADC" in ASCII).

- WPKEY: Write Protect KEY

-

#### ADC Write Protect Status Register

Name: ADC_WPSR

Access: read-only

Address: 0x400C00E8

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
WPVSRC
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
WPVSRC
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | WPVS

- WPVS: Write Protect Violation Status

  Value | Name | Description
  --- | --- | ---
  0 | - | No Write Protect Violation has occurred since the last read of the ADC_WPSR register.
  1 | - | A Write Protect Violation has occurred since the last read of the ADC_WPSR register. If this violation is an unauthor-ized attempt to write a protected register, the associated violation is reported into field WPVSRC.

- WPVSRC: Write Protect Violation Source

-

#### ADC Receive Pointer Register

Name: ADC_RPR

Access: read-write

Address: 0x400C0100

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
RXPTR
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
RXPTR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
RXPTR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RXPTR

- RXPTR: Receive Pointer Register

-

#### ADC Receive Counter Register

Name: ADC_RCR

Access: read-write

Address: 0x400C0104

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
RXCTR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RXCTR

- RXCTR: Receive Counter Register

-

#### ADC Receive Next Pointer Register

Name: ADC_RNPR

Access: read-write

Address: 0x400C0110

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
RXNPTR
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
RXNPTR
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
RXNPTR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RXNPTR

- RXNPTR: Receive Next Pointer

-

#### ADC Receive Next Counter Register

Name: ADC_RNCR

Access: read-write

Address: 0x400C0114

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
RXNCTR
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RXNCTR

- RXNCTR: Receive Next Counter

-

#### ADC Transfer Control Register

Name: ADC_PTCR

Access: write-only

Address: 0x400C0120

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | TXTDIS | TXTEN
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | RXTDIS | RXTEN

- RXTEN: Receiver Transfer Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables PDC receiver channel requests if RXTDIS is not set.

- RXTDIS: Receiver Transfer Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the PDC receiver channel requests.

- TXTEN: Transmitter Transfer Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Enables the PDC transmitter channel requests.

- TXTDIS: Transmitter Transfer Disable

  Value | Name | Description
  --- | --- | ---
  0 | - | No effect.
  1 | - | Disables the PDC transmitter channel requests.

#### ADC Transfer Status Register

Name: ADC_PTSR

Access: read-only

Address: 0x400C0124

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24
- | - | - | - | - | - | - | -
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16
- | - | - | - | - | - | - | -
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8
- | - | - | - | - | - | - | TXTEN
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
- | - | - | - | - | - | - | RXTEN

- RXTEN: Receiver Transfer Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | PDC Receiver channel requests are disabled.
  1 | - | PDC Receiver channel requests are enabled.

- TXTEN: Transmitter Transfer Enable

  Value | Name | Description
  --- | --- | ---
  0 | - | PDC Transmitter channel requests are disabled.
  1 | - | PDC Transmitter channel requests are enabled.