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202 lines
5.6 KiB
202 lines
5.6 KiB
/*
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* Copyright (c) 2010 by Cristian Maglie <c.maglie@arduino.cc>
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* Copyright (c) 2014 by Paul Stoffregen <paul@pjrc.com> (Transaction API)
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* Copyright (c) 2014 by Matthijs Kooijman <matthijs@stdin.nl> (SPISettings AVR)
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* Copyright (c) 2014 by Andrew J. Kroll <xxxajk@gmail.com> (atomicity fixes)
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* SPI Master library for arduino.
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of either the GNU General Public License version 2
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* or the GNU Lesser General Public License version 2.1, both as
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* published by the Free Software Foundation.
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*/
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#include "SPI.h"
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SPIClass SPI;
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uint8_t SPIClass::initialized = 0;
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uint8_t SPIClass::interruptMode = 0;
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uint8_t SPIClass::interruptMask = 0;
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uint8_t SPIClass::interruptSave = 0;
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#ifdef SPI_TRANSACTION_MISMATCH_LED
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uint8_t SPIClass::inTransactionFlag = 0;
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#endif
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void SPIClass::begin()
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{
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uint8_t sreg = SREG;
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noInterrupts(); // Protect from a scheduler and prevent transactionBegin
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if (!initialized) {
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// Set SS to high so a connected chip will be "deselected" by default
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uint8_t port = digitalPinToPort(SS);
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uint8_t bit = digitalPinToBitMask(SS);
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volatile uint8_t *reg = portModeRegister(port);
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// if the SS pin is not already configured as an output
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// then set it high (to enable the internal pull-up resistor)
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if(!(*reg & bit)){
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digitalWrite(SS, HIGH);
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}
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// When the SS pin is set as OUTPUT, it can be used as
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// a general purpose output port (it doesn't influence
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// SPI operations).
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pinMode(SS, OUTPUT);
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// Warning: if the SS pin ever becomes a LOW INPUT then SPI
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// automatically switches to Slave, so the data direction of
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// the SS pin MUST be kept as OUTPUT.
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SPCR |= _BV(MSTR);
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SPCR |= _BV(SPE);
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// Set direction register for SCK and MOSI pin.
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// MISO pin automatically overrides to INPUT.
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// By doing this AFTER enabling SPI, we avoid accidentally
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// clocking in a single bit since the lines go directly
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// from "input" to SPI control.
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// http://code.google.com/p/arduino/issues/detail?id=888
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pinMode(SCK, OUTPUT);
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pinMode(MOSI, OUTPUT);
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}
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initialized++; // reference count
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SREG = sreg;
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}
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void SPIClass::end() {
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uint8_t sreg = SREG;
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noInterrupts(); // Protect from a scheduler and prevent transactionBegin
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// Decrease the reference counter
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if (initialized)
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initialized--;
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// If there are no more references disable SPI
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if (!initialized) {
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SPCR &= ~_BV(SPE);
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interruptMode = 0;
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#ifdef SPI_TRANSACTION_MISMATCH_LED
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inTransactionFlag = 0;
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#endif
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}
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SREG = sreg;
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}
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// mapping of interrupt numbers to bits within SPI_AVR_EIMSK
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#if defined(__AVR_ATmega32U4__)
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#define SPI_INT0_MASK (1<<INT0)
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#define SPI_INT1_MASK (1<<INT1)
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#define SPI_INT2_MASK (1<<INT2)
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#define SPI_INT3_MASK (1<<INT3)
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#define SPI_INT4_MASK (1<<INT6)
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#elif defined(__AVR_AT90USB646__) || defined(__AVR_AT90USB1286__)
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#define SPI_INT0_MASK (1<<INT0)
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#define SPI_INT1_MASK (1<<INT1)
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#define SPI_INT2_MASK (1<<INT2)
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#define SPI_INT3_MASK (1<<INT3)
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#define SPI_INT4_MASK (1<<INT4)
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#define SPI_INT5_MASK (1<<INT5)
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#define SPI_INT6_MASK (1<<INT6)
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#define SPI_INT7_MASK (1<<INT7)
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#elif defined(EICRA) && defined(EICRB) && defined(EIMSK)
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#define SPI_INT0_MASK (1<<INT4)
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#define SPI_INT1_MASK (1<<INT5)
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#define SPI_INT2_MASK (1<<INT0)
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#define SPI_INT3_MASK (1<<INT1)
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#define SPI_INT4_MASK (1<<INT2)
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#define SPI_INT5_MASK (1<<INT3)
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#define SPI_INT6_MASK (1<<INT6)
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#define SPI_INT7_MASK (1<<INT7)
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#else
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#ifdef INT0
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#define SPI_INT0_MASK (1<<INT0)
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#endif
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#ifdef INT1
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#define SPI_INT1_MASK (1<<INT1)
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#endif
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#ifdef INT2
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#define SPI_INT2_MASK (1<<INT2)
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#endif
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#endif
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void SPIClass::usingInterrupt(uint8_t interruptNumber)
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{
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uint8_t mask = 0;
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uint8_t sreg = SREG;
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noInterrupts(); // Protect from a scheduler and prevent transactionBegin
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switch (interruptNumber) {
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#ifdef SPI_INT0_MASK
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case 0: mask = SPI_INT0_MASK; break;
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#endif
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#ifdef SPI_INT1_MASK
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case 1: mask = SPI_INT1_MASK; break;
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#endif
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#ifdef SPI_INT2_MASK
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case 2: mask = SPI_INT2_MASK; break;
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#endif
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#ifdef SPI_INT3_MASK
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case 3: mask = SPI_INT3_MASK; break;
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#endif
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#ifdef SPI_INT4_MASK
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case 4: mask = SPI_INT4_MASK; break;
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#endif
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#ifdef SPI_INT5_MASK
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case 5: mask = SPI_INT5_MASK; break;
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#endif
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#ifdef SPI_INT6_MASK
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case 6: mask = SPI_INT6_MASK; break;
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#endif
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#ifdef SPI_INT7_MASK
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case 7: mask = SPI_INT7_MASK; break;
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#endif
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default:
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interruptMode = 2;
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break;
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}
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interruptMask |= mask;
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if (!interruptMode)
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interruptMode = 1;
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SREG = sreg;
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}
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void SPIClass::notUsingInterrupt(uint8_t interruptNumber)
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{
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// Once in mode 2 we can't go back to 0 without a proper reference count
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if (interruptMode == 2)
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return;
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uint8_t mask = 0;
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uint8_t sreg = SREG;
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noInterrupts(); // Protect from a scheduler and prevent transactionBegin
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switch (interruptNumber) {
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#ifdef SPI_INT0_MASK
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case 0: mask = SPI_INT0_MASK; break;
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#endif
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#ifdef SPI_INT1_MASK
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case 1: mask = SPI_INT1_MASK; break;
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#endif
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#ifdef SPI_INT2_MASK
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case 2: mask = SPI_INT2_MASK; break;
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#endif
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#ifdef SPI_INT3_MASK
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case 3: mask = SPI_INT3_MASK; break;
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#endif
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#ifdef SPI_INT4_MASK
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case 4: mask = SPI_INT4_MASK; break;
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#endif
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#ifdef SPI_INT5_MASK
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case 5: mask = SPI_INT5_MASK; break;
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#endif
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#ifdef SPI_INT6_MASK
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case 6: mask = SPI_INT6_MASK; break;
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#endif
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#ifdef SPI_INT7_MASK
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case 7: mask = SPI_INT7_MASK; break;
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#endif
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default:
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break;
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// this case can't be reached
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}
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interruptMask &= ~mask;
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if (!interruptMask)
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interruptMode = 0;
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SREG = sreg;
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}
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