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196 lines
7.1 KiB
196 lines
7.1 KiB
/*
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u8g_dev_t6963_240x64.c
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Tested with Varitronix MGLS240128TZ
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Universal 8bit Graphics Library
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Copyright (c) 2013, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Application Notes for the MGLS 240x128
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www.baso.no/content/pdf/T6963C_Application.pdf
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Hitachi App Notes:
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https://www.sparkfun.com/datasheets/LCD/Monochrome/AN-029-Toshiba_T6963C.pdf
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Notes:
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The font selection pins should generate the 8x8 font.
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For the MGLS240128TZ only FS1 is available on pin 18.
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FS1 must be low to generate the 8x8 font.
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*/
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#include "u8g.h"
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#define WIDTH 240
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#define HEIGHT 64
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#define PAGE_HEIGHT 16
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/*
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http://www.mark-products.com/graphics.htm#240x64%20Pixel%20Format
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*/
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/* text is not used, so settings are not relevant */
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static const uint8_t u8g_dev_t6963_240x64_init_seq[] PROGMEM = {
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_ADR(0), /* data mode */
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U8G_ESC_RST(15), /* do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/
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U8G_ESC_CS(1), /* enable chip */
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U8G_ESC_DLY(50), /* delay 50 ms */
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U8G_ESC_ADR(0), /* data mode */
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0x000, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x021, /* set cursor position */
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U8G_ESC_ADR(0), /* data mode */
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0x000, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x022, /* set offset */
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U8G_ESC_ADR(0), /* data mode */
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0x000, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x040, /* text home */
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U8G_ESC_ADR(0), /* data mode */
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WIDTH/8, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x041, /* text columns */
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U8G_ESC_ADR(0), /* data mode */
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0x000, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x042, /* graphics home */
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U8G_ESC_ADR(0), /* data mode */
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WIDTH/8, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x043, /* graphics columns */
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// mode set
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// 0x080: Internal CG, OR Mode
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// 0x081: Internal CG, EXOR Mode
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// 0x083: Internal CG, AND Mode
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// 0x088: External CG, OR Mode
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// 0x089: External CG, EXOR Mode
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// 0x08B: External CG, AND Mode
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U8G_ESC_ADR(1), /* instruction mode */
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0x080, /* mode register: OR Mode, Internal Character Mode */
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U8G_ESC_ADR(1), /* instruction mode */
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// display mode
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// 0x090: Display off
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// 0x094: Graphic off, text on, cursor off, blink off
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// 0x096: Graphic off, text on, cursor on, blink off
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// 0x097: Graphic off, text on, cursor on, blink on
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// 0x098: Graphic on, text off, cursor off, blink off
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// 0x09a: Graphic on, text off, cursor on, blink off
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// ...
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// 0x09c: Graphic on, text on, cursor off, blink off
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// 0x09f: Graphic on, text on, cursor on, blink on
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0x098, /* mode register: Display Mode, Graphics on, Text off, Cursor off */
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U8G_ESC_ADR(0), /* data mode */
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0x000, /* low byte */
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0x000, /* height byte */
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U8G_ESC_ADR(1), /* instruction mode */
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0x024, /* set adr pointer */
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U8G_ESC_DLY(100), /* delay 100 ms */
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U8G_ESC_ADR(0), /* data mode */
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_END /* end of sequence */
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};
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uint8_t u8g_dev_t6963_240x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_t6963_240x64_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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uint8_t y, i;
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uint16_t disp_ram_adr;
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uint8_t *ptr;
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_SetAddress(u8g, dev, 0); /* data mode */
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u8g_SetChipSelect(u8g, dev, 1);
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y = pb->p.page_y0;
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ptr = pb->buf;
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disp_ram_adr = WIDTH/8;
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disp_ram_adr *= y;
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for( i = 0; i < PAGE_HEIGHT; i ++ )
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{
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u8g_SetAddress(u8g, dev, 0); /* data mode */
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u8g_WriteByte(u8g, dev, disp_ram_adr&255 ); /* address low byte */
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u8g_WriteByte(u8g, dev, disp_ram_adr>>8 ); /* address hight byte */
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u8g_SetAddress(u8g, dev, 1); /* cmd mode */
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u8g_WriteByte(u8g, dev, 0x024 ); /* set adr ptr */
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u8g_WriteSequence(u8g, dev, WIDTH/8, ptr);
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ptr += WIDTH/8;
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disp_ram_adr += WIDTH/8;
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}
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u8g_SetAddress(u8g, dev, 0); /* data mode */
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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}
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return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
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}
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// U8G_PB_DEV(u8g_dev_t6963_240x64_8bit, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_t6963_240x64_fn, U8G_COM_T6963);
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uint8_t u8g_dev_t6963_240x64_2x_bw_buf[WIDTH/8*PAGE_HEIGHT] U8G_NOCOMMON ;
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u8g_pb_t u8g_dev_t6963_240x64_2x_bw_pb = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_t6963_240x64_2x_bw_buf};
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u8g_dev_t u8g_dev_t6963_240x64_8bit = { u8g_dev_t6963_240x64_fn, &u8g_dev_t6963_240x64_2x_bw_pb, U8G_COM_T6963 };
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