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/*
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LUFA Library
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Copyright (C) Dean Camera, 2009.
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dean [at] fourwalledcubicle [dot] com
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www.fourwalledcubicle.com
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*/
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/*
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Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Header file for NVMTarget.c.
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*/
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#ifndef _NVM_TARGET_
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#define _NVM_TARGET_
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/* Includes: */
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <stdbool.h>
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#include <LUFA/Common/Common.h>
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#include "PDIProtocol.h"
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#include "PDITarget.h"
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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#endif
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#endif
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/* Defines: */
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#define NVM_BUSY_TIMEOUT_MS 200
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#define NVM_REG_ADDR0 0x00
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#define NVM_REG_ADDR1 0x01
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#define NVM_REG_ADDR2 0x02
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#define NVM_REG_DAT0 0x04
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#define NVM_REG_DAT1 0x05
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#define NVM_REG_DAT2 0x06
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#define NVM_REG_CMD 0x0A
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#define NVM_REG_CTRLA 0x0B
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#define NVM_REG_CTRLB 0x0C
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#define NVM_REG_INTCTRL 0x0D
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#define NVM_REG_STATUS 0x0F
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#define NVM_REG_LOCKBITS 0x10
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#define NVM_CMD_NOOP 0x00
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#define NVM_CMD_CHIPERASE 0x40
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#define NVM_CMD_READNVM 0x43
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#define NVM_CMD_LOADFLASHPAGEBUFF 0x23
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#define NVM_CMD_ERASEFLASHPAGEBUFF 0x26
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#define NVM_CMD_ERASEFLASHPAGE 0x2B
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#define NVM_CMD_WRITEFLASHPAGE 0x2E
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#define NVM_CMD_ERASEWRITEFLASH 0x2F
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#define NVM_CMD_FLASHCRC 0x78
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#define NVM_CMD_ERASEAPPSEC 0x20
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#define NVM_CMD_ERASEAPPSECPAGE 0x22
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#define NVM_CMD_WRITEAPPSECPAGE 0x24
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#define NVM_CMD_ERASEWRITEAPPSECPAGE 0x25
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#define NVM_CMD_APPCRC 0x38
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#define NVM_CMD_ERASEBOOTSEC 0x68
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#define NVM_CMD_ERASEBOOTSECPAGE 0x2A
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#define NVM_CMD_WRITEBOOTSECPAGE 0x2C
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#define NVM_CMD_ERASEWRITEBOOTSECPAGE 0x2D
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#define NVM_CMD_BOOTCRC 0x39
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#define NVM_CMD_READUSERSIG 0x03
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#define NVM_CMD_ERASEUSERSIG 0x18
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#define NVM_CMD_WRITEUSERSIG 0x1A
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#define NVM_CMD_READCALIBRATION 0x02
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#define NVM_CMD_READFUSE 0x07
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#define NVM_CMD_WRITEFUSE 0x4C
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#define NVM_CMD_WRITELOCK 0x08
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#define NVM_CMD_LOADEEPROMPAGEBUFF 0x33
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#define NVM_CMD_ERASEEEPROMPAGEBUFF 0x36
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#define NVM_CMD_ERASEEEPROM 0x30
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#define NVM_CMD_ERASEEEPROMPAGE 0x32
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#define NVM_CMD_WRITEEEPROMPAGE 0x34
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#define NVM_CMD_ERASEWRITEEEPROMPAGE 0x35
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#define NVM_CMD_READEEPROM 0x06
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/* Function Prototypes: */
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void NVMTarget_SendNVMRegAddress(uint8_t Register);
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void NVMTarget_SendAddress(uint32_t AbsoluteAddress);
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bool NVMTarget_WaitWhileNVMControllerBusy(void);
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bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest);
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bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer);
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bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
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uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize);
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bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);
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#endif
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