|  |  |  | /*
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							|  |  |  | Copyright 2012 Jun Wako <wakojun@gmail.com> | 
					
						
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							|  |  |  | This program is free software: you can redistribute it and/or modify | 
					
						
							|  |  |  | it under the terms of the GNU General Public License as published by | 
					
						
							|  |  |  | the Free Software Foundation, either version 2 of the License, or | 
					
						
							|  |  |  | (at your option) any later version. | 
					
						
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							|  |  |  | This program is distributed in the hope that it will be useful, | 
					
						
							|  |  |  | but WITHOUT ANY WARRANTY; without even the implied warranty of | 
					
						
							|  |  |  | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
					
						
							|  |  |  | GNU General Public License for more details. | 
					
						
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							|  |  |  | You should have received a copy of the GNU General Public License | 
					
						
							|  |  |  | along with this program.  If not, see <http://www.gnu.org/licenses/>.
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							|  |  |  | */ | 
					
						
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							|  |  |  | #ifndef CONFIG_H
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							|  |  |  | #define CONFIG_H
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							|  |  |  | /* USB Device descriptor parameter */ | 
					
						
							|  |  |  | #define VENDOR_ID       0xFEED
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							|  |  |  | #define PRODUCT_ID      0x1111
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							|  |  |  | #define DEVICE_VER      0x0001
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							|  |  |  | #define MANUFACTURER    geekhack
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							|  |  |  | #define PRODUCT         Onekey
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							|  |  |  | #define DESCRIPTION     t.m.k. keyboard firmware for Onekey
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							|  |  |  | /* key matrix size */ | 
					
						
							|  |  |  | #define MATRIX_ROWS 1
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							|  |  |  | #define MATRIX_COLS 1
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							|  |  |  | /* define if matrix has ghost */ | 
					
						
							|  |  |  | //#define MATRIX_HAS_GHOST
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							|  |  |  | /* Set 0 if debouncing isn't needed */ | 
					
						
							|  |  |  | #define DEBOUNCE    5
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							|  |  |  | /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ | 
					
						
							|  |  |  | #define LOCKING_SUPPORT_ENABLE
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							|  |  |  | /* Locking resynchronize hack */ | 
					
						
							|  |  |  | #define LOCKING_RESYNC_ENABLE
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							|  |  |  | /* key combination for command */ | 
					
						
							|  |  |  | #define IS_COMMAND() ( \
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							|  |  |  |     keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \ | 
					
						
							|  |  |  | ) | 
					
						
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							|  |  |  | /*
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							|  |  |  |  * Feature disable options | 
					
						
							|  |  |  |  *  These options are also useful to firmware size reduction. | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | /* disable debug print */ | 
					
						
							|  |  |  | //#define NO_DEBUG
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							|  |  |  | /* disable print */ | 
					
						
							|  |  |  | //#define NO_PRINT
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							|  |  |  | /* disable action features */ | 
					
						
							|  |  |  | //#define NO_ACTION_LAYER
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							|  |  |  | //#define NO_ACTION_TAPPING
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							|  |  |  | //#define NO_ACTION_ONESHOT
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							|  |  |  | //#define NO_ACTION_MACRO
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							|  |  |  | //#define NO_ACTION_FUNCTION
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							|  |  |  | /* PS/2 mouse */ | 
					
						
							|  |  |  | #ifdef PS2_USE_BUSYWAIT
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							|  |  |  | #   define PS2_CLOCK_PORT  PORTD
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							|  |  |  | #   define PS2_CLOCK_PIN   PIND
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							|  |  |  | #   define PS2_CLOCK_DDR   DDRD
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							|  |  |  | #   define PS2_CLOCK_BIT   1
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							|  |  |  | #   define PS2_DATA_PORT   PORTD
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							|  |  |  | #   define PS2_DATA_PIN    PIND
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							|  |  |  | #   define PS2_DATA_DDR    DDRD
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							|  |  |  | #   define PS2_DATA_BIT    2
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							|  |  |  | #endif
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							|  |  |  | /* PS/2 mouse interrupt version */ | 
					
						
							|  |  |  | #ifdef PS2_USE_INT
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							|  |  |  | /* uses INT1 for clock line(ATMega32U4) */ | 
					
						
							|  |  |  | #define PS2_CLOCK_PORT  PORTD
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							|  |  |  | #define PS2_CLOCK_PIN   PIND
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							|  |  |  | #define PS2_CLOCK_DDR   DDRD
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							|  |  |  | #define PS2_CLOCK_BIT   1
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							|  |  |  | #define PS2_DATA_PORT   PORTD
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							|  |  |  | #define PS2_DATA_PIN    PIND
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							|  |  |  | #define PS2_DATA_DDR    DDRD
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							|  |  |  | #define PS2_DATA_BIT    2
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							|  |  |  | #define PS2_INT_INIT()  do {    \
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							|  |  |  |     EICRA |= ((1<<ISC11) |      \ | 
					
						
							|  |  |  |               (0<<ISC10));      \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_INT_ON()  do {      \
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							|  |  |  |     EIMSK |= (1<<INT1);         \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_INT_OFF() do {      \
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							|  |  |  |     EIMSK &= ~(1<<INT1);        \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_INT_VECT    INT1_vect
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							|  |  |  | #endif
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							|  |  |  | /* PS/2 mouse USART version */ | 
					
						
							|  |  |  | #ifdef PS2_USE_USART
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							|  |  |  | #if defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__)
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							|  |  |  | /* XCK for clock line and RXD for data line */ | 
					
						
							|  |  |  | #define PS2_CLOCK_PORT  PORTD
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							|  |  |  | #define PS2_CLOCK_PIN   PIND
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							|  |  |  | #define PS2_CLOCK_DDR   DDRD
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							|  |  |  | #define PS2_CLOCK_BIT   5
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							|  |  |  | #define PS2_DATA_PORT   PORTD
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							|  |  |  | #define PS2_DATA_PIN    PIND
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							|  |  |  | #define PS2_DATA_DDR    DDRD
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							|  |  |  | #define PS2_DATA_BIT    2
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							|  |  |  | /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ | 
					
						
							|  |  |  | /* set DDR of CLOCK as input to be slave */ | 
					
						
							|  |  |  | #define PS2_USART_INIT() do {   \
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							|  |  |  |     PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);   \ | 
					
						
							|  |  |  |     PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);     \ | 
					
						
							|  |  |  |     UCSR1C = ((1 << UMSEL10) |  \ | 
					
						
							|  |  |  |               (3 << UPM10)   |  \ | 
					
						
							|  |  |  |               (0 << USBS1)   |  \ | 
					
						
							|  |  |  |               (3 << UCSZ10)  |  \ | 
					
						
							|  |  |  |               (0 << UCPOL1));   \ | 
					
						
							|  |  |  |     UCSR1A = 0;                 \ | 
					
						
							|  |  |  |     UBRR1H = 0;                 \ | 
					
						
							|  |  |  |     UBRR1L = 0;                 \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_USART_RX_INT_ON() do {  \
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							|  |  |  |     UCSR1B = ((1 << RXCIE1) |       \ | 
					
						
							|  |  |  |               (1 << RXEN1));        \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_USART_RX_POLL_ON() do { \
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							|  |  |  |     UCSR1B = (1 << RXEN1);          \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_USART_OFF() do {    \
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							|  |  |  |     UCSR1C = 0;                 \ | 
					
						
							|  |  |  |     UCSR1B &= ~((1 << RXEN1) |  \ | 
					
						
							|  |  |  |                 (1 << TXEN1));  \ | 
					
						
							|  |  |  | } while (0) | 
					
						
							|  |  |  | #define PS2_USART_RX_READY      (UCSR1A & (1<<RXC1))
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							|  |  |  | #define PS2_USART_RX_DATA       UDR1
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							|  |  |  | #define PS2_USART_ERROR         (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
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							|  |  |  | #define PS2_USART_RX_VECT       USART1_RX_vect
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							|  |  |  | #endif
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							|  |  |  | #endif
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							|  |  |  | #endif
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