You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
107 lines
3.1 KiB
107 lines
3.1 KiB
8 years ago
|
/*
|
||
|
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||
|
|
|
||
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||
|
|
you may not use this file except in compliance with the License.
|
||
|
|
You may obtain a copy of the License at
|
||
|
|
|
||
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
||
|
|
|
||
|
|
Unless required by applicable law or agreed to in writing, software
|
||
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
|
|
See the License for the specific language governing permissions and
|
||
|
|
limitations under the License.
|
||
|
|
*/
|
||
|
|
|
||
|
|
#include "hal.h"
|
||
|
|
|
||
|
|
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||
|
|
/**
|
||
|
|
* @brief PAL setup.
|
||
|
|
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||
|
|
* This variable is used by the HAL when initializing the PAL driver.
|
||
|
|
*/
|
||
|
|
const PALConfig pal_default_config = {
|
||
|
|
#if STM32_HAS_GPIOA
|
||
|
|
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||
|
|
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOB
|
||
|
|
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
||
|
8 years ago
|
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||
|
8 years ago
|
#endif
|
||
|
|
#if STM32_HAS_GPIOC
|
||
|
|
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
||
|
|
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOD
|
||
|
|
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
||
|
|
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOE
|
||
|
|
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
||
|
|
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOF
|
||
|
|
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
||
|
8 years ago
|
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||
|
8 years ago
|
#endif
|
||
|
|
#if STM32_HAS_GPIOG
|
||
|
|
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
||
|
|
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOH
|
||
|
|
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
||
|
|
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||
|
|
#endif
|
||
|
|
#if STM32_HAS_GPIOI
|
||
|
|
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||
|
|
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||
|
|
#endif
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Early initialization code.
|
||
|
|
* @details This initialization must be performed just after stack setup
|
||
|
|
* and before any other initialization.
|
||
|
|
*/
|
||
|
|
void __early_init(void) {
|
||
|
|
|
||
|
|
stm32_clock_init();
|
||
|
|
}
|
||
|
|
|
||
|
|
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||
|
|
/**
|
||
|
|
* @brief MMC_SPI card detection.
|
||
|
|
*/
|
||
|
|
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||
|
|
|
||
|
|
(void)mmcp;
|
||
|
|
/* TODO: Fill the implementation.*/
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief MMC_SPI card write protection detection.
|
||
|
|
*/
|
||
|
|
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||
|
|
|
||
|
|
(void)mmcp;
|
||
|
|
/* TODO: Fill the implementation.*/
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Board-specific initialization code.
|
||
|
|
* @todo Add your board-specific code, if any.
|
||
|
|
*/
|
||
|
|
void boardInit(void) {
|
||
|
8 years ago
|
/* Remap PA11->PA9 and PA12->PA10 for USB
|
||
|
|
*/
|
||
|
|
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGCOMPEN;
|
||
|
|
SYSCFG->CFGR1 |= SYSCFG_CFGR1_PA11_PA12_RMP;
|
||
|
8 years ago
|
}
|