343 lines
7.2 KiB
343 lines
7.2 KiB
9 years ago
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/*
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* light weight WS2812 lib V2.0b
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*
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* Controls WS2811/WS2812/WS2812B RGB-LEDs
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* Author: Tim (cpldcpu@gmail.com)
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*
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* Jan 18th, 2014 v2.0b Initial Version
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* Nov 29th, 2015 v2.3 Added SK6812RGBW support
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*
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8 years ago
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "ws2812.h"
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <util/delay.h>
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#include "debug.h"
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#ifdef RGBW_BB_TWI
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// Port for the I2C
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#define I2C_DDR DDRD
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#define I2C_PIN PIND
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#define I2C_PORT PORTD
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// Pins to be used in the bit banging
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#define I2C_CLK 0
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#define I2C_DAT 1
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#define I2C_DATA_HI()\
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I2C_DDR &= ~ (1 << I2C_DAT);\
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I2C_PORT |= (1 << I2C_DAT);
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#define I2C_DATA_LO()\
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I2C_DDR |= (1 << I2C_DAT);\
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I2C_PORT &= ~ (1 << I2C_DAT);
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#define I2C_CLOCK_HI()\
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I2C_DDR &= ~ (1 << I2C_CLK);\
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I2C_PORT |= (1 << I2C_CLK);
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#define I2C_CLOCK_LO()\
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I2C_DDR |= (1 << I2C_CLK);\
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I2C_PORT &= ~ (1 << I2C_CLK);
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#define I2C_DELAY 1
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void I2C_WriteBit(unsigned char c)
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{
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if (c > 0)
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{
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I2C_DATA_HI();
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}
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else
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{
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I2C_DATA_LO();
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}
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I2C_CLOCK_HI();
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_delay_us(I2C_DELAY);
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I2C_CLOCK_LO();
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_delay_us(I2C_DELAY);
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if (c > 0)
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{
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I2C_DATA_LO();
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}
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_delay_us(I2C_DELAY);
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}
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// Inits bitbanging port, must be called before using the functions below
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//
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void I2C_Init(void)
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{
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I2C_PORT &= ~ ((1 << I2C_DAT) | (1 << I2C_CLK));
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I2C_CLOCK_HI();
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I2C_DATA_HI();
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_delay_us(I2C_DELAY);
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}
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// Send a START Condition
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//
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void I2C_Start(void)
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{
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// set both to high at the same time
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I2C_DDR &= ~ ((1 << I2C_DAT) | (1 << I2C_CLK));
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_delay_us(I2C_DELAY);
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I2C_DATA_LO();
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_delay_us(I2C_DELAY);
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I2C_CLOCK_LO();
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_delay_us(I2C_DELAY);
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}
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// Send a STOP Condition
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//
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void I2C_Stop(void)
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{
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I2C_CLOCK_HI();
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_delay_us(I2C_DELAY);
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I2C_DATA_HI();
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_delay_us(I2C_DELAY);
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}
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// write a byte to the I2C slave device
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//
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unsigned char I2C_Write(unsigned char c)
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{
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for (char i = 0; i < 8; i++)
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{
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I2C_WriteBit(c & 128);
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c <<= 1;
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}
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I2C_WriteBit(0);
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_delay_us(I2C_DELAY);
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_delay_us(I2C_DELAY);
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// _delay_us(I2C_DELAY);
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//return I2C_ReadBit();
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return 0;
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}
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#endif
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// Setleds for standard RGB
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void inline ws2812_setleds(LED_TYPE *ledarray, uint16_t leds)
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{
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// ws2812_setleds_pin(ledarray,leds, _BV(ws2812_pin));
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ws2812_setleds_pin(ledarray,leds, _BV(RGB_DI_PIN & 0xF));
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}
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void inline ws2812_setleds_pin(LED_TYPE *ledarray, uint16_t leds, uint8_t pinmask)
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{
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// ws2812_DDRREG |= pinmask; // Enable DDR
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// new universal format (DDR)
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_SFR_IO8((RGB_DI_PIN >> 4) + 1) |= pinmask;
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ws2812_sendarray_mask((uint8_t*)ledarray,leds+leds+leds,pinmask);
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_delay_us(50);
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}
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// Setleds for SK6812RGBW
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void inline ws2812_setleds_rgbw(LED_TYPE *ledarray, uint16_t leds)
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{
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#ifdef RGBW_BB_TWI
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uint8_t sreg_prev, twcr_prev;
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sreg_prev=SREG;
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twcr_prev=TWCR;
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cli();
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TWCR &= ~(1<<TWEN);
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I2C_Init();
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I2C_Start();
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I2C_Write(0x84);
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uint16_t datlen = leds<<2;
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uint8_t curbyte;
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uint8_t * data = (uint8_t*)ledarray;
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while (datlen--) {
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curbyte=*data++;
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I2C_Write(curbyte);
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}
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I2C_Stop();
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SREG=sreg_prev;
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TWCR=twcr_prev;
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#endif
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// ws2812_DDRREG |= _BV(ws2812_pin); // Enable DDR
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// new universal format (DDR)
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_SFR_IO8((RGB_DI_PIN >> 4) + 1) |= _BV(RGB_DI_PIN & 0xF);
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ws2812_sendarray_mask((uint8_t*)ledarray,leds<<2,_BV(RGB_DI_PIN & 0xF));
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#ifndef RGBW_BB_TWI
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_delay_us(80);
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#endif
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}
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void ws2812_sendarray(uint8_t *data,uint16_t datlen)
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{
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ws2812_sendarray_mask(data,datlen,_BV(RGB_DI_PIN & 0xF));
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}
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/*
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This routine writes an array of bytes with RGB values to the Dataout pin
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using the fast 800kHz clockless WS2811/2812 protocol.
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*/
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// Timing in ns
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#define w_zeropulse 350
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#define w_onepulse 900
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#define w_totalperiod 1250
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// Fixed cycles used by the inner loop
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#define w_fixedlow 2
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#define w_fixedhigh 4
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#define w_fixedtotal 8
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// Insert NOPs to match the timing, if possible
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#define w_zerocycles (((F_CPU/1000)*w_zeropulse )/1000000)
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#define w_onecycles (((F_CPU/1000)*w_onepulse +500000)/1000000)
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#define w_totalcycles (((F_CPU/1000)*w_totalperiod +500000)/1000000)
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// w1 - nops between rising edge and falling edge - low
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#define w1 (w_zerocycles-w_fixedlow)
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// w2 nops between fe low and fe high
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#define w2 (w_onecycles-w_fixedhigh-w1)
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// w3 nops to complete loop
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#define w3 (w_totalcycles-w_fixedtotal-w1-w2)
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#if w1>0
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#define w1_nops w1
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#else
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#define w1_nops 0
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#endif
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// The only critical timing parameter is the minimum pulse length of the "0"
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// Warn or throw error if this timing can not be met with current F_CPU settings.
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#define w_lowtime ((w1_nops+w_fixedlow)*1000000)/(F_CPU/1000)
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#if w_lowtime>550
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#error "Light_ws2812: Sorry, the clock speed is too low. Did you set F_CPU correctly?"
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#elif w_lowtime>450
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#warning "Light_ws2812: The timing is critical and may only work on WS2812B, not on WS2812(S)."
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#warning "Please consider a higher clockspeed, if possible"
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#endif
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#if w2>0
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#define w2_nops w2
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#else
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#define w2_nops 0
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#endif
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#if w3>0
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#define w3_nops w3
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#else
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#define w3_nops 0
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#endif
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#define w_nop1 "nop \n\t"
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#define w_nop2 "rjmp .+0 \n\t"
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#define w_nop4 w_nop2 w_nop2
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#define w_nop8 w_nop4 w_nop4
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#define w_nop16 w_nop8 w_nop8
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void inline ws2812_sendarray_mask(uint8_t *data,uint16_t datlen,uint8_t maskhi)
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{
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uint8_t curbyte,ctr,masklo;
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uint8_t sreg_prev;
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// masklo =~maskhi&ws2812_PORTREG;
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// maskhi |= ws2812_PORTREG;
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masklo =~maskhi&_SFR_IO8((RGB_DI_PIN >> 4) + 2);
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maskhi |= _SFR_IO8((RGB_DI_PIN >> 4) + 2);
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sreg_prev=SREG;
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cli();
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while (datlen--) {
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curbyte=(*data++);
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asm volatile(
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" ldi %0,8 \n\t"
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"loop%=: \n\t"
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" out %2,%3 \n\t" // '1' [01] '0' [01] - re
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#if (w1_nops&1)
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w_nop1
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#endif
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#if (w1_nops&2)
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w_nop2
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#endif
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#if (w1_nops&4)
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w_nop4
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#endif
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#if (w1_nops&8)
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w_nop8
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#endif
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#if (w1_nops&16)
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w_nop16
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#endif
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" sbrs %1,7 \n\t" // '1' [03] '0' [02]
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" out %2,%4 \n\t" // '1' [--] '0' [03] - fe-low
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" lsl %1 \n\t" // '1' [04] '0' [04]
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#if (w2_nops&1)
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w_nop1
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#endif
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#if (w2_nops&2)
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w_nop2
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#endif
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#if (w2_nops&4)
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w_nop4
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#endif
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#if (w2_nops&8)
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w_nop8
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#endif
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#if (w2_nops&16)
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w_nop16
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#endif
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" out %2,%4 \n\t" // '1' [+1] '0' [+1] - fe-high
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#if (w3_nops&1)
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w_nop1
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#endif
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#if (w3_nops&2)
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w_nop2
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#endif
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#if (w3_nops&4)
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w_nop4
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#endif
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#if (w3_nops&8)
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w_nop8
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#endif
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#if (w3_nops&16)
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w_nop16
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#endif
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" dec %0 \n\t" // '1' [+2] '0' [+2]
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" brne loop%=\n\t" // '1' [+3] '0' [+4]
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: "=&d" (ctr)
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9 years ago
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: "r" (curbyte), "I" (_SFR_IO_ADDR(_SFR_IO8((RGB_DI_PIN >> 4) + 2))), "r" (maskhi), "r" (masklo)
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9 years ago
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);
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}
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SREG=sreg_prev;
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}
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