tmk
14 years ago
parent
239bdbf419
commit
47f5d8b545
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/*
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Copyright (c) 2010,2011 Jun WAKO <wakojun@gmail.com>
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This software is licensed with a Modified BSD License.
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All of this is supposed to be Free Software, Open Source, DFSG-free,
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GPL-compatible, and OK to use in both free and proprietary applications.
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Additions and corrections to this file are welcome.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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Primitive PS/2 Library for AVR
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==============================
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Host side is only supported now.
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Synchronous USART is used to receive data by hardware process
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rather than interrupt. During V-USB interrupt runs, CLOCK interrupt
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cannot interpose. In the result it is prone to lost CLOCK edge.
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I/O control
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-----------
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High state is asserted by internal pull-up.
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If you have a signaling problem, you may need to have
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external pull-up resisters on CLOCK and DATA line.
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PS/2 References
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---------------
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http://www.computer-engineering.org/ps2protocol/
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http://www.mcamafia.de/pdf/ibm_hitrc07.pdf
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*/
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/delay.h>
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#include "ps2.h"
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#include "debug.h"
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#if 0
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#define DEBUGP_INIT() do { DDRC = 0xFF; } while (0)
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#define DEBUGP(x) do { PORTC = x; } while (0)
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#else
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#define DEBUGP_INIT()
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#define DEBUGP(x)
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#endif
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#define WAIT(stat, us, err) do { \
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if (!wait_##stat(us)) { \
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ps2_error = err; \
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goto ERROR; \
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} \
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} while (0)
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uint8_t ps2_error = PS2_ERR_NONE;
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static inline void clock_lo(void);
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static inline void clock_hi(void);
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static inline bool clock_in(void);
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static inline void data_lo(void);
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static inline void data_hi(void);
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static inline bool data_in(void);
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static inline uint16_t wait_clock_lo(uint16_t us);
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static inline uint16_t wait_clock_hi(uint16_t us);
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static inline uint16_t wait_data_lo(uint16_t us);
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static inline uint16_t wait_data_hi(uint16_t us);
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static inline void idle(void);
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static inline void inhibit(void);
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#if defined PS2_USE_INT || defined PS2_USE_USART
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static inline uint8_t pbuf_dequeue(void);
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static inline void pbuf_enqueue(uint8_t data);
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#endif
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void ps2_host_init(void)
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{
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DEBUGP_INIT();
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DEBUGP(0x1);
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idle();
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PS2_USART_INIT();
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PS2_USART_RX_INT_ON();
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}
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uint8_t ps2_host_send(uint8_t data)
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{
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uint8_t res = 0;
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bool parity = true;
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ps2_error = PS2_ERR_NONE;
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DEBUGP(0x6);
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PS2_USART_OFF();
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/* terminate a transmission if we have */
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inhibit();
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_delay_us(100);
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/* start bit [1] */
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data_lo();
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clock_hi();
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WAIT(clock_lo, 15000, 1);
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/* data [2-9] */
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for (uint8_t i = 0; i < 8; i++) {
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_delay_us(15);
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if (data&(1<<i)) {
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parity = !parity;
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data_hi();
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} else {
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data_lo();
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}
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WAIT(clock_hi, 50, 2);
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WAIT(clock_lo, 50, 3);
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}
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/* parity [10] */
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_delay_us(15);
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if (parity) { data_hi(); } else { data_lo(); }
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WAIT(clock_hi, 50, 4);
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WAIT(clock_lo, 50, 5);
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/* stop bit [11] */
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_delay_us(15);
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data_hi();
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/* ack [12] */
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WAIT(data_lo, 50, 6);
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WAIT(clock_lo, 50, 7);
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/* wait for idle state */
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WAIT(clock_hi, 50, 8);
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WAIT(data_hi, 50, 9);
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res = ps2_host_recv_response();
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ERROR:
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idle();
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PS2_USART_INIT();
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PS2_USART_RX_INT_ON();
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return res;
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}
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// Do polling data from keyboard to get response to last command.
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uint8_t ps2_host_recv_response(void)
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{
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uint8_t data = 0;
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PS2_USART_INIT();
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PS2_USART_RX_POLL_ON();
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while (!PS2_USART_RX_READY)
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;
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data = PS2_USART_RX_DATA;
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PS2_USART_OFF();
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DEBUGP(0x9);
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return data;
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}
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uint8_t ps2_host_recv(void)
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{
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return pbuf_dequeue();
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}
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ISR(PS2_USART_RX_VECT)
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{
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DEBUGP(0x7);
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uint8_t error = PS2_USART_ERROR;
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uint8_t data = PS2_USART_RX_DATA;
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if (error) {
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DEBUGP(error>>2);
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} else {
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pbuf_enqueue(data);
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}
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DEBUGP(0x8);
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}
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/* send LED state to keyboard */
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void ps2_host_set_led(uint8_t led)
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{
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// send 0xED then keyboard keeps waiting for next LED data
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// and keyboard does not send any scan codes during waiting.
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// If fail to send LED data keyboard looks like being freezed.
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uint8_t retry = 3;
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while (retry-- && ps2_host_send(PS2_SET_LED) != PS2_ACK)
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;
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retry = 3;
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while (retry-- && ps2_host_send(led) != PS2_ACK)
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;
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}
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/*--------------------------------------------------------------------
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* static functions
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*------------------------------------------------------------------*/
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static inline void clock_lo()
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{
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PS2_CLOCK_PORT &= ~(1<<PS2_CLOCK_BIT);
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PS2_CLOCK_DDR |= (1<<PS2_CLOCK_BIT);
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}
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static inline void clock_hi()
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{
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/* input with pull up */
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PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);
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PS2_CLOCK_PORT |= (1<<PS2_CLOCK_BIT);
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}
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static inline bool clock_in()
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{
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PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT);
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PS2_CLOCK_PORT |= (1<<PS2_CLOCK_BIT);
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_delay_us(1);
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return PS2_CLOCK_PIN&(1<<PS2_CLOCK_BIT);
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}
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static inline void data_lo()
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{
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PS2_DATA_PORT &= ~(1<<PS2_DATA_BIT);
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PS2_DATA_DDR |= (1<<PS2_DATA_BIT);
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}
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static inline void data_hi()
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{
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/* input with pull up */
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PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);
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PS2_DATA_PORT |= (1<<PS2_DATA_BIT);
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}
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static inline bool data_in()
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{
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PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT);
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PS2_DATA_PORT |= (1<<PS2_DATA_BIT);
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_delay_us(1);
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return PS2_DATA_PIN&(1<<PS2_DATA_BIT);
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}
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static inline uint16_t wait_clock_lo(uint16_t us)
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{
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while (clock_in() && us) { asm(""); _delay_us(1); us--; }
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return us;
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}
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static inline uint16_t wait_clock_hi(uint16_t us)
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{
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while (!clock_in() && us) { asm(""); _delay_us(1); us--; }
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return us;
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}
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static inline uint16_t wait_data_lo(uint16_t us)
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{
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while (data_in() && us) { asm(""); _delay_us(1); us--; }
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return us;
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}
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static inline uint16_t wait_data_hi(uint16_t us)
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{
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while (!data_in() && us) { asm(""); _delay_us(1); us--; }
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return us;
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}
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/* idle state that device can send */
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static inline void idle(void)
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{
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clock_hi();
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data_hi();
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}
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/* inhibit device to send */
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static inline void inhibit(void)
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{
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clock_lo();
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data_hi();
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}
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/*--------------------------------------------------------------------
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* Ring buffer to store scan codes from keyboard
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*------------------------------------------------------------------*/
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#define PBUF_SIZE 8
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static uint8_t pbuf[PBUF_SIZE];
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static uint8_t pbuf_head = 0;
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static uint8_t pbuf_tail = 0;
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static inline void pbuf_enqueue(uint8_t data)
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{
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if (!data)
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return;
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uint8_t sreg = SREG;
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cli();
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uint8_t next = (pbuf_head + 1) % PBUF_SIZE;
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if (next != pbuf_tail) {
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pbuf[pbuf_head] = data;
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pbuf_head = next;
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} else {
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debug("pbuf: full\n");
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}
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SREG = sreg;
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}
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static inline uint8_t pbuf_dequeue(void)
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{
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uint8_t val = 0;
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uint8_t sreg = SREG;
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cli();
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if (pbuf_head != pbuf_tail) {
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val = pbuf[pbuf_tail];
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pbuf_tail = (pbuf_tail + 1) % PBUF_SIZE;
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}
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SREG = sreg;
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return val;
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}
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@ -0,0 +1,8 @@
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#include <stdint.h>
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#include "sendchar.h"
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int8_t sendchar(uint8_t c)
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{
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return 1;
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}
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@ -0,0 +1,58 @@
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#include <stdint.h>
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#include "oddebug.h"
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#include "sendchar.h"
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/* from oddebug.h */
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#if defined UBRR
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# define ODDBG_UBRR UBRR
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#elif defined UBRRL
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# define ODDBG_UBRR UBRRL
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#elif defined UBRR0
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# define ODDBG_UBRR UBRR0
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#elif defined UBRR0L
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# define ODDBG_UBRR UBRR0L
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#endif
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#if defined UCR
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# define ODDBG_UCR UCR
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#elif defined UCSRB
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# define ODDBG_UCR UCSRB
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#elif defined UCSR0B
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# define ODDBG_UCR UCSR0B
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#endif
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#if defined TXEN
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# define ODDBG_TXEN TXEN
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#else
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# define ODDBG_TXEN TXEN0
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#endif
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#if defined USR
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# define ODDBG_USR USR
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#elif defined UCSRA
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# define ODDBG_USR UCSRA
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#elif defined UCSR0A
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# define ODDBG_USR UCSR0A
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#endif
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#if defined UDRE
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# define ODDBG_UDRE UDRE
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#else
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# define ODDBG_UDRE UDRE0
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#endif
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#if defined UDR
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# define ODDBG_UDR UDR
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#elif defined UDR0
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# define ODDBG_UDR UDR0
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#endif
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/* from oddebug.c */
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int8_t sendchar(uint8_t c)
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{
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while(!(ODDBG_USR & (1 << ODDBG_UDRE))); /* wait for data register empty */
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ODDBG_UDR = c;
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return 1;
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}
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@ -1,53 +0,0 @@
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/* Name: oddebug.c
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* Project: AVR library
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* Author: Christian Starkjohann
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* Creation Date: 2005-01-16
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* Tabsize: 4
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* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
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* License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
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* This Revision: $Id: oddebug.c 692 2008-11-07 15:07:40Z cs $
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*/
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#include "usart_print.h"
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#include "sendchar.h"
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int8_t sendchar(uint8_t c)
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{
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while(!(ODDBG_USR & (1 << ODDBG_UDRE))); /* wait for data register empty */
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ODDBG_UDR = c;
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return 0;
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}
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void uartPutc(char c)
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{
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while(!(ODDBG_USR & (1 << ODDBG_UDRE))); /* wait for data register empty */
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ODDBG_UDR = c;
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}
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static uchar hexAscii(uchar h)
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{
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h &= 0xf;
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if(h >= 10)
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h += 'a' - (uchar)10 - '0';
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h += '0';
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return h;
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}
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void printHex(uchar c)
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{
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uartPutc(hexAscii(c >> 4));
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uartPutc(hexAscii(c));
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}
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void odDebug(uchar prefix, uchar *data, uchar len)
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{
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printHex(prefix);
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uartPutc(':');
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while(len--){
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uartPutc(' ');
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printHex(*data++);
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||||
}
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uartPutc('\r');
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uartPutc('\n');
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}
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@ -1,121 +0,0 @@
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/* Name: oddebug.h
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||||
* Project: AVR library
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||||
* Author: Christian Starkjohann
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||||
* Creation Date: 2005-01-16
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||||
* Tabsize: 4
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||||
* Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH
|
||||
* License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt)
|
||||
* This Revision: $Id: oddebug.h 692 2008-11-07 15:07:40Z cs $
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||||
*/
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||||
#ifndef __oddebug_h_included__
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#define __oddebug_h_included__
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/*
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General Description:
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||||
This module implements a function for debug logs on the serial line of the
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AVR microcontroller. Debugging can be configured with the define
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'DEBUG_LEVEL'. If this macro is not defined or defined to 0, all debugging
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||||
calls are no-ops. If it is 1, DBG1 logs will appear, but not DBG2. If it is
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2, DBG1 and DBG2 logs will be printed.
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A debug log consists of a label ('prefix') to indicate which debug log created
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the output and a memory block to dump in hex ('data' and 'len').
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||||
*/
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||||
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||||
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||||
#ifndef F_CPU
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# define F_CPU 12000000 /* 12 MHz */
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||||
#endif
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||||
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||||
/* make sure we have the UART defines: */
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||||
#include "usbportability.h"
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||||
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||||
#ifndef uchar
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# define uchar unsigned char
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||||
#endif
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||||
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||||
#if DEBUG_LEVEL > 0 && !(defined TXEN || defined TXEN0) /* no UART in device */
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||||
# warning "Debugging disabled because device has no UART"
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||||
# undef DEBUG_LEVEL
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||||
#endif
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||||
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||||
#ifndef DEBUG_LEVEL
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||||
# define DEBUG_LEVEL 0
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||||
#endif
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||||
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||||
/* ------------------------------------------------------------------------- */
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||||
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#if DEBUG_LEVEL > 0
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# define DBG1(prefix, data, len) odDebug(prefix, data, len)
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#else
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# define DBG1(prefix, data, len)
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||||
#endif
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||||
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||||
#if DEBUG_LEVEL > 1
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# define DBG2(prefix, data, len) odDebug(prefix, data, len)
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#else
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||||
# define DBG2(prefix, data, len)
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#endif
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||||
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||||
/* ------------------------------------------------------------------------- */
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||||
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||||
extern void odDebug(uchar prefix, uchar *data, uchar len);
|
||||
void uartPutc(char c);
|
||||
void printHex(uchar c);
|
||||
|
||||
/* Try to find our control registers; ATMEL likes to rename these */
|
||||
|
||||
#if defined UBRR
|
||||
# define ODDBG_UBRR UBRR
|
||||
#elif defined UBRRL
|
||||
# define ODDBG_UBRR UBRRL
|
||||
#elif defined UBRR0
|
||||
# define ODDBG_UBRR UBRR0
|
||||
#elif defined UBRR0L
|
||||
# define ODDBG_UBRR UBRR0L
|
||||
#endif
|
||||
|
||||
#if defined UCR
|
||||
# define ODDBG_UCR UCR
|
||||
#elif defined UCSRB
|
||||
# define ODDBG_UCR UCSRB
|
||||
#elif defined UCSR0B
|
||||
# define ODDBG_UCR UCSR0B
|
||||
#endif
|
||||
|
||||
#if defined TXEN
|
||||
# define ODDBG_TXEN TXEN
|
||||
#else
|
||||
# define ODDBG_TXEN TXEN0
|
||||
#endif
|
||||
|
||||
#if defined USR
|
||||
# define ODDBG_USR USR
|
||||
#elif defined UCSRA
|
||||
# define ODDBG_USR UCSRA
|
||||
#elif defined UCSR0A
|
||||
# define ODDBG_USR UCSR0A
|
||||
#endif
|
||||
|
||||
#if defined UDRE
|
||||
# define ODDBG_UDRE UDRE
|
||||
#else
|
||||
# define ODDBG_UDRE UDRE0
|
||||
#endif
|
||||
|
||||
#if defined UDR
|
||||
# define ODDBG_UDR UDR
|
||||
#elif defined UDR0
|
||||
# define ODDBG_UDR UDR0
|
||||
#endif
|
||||
|
||||
static inline void odDebugInit(void)
|
||||
{
|
||||
ODDBG_UCR |= (1<<ODDBG_TXEN);
|
||||
ODDBG_UBRR = F_CPU / (57600 * 16L) - 1;
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#endif /* __oddebug_h_included__ */
|
||||
Loading…
Reference in new issue