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@ -40,7 +40,7 @@
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#warning TPI Protocol support is currently incomplete and is not suitable for general use.
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/** Sends the given pointer address to the target's TPI pointer register */
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void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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{
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/* Send the given 16-bit address to the target, LSB first */
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XPROGTarget_SendByte(TPI_CMD_SSTPR | 0);
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@ -49,6 +49,28 @@ void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
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}
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/** Sends a SIN command to the target with the specified I/O address, ready for the data byte to be written.
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*
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* \param Address 6-bit I/O address to write to in the target's I/O memory space
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*/
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static void TINYNVM_SendReadNVMRegister(uint8_t Address)
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{
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/* The TPI command for reading from the I/O space uses wierd addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read.
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*
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* \param Address 6-bit I/O address to read from in the target's I/O memory space
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*/
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static void TINYNVM_SendWriteNVMRegister(uint8_t Address)
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{
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/* The TPI command for writing to the I/O space uses wierd addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
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*
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* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
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@ -78,7 +100,7 @@ bool TINYNVM_WaitWhileNVMControllerBusy(void)
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while (TimeoutMSRemaining)
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{
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/* Send the SIN command to read the TPI STATUS register to see the NVM bus is active */
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XPROGTarget_SendByte(TPI_CMD_SIN | XPROG_Param_NVMCSRRegAddr);
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TINYNVM_SendReadNVMRegister(XPROG_Param_NVMCSRRegAddr);
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if (XPROGTarget_ReceiveByte() & (1 << 7))
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return true;
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}
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@ -101,7 +123,7 @@ bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_
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return false;
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/* Set the NVM control register to the NO OP command for memory reading */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_NOOP);
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/* Send the address of the location to read from */
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@ -132,7 +154,7 @@ bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer
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return false;
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/* Set the NVM control register to the WORD WRITE command for memory reading */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_WORDWRITE);
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/* Send the address of the location to write to */
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@ -159,7 +181,7 @@ bool TINYNVM_EraseMemory(void)
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return false;
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/* Set the NVM control register to the CHIP ERASE command to erase the target */
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XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_CHIPERASE);
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/* Wait until the NVM bus is ready again */
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