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@ -1,5 +1,6 @@
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/*
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Copyright 2011 Jun WAKO <wakojun@gmail.com>
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Copyright 2013 Shay Green <gblargg@gmail.com>
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This software is licensed with a Modified BSD License.
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All of this is supposed to be Free Software, Open Source, DFSG-free,
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@ -43,9 +44,11 @@ POSSIBILITY OF SUCH DAMAGE.
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#include "debug.h"
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static inline void data_lo(void);
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static inline void data_hi(void);
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static inline bool data_in(void);
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// GCC doesn't inline functions normally
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#define data_lo() (ADB_DDR |= (1<<ADB_DATA_BIT))
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#define data_hi() (ADB_DDR &= ~(1<<ADB_DATA_BIT))
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#define data_in() (ADB_PIN & (1<<ADB_DATA_BIT))
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#ifdef ADB_PSW_BIT
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static inline void psw_lo(void);
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static inline void psw_hi(void);
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@ -56,24 +59,17 @@ static inline void attention(void);
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static inline void place_bit0(void);
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static inline void place_bit1(void);
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static inline void send_byte(uint8_t data);
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static inline bool read_bit(void);
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static inline uint8_t read_byte(void);
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static inline uint8_t wait_data_lo(uint16_t us);
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static inline uint8_t wait_data_hi(uint8_t us);
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static inline uint16_t wait_data_lo(uint16_t us);
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static inline uint16_t wait_data_hi(uint16_t us);
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void adb_host_init(void)
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{
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ADB_PORT &= ~(1<<ADB_DATA_BIT);
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data_hi();
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#ifdef ADB_PSW_BIT
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psw_hi();
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#endif
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// Enable keyboard left/right modifier distinction
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// Addr:Keyboard(0010), Cmd:Listen(10), Register3(11)
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// upper byte: reserved bits 0000, device address 0010
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// lower byte: device handler 00000011
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adb_host_listen(0x2B,0x02,0x03);
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}
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#ifdef ADB_PSW_BIT
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@ -91,6 +87,41 @@ bool adb_host_psw(void)
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* <http://geekhack.org/index.php?topic=14290.msg1068919#msg1068919>
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* <http://geekhack.org/index.php?topic=14290.msg1070139#msg1070139>
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*/
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// ADB Bit Cells
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//
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// bit cell time: 70-130us
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// low part of bit0: 60-70% of bit cell
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// low part of bit1: 30-40% of bit cell
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//
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// bit cell time 70us 130us
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// --------------------------------------------
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// low part of bit0 42-49 78-91
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// high part of bit0 21-28 39-52
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// low part of bit1 21-28 39-52
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// high part of bit1 42-49 78-91
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//
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//
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// bit0:
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// 70us bit cell:
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// ____________~~~~~~
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// 42-49 21-28
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//
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// 130us bit cell:
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// ____________~~~~~~
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// 78-91 39-52
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//
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// bit1:
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// 70us bit cell:
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// ______~~~~~~~~~~~~
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// 21-28 42-49
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//
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// 130us bit cell:
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// ______~~~~~~~~~~~~
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// 39-52 78-91
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//
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// [from Apple IIgs Hardware Reference Second Edition]
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uint16_t adb_host_kbd_recv(void)
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{
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uint16_t data = 0;
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@ -100,24 +131,50 @@ uint16_t adb_host_kbd_recv(void)
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if (!wait_data_lo(500)) { // Tlt/Stop to Start(140-260us)
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return 0; // No data to send
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}
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if (!read_bit()) { // Startbit(1)
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// Service Request
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dprintf("Startbit ERROR\n");
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return -2;
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}
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// ad hoc fix: without block inerrupt read wrong bit occasionally and get keys stuck
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cli();
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data = read_byte();
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data = (data<<8) | read_byte();
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uint8_t stop = read_bit(); // Stopbit(0)
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sei();
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// TODO: is this needed anymore with improved timing?
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//cli();
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uint8_t n = 17; // start bit + 16 data bits
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do {
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uint8_t lo = (uint8_t) wait_data_hi(130);
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if (!lo)
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goto error;
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uint8_t hi = (uint8_t) wait_data_lo(lo);
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if (!hi)
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goto error;
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hi = lo - hi;
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lo = 130 - lo;
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data <<= 1;
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if (lo < hi) {
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data |= 1;
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}
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else if (n == 17) {
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// Service Request
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dprintf("Startbit ERROR\n");
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sei();
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return -2;
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}
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}
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while ( --n );
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if (stop) {
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// Stop bit can't be checked normally since it could have service request lenghtening
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// and its high state never goes low.
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if (!wait_data_hi(351) || wait_data_lo(91)) {
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dprintf("Stopbit ERROR\n");
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sei();
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return -3;
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}
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sei();
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return data;
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error:
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dprintf("Bit ERROR\n");
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sei();
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return -4;
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}
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void adb_host_listen(uint8_t cmd, uint8_t data_h, uint8_t data_l)
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@ -142,23 +199,6 @@ void adb_host_kbd_led(uint8_t led)
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}
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static inline void data_lo()
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{
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ADB_DDR |= (1<<ADB_DATA_BIT);
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ADB_PORT &= ~(1<<ADB_DATA_BIT);
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}
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static inline void data_hi()
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{
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ADB_PORT |= (1<<ADB_DATA_BIT);
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ADB_DDR &= ~(1<<ADB_DATA_BIT);
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}
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static inline bool data_in()
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{
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ADB_PORT |= (1<<ADB_DATA_BIT);
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ADB_DDR &= ~(1<<ADB_DATA_BIT);
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return ADB_PIN&(1<<ADB_DATA_BIT);
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}
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#ifdef ADB_PSW_BIT
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static inline void psw_lo()
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{
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@ -181,7 +221,7 @@ static inline bool psw_in()
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static inline void attention(void)
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{
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data_lo();
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_delay_us(700);
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_delay_us(800-35); // bit1 holds lo for 35 more
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place_bit1();
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}
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@ -211,81 +251,27 @@ static inline void send_byte(uint8_t data)
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}
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}
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static inline bool read_bit(void)
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{
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// ADB Bit Cells
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//
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// bit cell time: 70-130us
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// low part of bit0: 60-70% of bit cell
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// low part of bit1: 30-40% of bit cell
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//
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// bit cell time 70us 130us
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// --------------------------------------------
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// low part of bit0 42-49 78-91
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// high part of bit0 21-28 39-52
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// low part of bit1 21-28 39-52
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// high part of bit1 42-49 78-91
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//
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//
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// bit0:
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// 70us bit cell:
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// ____________~~~~~~
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// 42-49 21-28
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//
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// 130us bit cell:
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// ____________~~~~~~
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// 78-91 39-52
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//
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// bit1:
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// 70us bit cell:
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// ______~~~~~~~~~~~~
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// 21-28 42-49
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//
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// 130us bit cell:
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// ______~~~~~~~~~~~~
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// 39-52 78-91
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//
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// read:
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// ________|~~~~~~~~~
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// 55us
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// Read data line after 55us. If data line is low/high then bit is 0/1.
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// This method might not work at <90us bit cell time.
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//
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// [from Apple IIgs Hardware Reference Second Edition]
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bool bit;
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wait_data_lo(75); // wait the start of bit cell at least 130ms(55+0+75)
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_delay_us(55);
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bit = data_in();
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wait_data_hi(36); // wait high part of bit cell at least 91ms(55+36)
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return bit;
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}
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static inline uint8_t read_byte(void)
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{
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uint8_t data = 0;
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for (int i = 0; i < 8; i++) {
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data <<= 1;
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if (read_bit())
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data = data | 1;
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}
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return data;
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}
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static inline uint8_t wait_data_lo(uint16_t us)
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// These are carefully coded to take 6 cycles of overhead.
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// inline asm approach became too convoluted
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static inline uint16_t wait_data_lo(uint16_t us)
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{
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while (data_in() && us) {
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_delay_us(1);
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us--;
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do {
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if ( !data_in() )
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break;
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_delay_us(1 - (6 * 1000000.0 / F_CPU));
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}
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while ( --us );
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return us;
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}
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static inline uint8_t wait_data_hi(uint8_t us)
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static inline uint16_t wait_data_hi(uint16_t us)
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{
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while (!data_in() && us) {
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_delay_us(1);
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us--;
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do {
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if ( data_in() )
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break;
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_delay_us(1 - (6 * 1000000.0 / F_CPU));
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}
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while ( --us );
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return us;
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}
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