Added support to the AVRISP-MKII project for ISP speeds slower than 125KHz via a new software SPI driver.

Added new SPI_ORDER_* data order masks to the SPI peripheral driver.
pull/1469/head
Dean Camera 14 years ago
parent 9a97f16b07
commit de5b16909a

@ -87,7 +87,7 @@ void SetupHardware(void)
/* Hardware Initialization */
LEDs_Init();
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
Dataflash_Init();
USB_Init();

@ -113,7 +113,7 @@ void SetupHardware(void)
LEDs_Init();
Joystick_Init();
Buttons_Init();
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
Dataflash_Init();
USB_Init();

@ -76,7 +76,7 @@ void SetupHardware(void)
/* Hardware Initialization */
LEDs_Init();
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);
Dataflash_Init();
USB_Init();

@ -97,6 +97,15 @@
/** SPI data sample mode mask for SPI_Init(). Indicates that the data should sampled on the leading edge. */
#define SPI_SAMPLE_LEADING (0 << CPHA)
/** SPI data sample mode mask for SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
#define SPI_SAMPLE_TRAILING (1 << CPHA)
/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_MSB_FIRST (0 << DORD)
/** SPI data order mask for SPI_Init(). Indicates that data should be shifted out MSB first. */
#define SPI_ORDER_LSB_FIRST (1 << DORD)
/** SPI data sample mode mask for SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
#define SPI_SAMPLE_TRAILING (1 << CPHA)
@ -111,7 +120,7 @@
* SPI routines.
*
* \param[in] SPIOptions SPI Options, a mask consisting of one of each of the SPI_SPEED_*,
* SPI_SCK_*, SPI_SAMPLE_* and SPI_MODE_* masks.
* SPI_SCK_*, SPI_SAMPLE_*, SPI_ORDER_* and SPI_MODE_* masks.
*/
static inline void SPI_Init(const uint8_t SPIOptions)
{

@ -18,6 +18,8 @@
* - Added ability to set the serial baud rate via the user's terminal in the XPLAINBridge project
* - Added new LUFA module variables for the different source modules in the core library makefile to simplify project makefiles
* - Added start of a new Test and Measurement class demo (thanks to Peter Lawrence)
* - Added new SPI_ORDER_* data order masks to the SPI peripheral driver
* - Added support to the AVRISP-MKII project for ISP speeds slower than 125KHz via a new software SPI driver
*
* <b>Changed:</b>
* - The RingBuff library code has been replaced in the XPLAINBridge, Benito and USBtoSerial projects with an ultra lightweight

@ -54,7 +54,6 @@
* drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
*
* Note that this design currently has the following limitations:
* - Minimum ISP target clock speed of 500KHz due to hardware SPI module prescaler limitations
* - No reversed/shorted target connector detection and notification
* - A seperate header is required for each of the ISP, PDI and TPI programming protocols that the user wishes to use
*

@ -72,7 +72,7 @@ void ISPProtocol_EnterISPMode(void)
/* Perform execution delay, initialize SPI bus */
ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS);
SPI_Init(ISPTarget_GetSPIPrescalerMask() | SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
ISPTarget_Init();
/* Continuously attempt to synchronize with the target until either the number of attempts specified
* by the host has exceeded, or the the device sends back the expected response values */
@ -86,7 +86,7 @@ void ISPProtocol_EnterISPMode(void)
for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)
{
ISPProtocol_DelayMS(Enter_ISP_Params.ByteDelay);
ResponseBytes[RByte] = SPI_TransferByte(Enter_ISP_Params.EnterProgBytes[RByte]);
ResponseBytes[RByte] = ISPTarget_TransferByte(Enter_ISP_Params.EnterProgBytes[RByte]);
}
/* Check if polling disabled, or if the polled value matches the expected value */
@ -124,7 +124,7 @@ void ISPProtocol_LeaveISPMode(void)
/* Perform pre-exit delay, release the target /RESET, disable the SPI bus and perform the post-exit delay */
ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS);
ISPTarget_ChangeTargetResetLine(false);
SPI_ShutDown();
ISPTarget_ShutDown();
ISPProtocol_DelayMS(Leave_ISP_Params.PostDelayMS);
/* Turn off the synchronous USART to terminate the recovery clock on XCK pin */
@ -204,10 +204,10 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
bool IsOddByte = (CurrentByte & 0x01);
uint8_t ByteToWrite = *(NextWriteByte++);
SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
SPI_SendByte(CurrentAddress >> 8);
SPI_SendByte(CurrentAddress & 0xFF);
SPI_SendByte(ByteToWrite);
ISPTarget_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
ISPTarget_SendByte(CurrentAddress >> 8);
ISPTarget_SendByte(CurrentAddress & 0xFF);
ISPTarget_SendByte(ByteToWrite);
/* AVR FLASH addressing requires us to modify the write command based on if we are writing a high
* or low byte at the current word address */
@ -231,10 +231,10 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
/* If the current page must be committed, send the PROGRAM PAGE command to the target */
if (Write_Memory_Params.ProgrammingMode & PROG_MODE_COMMIT_PAGE_MASK)
{
SPI_SendByte(Write_Memory_Params.ProgrammingCommands[1]);
SPI_SendByte(StartAddress >> 8);
SPI_SendByte(StartAddress & 0xFF);
SPI_SendByte(0x00);
ISPTarget_SendByte(Write_Memory_Params.ProgrammingCommands[1]);
ISPTarget_SendByte(StartAddress >> 8);
ISPTarget_SendByte(StartAddress & 0xFF);
ISPTarget_SendByte(0x00);
/* Check if polling is possible, if not switch to timed delay mode */
if (!(PollAddress))
@ -266,10 +266,10 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
MustLoadExtendedAddress = false;
}
SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
SPI_SendByte(CurrentAddress >> 8);
SPI_SendByte(CurrentAddress & 0xFF);
SPI_SendByte(ByteToWrite);
ISPTarget_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
ISPTarget_SendByte(CurrentAddress >> 8);
ISPTarget_SendByte(CurrentAddress & 0xFF);
ISPTarget_SendByte(ByteToWrite);
/* AVR FLASH addressing requires us to modify the write command based on if we are writing a high
* or low byte at the current word address */
@ -343,10 +343,10 @@ void ISPProtocol_ReadMemory(uint8_t V2Command)
}
/* Read the next byte from the desired memory space in the device */
SPI_SendByte(Read_Memory_Params.ReadMemoryCommand);
SPI_SendByte(CurrentAddress >> 8);
SPI_SendByte(CurrentAddress & 0xFF);
Endpoint_Write_Byte(SPI_ReceiveByte());
ISPTarget_SendByte(Read_Memory_Params.ReadMemoryCommand);
ISPTarget_SendByte(CurrentAddress >> 8);
ISPTarget_SendByte(CurrentAddress & 0xFF);
Endpoint_Write_Byte(ISPTarget_ReceiveByte());
/* Check if the endpoint bank is currently full, if so send the packet */
if (!(Endpoint_IsReadWriteAllowed()))
@ -406,7 +406,7 @@ void ISPProtocol_ChipErase(void)
/* Send the chip erase commands as given by the host to the device */
for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++)
SPI_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);
ISPTarget_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);
/* Use appropriate command completion check as given by the host (delay or busy polling) */
if (!(Erase_Chip_Params.PollMethod))
@ -442,7 +442,7 @@ void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command)
/* Send the Fuse or Lock byte read commands as given by the host to the device, store response */
for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)
ResponseBytes[RByte] = SPI_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);
ResponseBytes[RByte] = ISPTarget_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);
Endpoint_Write_Byte(V2Command);
Endpoint_Write_Byte(STATUS_CMD_OK);
@ -471,7 +471,7 @@ void ISPProtocol_WriteFuseLock(uint8_t V2Command)
/* Send the Fuse or Lock byte program commands as given by the host to the device */
for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++)
SPI_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);
ISPTarget_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);
Endpoint_Write_Byte(V2Command);
Endpoint_Write_Byte(STATUS_CMD_OK);
@ -507,9 +507,9 @@ void ISPProtocol_SPIMulti(void)
while (CurrTxPos < SPI_Multi_Params.RxStartAddr)
{
if (CurrTxPos < SPI_Multi_Params.TxBytes)
SPI_SendByte(SPI_Multi_Params.TxData[CurrTxPos]);
ISPTarget_SendByte(SPI_Multi_Params.TxData[CurrTxPos]);
else
SPI_SendByte(0);
ISPTarget_SendByte(0);
CurrTxPos++;
}
@ -518,9 +518,9 @@ void ISPProtocol_SPIMulti(void)
while (CurrRxPos < SPI_Multi_Params.RxBytes)
{
if (CurrTxPos < SPI_Multi_Params.TxBytes)
Endpoint_Write_Byte(SPI_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));
Endpoint_Write_Byte(ISPTarget_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));
else
Endpoint_Write_Byte(SPI_ReceiveByte());
Endpoint_Write_Byte(ISPTarget_ReceiveByte());
/* Check to see if we have filled the endpoint bank and need to send the packet */
if (!(Endpoint_IsReadWriteAllowed()))

@ -37,7 +37,7 @@
#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
/** List of SPI prescaler masks for possible AVRStudio ISP programming speeds. */
/** List of hardware SPI prescaler masks for possible AVRStudio ISP programming speeds. */
static uint8_t SPIMaskFromSCKDuration[] PROGMEM =
{
#if (F_CPU == 8000000)
@ -61,25 +61,147 @@ static uint8_t SPIMaskFromSCKDuration[] PROGMEM =
#endif
};
/** Converts the given AVR Studio SCK duration parameter (set by a SET PARAM command from the host) to the nearest
* possible SPI clock prescaler mask for passing to the SPI_Init() routine.
*
* \return Nearest SPI prescaler mask for the given SCK frequency
/** Lookup table to convert the slower ISP speeds into a compare value for the software SPI driver. */
static uint16_t TimerCompareFromSCKDuration[] PROGMEM =
{
TIMER_COMP(96386), TIMER_COMP(89888), TIMER_COMP(84211), TIMER_COMP(79208), TIMER_COMP(74767),
TIMER_COMP(70797), TIMER_COMP(67227), TIMER_COMP(64000), TIMER_COMP(61069), TIMER_COMP(58395),
TIMER_COMP(55945), TIMER_COMP(51613), TIMER_COMP(49690), TIMER_COMP(47905), TIMER_COMP(46243),
TIMER_COMP(43244), TIMER_COMP(41885), TIMER_COMP(39409), TIMER_COMP(38278), TIMER_COMP(36200),
TIMER_COMP(34335), TIMER_COMP(32654), TIMER_COMP(31129), TIMER_COMP(29740), TIMER_COMP(28470),
TIMER_COMP(27304), TIMER_COMP(25724), TIMER_COMP(24768), TIMER_COMP(23461), TIMER_COMP(22285),
TIMER_COMP(21221), TIMER_COMP(20254), TIMER_COMP(19371), TIMER_COMP(18562), TIMER_COMP(17583),
TIMER_COMP(16914), TIMER_COMP(16097), TIMER_COMP(15356), TIMER_COMP(14520), TIMER_COMP(13914),
TIMER_COMP(13224), TIMER_COMP(12599), TIMER_COMP(12031), TIMER_COMP(11511), TIMER_COMP(10944),
TIMER_COMP(10431), TIMER_COMP(9963), TIMER_COMP(9468), TIMER_COMP(9081), TIMER_COMP(8612),
TIMER_COMP(8239), TIMER_COMP(7851), TIMER_COMP(7498), TIMER_COMP(7137), TIMER_COMP(6809),
TIMER_COMP(6478), TIMER_COMP(6178), TIMER_COMP(5879), TIMER_COMP(5607), TIMER_COMP(5359),
TIMER_COMP(5093), TIMER_COMP(4870), TIMER_COMP(4633), TIMER_COMP(4418), TIMER_COMP(4209),
TIMER_COMP(4019), TIMER_COMP(3823), TIMER_COMP(3645), TIMER_COMP(3474), TIMER_COMP(3310),
TIMER_COMP(3161), TIMER_COMP(3011), TIMER_COMP(2869), TIMER_COMP(2734), TIMER_COMP(2611),
TIMER_COMP(2484), TIMER_COMP(2369), TIMER_COMP(2257), TIMER_COMP(2152), TIMER_COMP(2052),
TIMER_COMP(1956), TIMER_COMP(1866), TIMER_COMP(1779), TIMER_COMP(1695), TIMER_COMP(1615),
TIMER_COMP(1539), TIMER_COMP(1468), TIMER_COMP(1398), TIMER_COMP(1333), TIMER_COMP(1271),
TIMER_COMP(1212), TIMER_COMP(1155), TIMER_COMP(1101), TIMER_COMP(1049), TIMER_COMP(1000),
TIMER_COMP(953), TIMER_COMP(909), TIMER_COMP(866), TIMER_COMP(826), TIMER_COMP(787),
TIMER_COMP(750), TIMER_COMP(715), TIMER_COMP(682), TIMER_COMP(650), TIMER_COMP(619),
TIMER_COMP(590), TIMER_COMP(563), TIMER_COMP(536), TIMER_COMP(511), TIMER_COMP(487),
TIMER_COMP(465), TIMER_COMP(443), TIMER_COMP(422), TIMER_COMP(402), TIMER_COMP(384),
TIMER_COMP(366), TIMER_COMP(349), TIMER_COMP(332), TIMER_COMP(317), TIMER_COMP(302),
TIMER_COMP(288), TIMER_COMP(274), TIMER_COMP(261), TIMER_COMP(249), TIMER_COMP(238),
TIMER_COMP(226), TIMER_COMP(216), TIMER_COMP(206), TIMER_COMP(196), TIMER_COMP(187),
TIMER_COMP(178), TIMER_COMP(170), TIMER_COMP(162), TIMER_COMP(154), TIMER_COMP(147),
TIMER_COMP(140), TIMER_COMP(134), TIMER_COMP(128), TIMER_COMP(122), TIMER_COMP(116),
TIMER_COMP(111), TIMER_COMP(105), TIMER_COMP(100), TIMER_COMP(95.4), TIMER_COMP(90.9),
TIMER_COMP(86.6), TIMER_COMP(82.6), TIMER_COMP(78.7), TIMER_COMP(75.0), TIMER_COMP(71.5),
TIMER_COMP(68.2), TIMER_COMP(65.0), TIMER_COMP(61.9), TIMER_COMP(59.0), TIMER_COMP(56.3),
TIMER_COMP(53.6), TIMER_COMP(51.1)
};
/** Currently selected SPI driver, either hardware (for fast ISP speeds) or software (for slower ISP speeds). */
bool HardwareSPIMode = true;
/** Software SPI data register for sending and receiving */
volatile uint8_t SoftSPI_Data;
/** Number of bits left to transfer in the software SPI driver */
volatile uint8_t SoftSPI_BitsRemaining;
/** ISR to handle software SPI transmission and reception */
ISR(TIMER1_COMPA_vect, ISR_BLOCK)
{
if (!(PINB & (1 << 1)))
{
if (SoftSPI_Data & 0x80)
PORTB |= (1 << 2);
else
PORTB &= ~(1 << 2);
}
else
{
SoftSPI_Data <<= 1;
if (!(SoftSPI_BitsRemaining--))
TCCR1B = 0;
if (PINB & (1 << 3))
SoftSPI_Data |= 0x01;
}
PORTB ^= (1 << 1);
}
/** Initializes the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
* communication with the attached target.
*/
uint8_t ISPTarget_GetSPIPrescalerMask(void)
void ISPTarget_Init(void)
{
uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
if (SCKDuration >= sizeof(SPIMaskFromSCKDuration))
SCKDuration = (sizeof(SPIMaskFromSCKDuration) - 1);
return pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]);
if (SCKDuration < sizeof(SPIMaskFromSCKDuration))
{
HardwareSPIMode = true;
SPI_Init(pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]) | SPI_ORDER_MSB_FIRST |
SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
}
else
{
HardwareSPIMode = false;
DDRB |= ((1 << 1) | (1 << 2));
PORTB |= ((1 << 0) | (1 << 3));
TIMSK1 = (1 << OCIE1A);
OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
}
}
/** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
* further communications can occur until the driver is re-initialized.
*/
void ISPTarget_ShutDown(void)
{
if (HardwareSPIMode)
{
SPI_ShutDown();
}
else
{
DDRB &= ~((1 << 1) | (1 << 2));
PORTB &= ~((1 << 0) | (1 << 3));
}
}
/** Sends and receives a single byte of data to and from the attached target via software SPI.
*
* \param[in] Byte Byte of data to send to the attached target
*
* \return Received byte of data from the attached target
*/
uint8_t ISPTarget_TransferSoftSPIByte(const uint8_t Byte)
{
SoftSPI_Data = Byte;
SoftSPI_BitsRemaining = 8;
if (SoftSPI_Data & 0x01)
PORTB |= (1 << 2);
else
PORTB &= ~(1 << 2);
TCNT1 = 0;
TCCR1B = ((1 << WGM12) | (1 << CS11));
while (SoftSPI_BitsRemaining && TimeoutTicksRemaining);
TCCR1B = 0;
return SoftSPI_Data;
}
/** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.
* When not asserted, the line is tristated so as not to interfere with normal device operation.
*
* \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise
* \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise
*/
void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)
{
@ -97,14 +219,44 @@ void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)
}
}
/** Waits until the target has completed the last operation, by continuously polling the device's
* BUSY flag until it is cleared, or until the command timeout period has expired.
*
* \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise
*/
uint8_t ISPTarget_WaitWhileTargetBusy(void)
{
do
{
ISPTarget_SendByte(0xF0);
ISPTarget_SendByte(0x00);
ISPTarget_SendByte(0x00);
}
while ((ISPTarget_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
return TimeoutTicksRemaining ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
}
/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
* 64KB boundary. This sends the command with the correct address as indicated by the current address
* pointer variable set by the host when a SET ADDRESS command is issued.
*/
void ISPTarget_LoadExtendedAddress(void)
{
ISPTarget_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
ISPTarget_SendByte(0x00);
ISPTarget_SendByte((CurrentAddress & 0x00FF0000) >> 16);
ISPTarget_SendByte(0x00);
}
/** Waits until the last issued target memory programming command has completed, via the check mode given and using
* the given parameters.
*
* \param[in] ProgrammingMode Programming mode used and completion check to use, a mask of PROG_MODE_* constants
* \param[in] PollAddress Memory address to poll for completion if polling check mode used
* \param[in] PollValue Poll value to check against if polling check mode used
* \param[in] DelayMS Milliseconds to delay before returning if delay check mode used
* \param[in] ReadMemCommand Device low-level READ MEMORY command to send if value check mode used
* \param[in] PollAddress Memory address to poll for completion if polling check mode used
* \param[in] PollValue Poll value to check against if polling check mode used
* \param[in] DelayMS Milliseconds to delay before returning if delay check mode used
* \param[in] ReadMemCommand Device low-level READ MEMORY command to send if value check mode used
*
* \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or
* \ref STATUS_CMD_TOUT otherwise
@ -128,11 +280,11 @@ uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
case PROG_MODE_PAGED_VALUE_MASK:
do
{
SPI_SendByte(ReadMemCommand);
SPI_SendByte(PollAddress >> 8);
SPI_SendByte(PollAddress & 0xFF);
ISPTarget_SendByte(ReadMemCommand);
ISPTarget_SendByte(PollAddress >> 8);
ISPTarget_SendByte(PollAddress & 0xFF);
}
while ((SPI_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
while ((ISPTarget_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
if (!(TimeoutTicksRemaining))
ProgrammingStatus = STATUS_CMD_TOUT;
@ -147,34 +299,4 @@ uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
return ProgrammingStatus;
}
/** Waits until the target has completed the last operation, by continuously polling the device's
* BUSY flag until it is cleared, or until the command timeout period has expired.
*
* \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise
*/
uint8_t ISPTarget_WaitWhileTargetBusy(void)
{
do
{
SPI_SendByte(0xF0);
SPI_SendByte(0x00);
SPI_SendByte(0x00);
}
while ((SPI_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
return TimeoutTicksRemaining ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
}
/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
* 64KB boundary. This sends the command with the correct address as indicated by the current address
* pointer variable set by the host when a SET ADDRESS command is issued.
*/
void ISPTarget_LoadExtendedAddress(void)
{
SPI_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
SPI_SendByte(0x00);
SPI_SendByte((CurrentAddress & 0x00FF0000) >> 16);
SPI_SendByte(0x00);
}
#endif

@ -56,21 +56,68 @@
#endif
/* Macros: */
/** Total number of allowable ISP programming speeds supported by the device. */
#define TOTAL_ISP_PROGRAMMING_SPEEDS 7
/** Low level device command to issue an extended FLASH address, for devices with other 128KB of FLASH. */
#define LOAD_EXTENDED_ADDRESS_CMD 0x4D
/** Macro to convert an ISP frequency to a number of timer clock cycles for the software SPI driver */
#define TIMER_COMP(freq) ((((F_CPU / 8) / freq) / 2) - 1)
/* External Variables: */
extern bool HardwareSPIMode;
/* Function Prototypes: */
uint8_t ISPTarget_GetSPIPrescalerMask(void);
void ISPTarget_Init(void);
void ISPTarget_ShutDown(void);
uint8_t ISPTarget_TransferSoftSPIByte(const uint8_t Byte);
void ISPTarget_ChangeTargetResetLine(const bool ResetTarget);
uint8_t ISPTarget_WaitWhileTargetBusy(void);
void ISPTarget_LoadExtendedAddress(void);
uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
const uint16_t PollAddress,
const uint8_t PollValue,
const uint8_t DelayMS,
const uint8_t ReadMemCommand);
uint8_t ISPTarget_WaitWhileTargetBusy(void);
void ISPTarget_LoadExtendedAddress(void);
/* Inline Functions: */
/** Sends a byte of ISP data to the attached target, using the appropriate SPI hardware or
* software routines depending on the selected ISP speed.
*
* \param[in] Byte Byte of data to send to the attached target
*/
static inline void ISPTarget_SendByte(const uint8_t Byte)
{
if (HardwareSPIMode)
SPI_SendByte(Byte);
else
ISPTarget_TransferSoftSPIByte(Byte);
}
/** Receives a byte of ISP data from the attached target, using the appropriate
* SPI hardware or software routines depending on the selected ISP speed.
*
* \return Received byte of data from the attached target
*/
static inline uint8_t ISPTarget_ReceiveByte(void)
{
if (HardwareSPIMode)
return SPI_ReceiveByte();
else
return ISPTarget_TransferSoftSPIByte(0x00);
}
/** Sends and receives a byte of ISP data to and from the attached target, using the
* appropriate SPI hardware or software routines depending on the selected ISP speed.
*
* \param[in] Byte Byte of data to send to the attached target
*
* \return Received byte of data from the attached target
*/
static inline uint8_t ISPTarget_TransferByte(const uint8_t Byte)
{
if (HardwareSPIMode)
return SPI_TransferByte(Byte);
else
return ISPTarget_TransferSoftSPIByte(Byte);
}
#endif

@ -68,7 +68,7 @@ static ParameterItem_t ParameterTable[] =
{ .ParamID = PARAM_SCK_DURATION,
.ParamPrivileges = PARAM_PRIV_READ | PARAM_PRIV_WRITE,
.ParamValue = (TOTAL_ISP_PROGRAMMING_SPEEDS - 1) },
.ParamValue = 6 },
{ .ParamID = PARAM_RESET_POLARITY,
.ParamPrivileges = PARAM_PRIV_WRITE,

@ -98,12 +98,12 @@
#define XPRG_PARAM_NVMBASE 0x01
#define XPRG_PARAM_EEPPAGESIZE 0x02
#define XPRG_PARAM_NVMCMD_REG 0x03 /* Undocumented, Reverse-engineered */
#define XPRG_PARAM_NVMCSR_REG 0x04 /* Undocumented, Reverse-engineered */
#define XPRG_PARAM_NVMCMD_REG 0x03
#define XPRG_PARAM_NVMCSR_REG 0x04
#define XPRG_PROTOCOL_PDI 0x00
#define XPRG_PROTOCOL_JTAG 0x01
#define XPRG_PROTOCOL_TPI 0x02 /* Undocumented, Reverse-engineered */
#define XPRG_PROTOCOL_TPI 0x02
#define XPRG_PAGEMODE_WRITE (1 << 1)
#define XPRG_PAGEMODE_ERASE (1 << 0)

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