Update Doxygen configuration files to the latest Doxygen version.

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Dean Camera 15 years ago
parent d97db1120b
commit efb6c35778

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@ -10,6 +10,7 @@
*
* The following list indicates what microcontrollers are compatible with this demo.
*
* - AT90USB162 (Teensy 1.0)
* - ATMEGA32U4 (Teensy 2.0)
*
* \section SSec_Info USB Information:

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@ -19,7 +19,7 @@
* - Added new MIDI send buffer flush routines to the MIDI Device and Host mode Class drivers, to flush packed events
*
* <b>Changed:</b>
* - Slowed down bit-banged PDI programming in the AVRISP project slightly to prevent transmission errors
* - Slowed down PDI programming in the AVRISP project to prevent transmission errors
* - Renamed the AVRISP project folder to AVRISP-MKII to reduce confusion
* - Renamed the RESET_LINE_* makefile tokens in the AVRISP MKII Project to AUX_LINE_*, as they are not always used for target
* reset

@ -53,7 +53,7 @@
* This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII
* drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
*
* Note that this design currently has several limitations:
* Note that this design currently has the following limitations:
* - Minimum ISP target clock speed of 500KHz due to hardware SPI module prescaler limitations
* - No reversed/shorted target connector detection and notification
*
@ -62,7 +62,9 @@
* without an ADC converter, VTARGET will report a fixed 5V level at all times.
*
* When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
* XPLAIN's XMEGA AVR, and will enable PDI/TPI only programming support (since ISP mode is not needed).
* XPLAIN's XMEGA AVR, and will enable PDI/TPI only programming support (since ISP mode is not needed). Note that the
* first revision XPLAIN board lacks a bootloader on the AT90USB1287, and thus for this firmware to be loaded, an external
* programmer will be required.
*
* While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more
* of FLASH is required. On 8KB devices, ISP or PDI/TPI programming support can be disabled to reduce program size.

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@ -53,14 +53,14 @@ uint8_t ISPTarget_GetSPIPrescalerMask(void)
SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_64 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
#elif (F_CPU == 16000000)
SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI
SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
#else
#error No SPI prescaler masks for chosen F_CPU speed.
@ -171,7 +171,7 @@ uint8_t ISPTarget_WaitWhileTargetBusy(void)
*/
void ISPTarget_LoadExtendedAddress(void)
{
SPI_SendByte(0x4D);
SPI_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
SPI_SendByte(0x00);
SPI_SendByte((CurrentAddress & 0x00FF0000) >> 16);
SPI_SendByte(0x00);

@ -58,6 +58,8 @@
/** Total number of allowable ISP programming speeds supported by the device */
#define TOTAL_ISP_PROGRAMMING_SPEEDS 7
#define LOAD_EXTENDED_ADDRESS_CMD 0x4D
/* Function Prototypes: */
uint8_t ISPTarget_GetSPIPrescalerMask(void);
void ISPTarget_ChangeTargetResetLine(const bool ResetTarget);

@ -159,7 +159,7 @@ void XPROGTarget_EnableTargetPDI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 1000000UL);
UBRR1 = (F_CPU / 500000UL);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else
@ -201,7 +201,7 @@ void XPROGTarget_EnableTargetTPI(void)
/* Set up the synchronous USART for XMEGA communications -
8 data bits, even parity, 2 stop bits */
UBRR1 = (F_CPU / 1000000UL);
UBRR1 = (F_CPU / 500000UL);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
#else

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