Dean Camera
15 years ago
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/*
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soft_uart
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v0.2
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Copyright John Steggall 2009
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*/
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/*
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Copyright 2009 John Steggall (steggall.j@gmail.com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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#ifndef UART_SOFT_CONF
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#define UART_SOFT_CONF
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#define BITLENGTH 833 // Length of data bit, worked out by F_CPU/desired baud
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#define TXPIN 1 // Port pin TX is connected to
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#define RXPIN 0 // Port pin RX is connected to
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/* PORT setup */
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#define RXPORT 0x09 // RX port selection
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#define TXPORT 0x0B // TX port selection
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#define TXDIR_REG 0x0A // Data direction port for TX pin
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/* RX pin setup */
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#define EXTI_FLAG_REG 0x1C
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#define EXTI_MASK_REG 0x1D
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#define EXTI_MASK_BIT 0
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#define RX_PIN_INT INT0_vect // external interrupt vector for RX pin
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#define RX_INT_vect TIMER3_COMPC_vect // interrupt vector for OCRnC
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#define TX_INT_vect TIMER3_COMPB_vect // interrupt vector for OCRnB
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#define TC_INT_MASK_REG TIMSK3 // interrupt timer mask register for timer(n)
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#define TC_COUNTL TCNT3L // count high register for timer(n)
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#define TC_COUNTH TCNT3H // count low register for timer(n)
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/* Reciever setup */
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#define TC_RX_COMPEN OCIE3C // interrupt enable for OCRnC (RX bit timer)
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#define TC_RX_COMPH OCR3CH // OCRnC compare match high register
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#define TC_RX_COMPL OCR3CL // OCRnC compare match high register
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/* Transmitter setup */
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#define TC_TX_COMPEN OCIE3B // interrupt enable for OCRnB (TX bit timer)
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#define TC_TX_COMPH OCR3BH // OCRnB compare match high register
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#define TC_TX_COMPL OCR3BL // OCRnB compare match low register
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#define TC_CTRLB TCCR3B // timer(n) control register B
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#define TC_INTFLAG_REG 0x18 // timer(n) interupt flag register
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#define TC_TX_IF_BIT OCIE3B // timer(n) interrupt flag bit for OCRnB
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#define TC_RX_IF_BIT OCIE3C // timer(n) interrupt flag bit for OCRnC
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#endif
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