mess around with the length to fix pitches

build_keyboard.mk

@@ -16,6 +16,7 @@ include common.mk
 KEYBOARD_FILESAFE := $(subst /,_,$(KEYBOARD))
 TARGET ?= $(KEYBOARD_FILESAFE)_$(KEYMAP)
 KEYBOARD_OUTPUT := $(BUILD_DIR)/obj_$(KEYBOARD_FILESAFE)
+STM32_PATH := quantum/stm32
 
 # Force expansion
 TARGET := $(TARGET)
@@ -72,6 +73,7 @@ ifneq ("$(wildcard $(KEYBOARD_PATH_1)/)","")
     KEYBOARD_PATHS += $(KEYBOARD_PATH_1)
 endif
 
+
 # Pull in rules.mk files from all our subfolders
 ifneq ("$(wildcard $(KEYBOARD_PATH_5)/rules.mk)","")
     include $(KEYBOARD_PATH_5)/rules.mk
@@ -89,6 +91,58 @@ ifneq ("$(wildcard $(KEYBOARD_PATH_1)/rules.mk)","")
     include $(KEYBOARD_PATH_1)/rules.mk
 endif
 
+
+MAIN_KEYMAP_PATH_1 := $(KEYBOARD_PATH_1)/keymaps/$(KEYMAP)
+MAIN_KEYMAP_PATH_2 := $(KEYBOARD_PATH_2)/keymaps/$(KEYMAP)
+MAIN_KEYMAP_PATH_3 := $(KEYBOARD_PATH_3)/keymaps/$(KEYMAP)
+MAIN_KEYMAP_PATH_4 := $(KEYBOARD_PATH_4)/keymaps/$(KEYMAP)
+MAIN_KEYMAP_PATH_5 := $(KEYBOARD_PATH_5)/keymaps/$(KEYMAP)
+
+ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_5)/keymap.c)","")
+    -include $(MAIN_KEYMAP_PATH_5)/rules.mk
+    KEYMAP_C := $(MAIN_KEYMAP_PATH_5)/keymap.c
+    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_5)
+else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_4)/keymap.c)","")
+    -include $(MAIN_KEYMAP_PATH_4)/rules.mk
+    KEYMAP_C := $(MAIN_KEYMAP_PATH_4)/keymap.c
+    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_4)
+else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_3)/keymap.c)","")
+    -include $(MAIN_KEYMAP_PATH_3)/rules.mk
+    KEYMAP_C := $(MAIN_KEYMAP_PATH_3)/keymap.c
+    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_3)
+else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_2)/keymap.c)","")
+    -include $(MAIN_KEYMAP_PATH_2)/rules.mk
+    KEYMAP_C := $(MAIN_KEYMAP_PATH_2)/keymap.c
+    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_2)
+else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_1)/keymap.c)","")
+    -include $(MAIN_KEYMAP_PATH_1)/rules.mk
+    KEYMAP_C := $(MAIN_KEYMAP_PATH_1)/keymap.c
+    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_1)
+else ifneq ($(LAYOUTS),)
+    include build_layout.mk
+else
+    $(error Could not find keymap)
+    # this state should never be reached
+endif
+
+ifeq ($(strip $(CTPC)), yes)
+  CONVERT_TO_PROTON_C=yes
+endif
+
+ifeq ($(strip $(CONVERT_TO_PROTON_C)), yes)
+    TARGET := $(TARGET)_proton_c
+    include $(STM32_PATH)/proton_c.mk
+    OPT_DEFS += -DCONVERT_TO_PROTON_C
+endif
+
+include quantum/mcu_selection.mk
+
+ifdef MCU_FAMILY
+    OPT_DEFS += -DQMK_STM32
+    KEYBOARD_PATHS += $(STM32_PATH)
+endif
+
+
 # Find all the C source files to be compiled in subfolders.
 KEYBOARD_SRC :=
 
@@ -227,39 +281,6 @@ PROJECT_DEFS := $(OPT_DEFS)
 PROJECT_INC := $(VPATH) $(EXTRAINCDIRS) $(KEYBOARD_PATHS)
 PROJECT_CONFIG := $(CONFIG_H)
 
-MAIN_KEYMAP_PATH_1 := $(KEYBOARD_PATH_1)/keymaps/$(KEYMAP)
-MAIN_KEYMAP_PATH_2 := $(KEYBOARD_PATH_2)/keymaps/$(KEYMAP)
-MAIN_KEYMAP_PATH_3 := $(KEYBOARD_PATH_3)/keymaps/$(KEYMAP)
-MAIN_KEYMAP_PATH_4 := $(KEYBOARD_PATH_4)/keymaps/$(KEYMAP)
-MAIN_KEYMAP_PATH_5 := $(KEYBOARD_PATH_5)/keymaps/$(KEYMAP)
-
-ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_5)/keymap.c)","")
-    -include $(MAIN_KEYMAP_PATH_5)/rules.mk
-    KEYMAP_C := $(MAIN_KEYMAP_PATH_5)/keymap.c
-    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_5)
-else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_4)/keymap.c)","")
-    -include $(MAIN_KEYMAP_PATH_4)/rules.mk
-    KEYMAP_C := $(MAIN_KEYMAP_PATH_4)/keymap.c
-    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_4)
-else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_3)/keymap.c)","")
-    -include $(MAIN_KEYMAP_PATH_3)/rules.mk
-    KEYMAP_C := $(MAIN_KEYMAP_PATH_3)/keymap.c
-    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_3)
-else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_2)/keymap.c)","")
-    -include $(MAIN_KEYMAP_PATH_2)/rules.mk
-    KEYMAP_C := $(MAIN_KEYMAP_PATH_2)/keymap.c
-    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_2)
-else ifneq ("$(wildcard $(MAIN_KEYMAP_PATH_1)/keymap.c)","")
-    -include $(MAIN_KEYMAP_PATH_1)/rules.mk
-    KEYMAP_C := $(MAIN_KEYMAP_PATH_1)/keymap.c
-    KEYMAP_PATH := $(MAIN_KEYMAP_PATH_1)
-else ifneq ($(LAYOUTS),)
-    include build_layout.mk
-else
-    $(error Could not find keymap)
-    # this state should never be reached
-endif
-
 # Userspace setup and definitions
 ifeq ("$(USER_NAME)","")
     USER_NAME := $(KEYMAP)

common_features.mk

@@ -115,7 +115,7 @@ ifeq ($(strip $(RGBLIGHT_ENABLE)), yes)
 endif
 
 RGB_MATRIX_ENABLE ?= no
-VALID_MATRIX_TYPES := yes IS31FL3731 IS31FL3733 custom
+VALID_MATRIX_TYPES := yes IS31FL3731 IS31FL3733 IS31FL3737 custom
 ifneq ($(strip $(RGB_MATRIX_ENABLE)), no)
 ifeq ($(filter $(RGB_MATRIX_ENABLE),$(VALID_MATRIX_TYPES)),)
     $(error RGB_MATRIX_ENABLE="$(RGB_MATRIX_ENABLE)" is not a valid matrix type)
@@ -132,19 +132,26 @@ ifeq ($(strip $(RGB_MATRIX_ENABLE)), yes)
 endif
 
 ifeq ($(strip $(RGB_MATRIX_ENABLE)), IS31FL3731)
-    OPT_DEFS += -DIS31FL3731
+    OPT_DEFS += -DIS31FL3731 -DSTM32_I2C -DHAL_USE_I2C=TRUE
     COMMON_VPATH += $(DRIVER_PATH)/issi
     SRC += is31fl3731.c
     SRC += i2c_master.c
 endif
 
 ifeq ($(strip $(RGB_MATRIX_ENABLE)), IS31FL3733)
-    OPT_DEFS += -DIS31FL3733
+    OPT_DEFS += -DIS31FL3733 -DSTM32_I2C -DHAL_USE_I2C=TRUE
     COMMON_VPATH += $(DRIVER_PATH)/issi
     SRC += is31fl3733.c
     SRC += i2c_master.c
 endif
 
+ifeq ($(strip $(RGB_MATRIX_ENABLE)), IS31FL3737)
+    OPT_DEFS += -DIS31FL3737 -DSTM32_I2C -DHAL_USE_I2C=TRUE
+    COMMON_VPATH += $(DRIVER_PATH)/issi
+    SRC += is31fl3737.c
+    SRC += i2c_master.c
+endif
+
 ifeq ($(strip $(TAP_DANCE_ENABLE)), yes)
     OPT_DEFS += -DTAP_DANCE_ENABLE
     SRC += $(QUANTUM_DIR)/process_keycode/process_tap_dance.c

docs/_sidebar.md

@@ -1,100 +0,0 @@
-* [Complete Newbs Guide](newbs.md)
-  * [Getting Started](newbs_getting_started.md)
-  * [Building Your First Firmware](newbs_building_firmware.md)
-  * [Flashing Firmware](newbs_flashing.md)
-  * [Testing and Debugging](newbs_testing_debugging.md)
-  * [Best Practices](newbs_best_practices.md)
-  * [Learning Resources](newbs_learn_more_resources.md)
-
-* [QMK Basics](README.md)
-  * [QMK Introduction](getting_started_introduction.md)
-  * [Contributing to QMK](contributing.md)
-  * [How to Use Github](getting_started_github.md)
-  * [Getting Help](getting_started_getting_help.md)
-
-* [FAQ](faq.md)
-  * [General FAQ](faq_general.md)
-  * [Build/Compile QMK](faq_build.md)
-  * [Debugging/Troubleshooting QMK](faq_debug.md)
-  * [Keymap](faq_keymap.md)
-
-* Detailed Guides
-  * [Install Build Tools](getting_started_build_tools.md)
-  * [Vagrant Guide](getting_started_vagrant.md)
-  * [Build/Compile Instructions](getting_started_make_guide.md)
-  * [Flashing Firmware](flashing.md)
-  * [Customizing Functionality](custom_quantum_functions.md)
-  * [Keymap Overview](keymap.md)
-
-* [Hardware](hardware.md)
-  * [AVR Processors](hardware_avr.md)
-  * [Drivers](hardware_drivers.md)
-
-* Reference
-  * [Keyboard Guidelines](hardware_keyboard_guidelines.md)
-  * [Config Options](config_options.md)
-  * [Keycodes](keycodes.md)
-  * [Documentation Best Practices](documentation_best_practices.md)
-  * [Documentation Templates](documentation_templates.md)
-  * [Glossary](reference_glossary.md)
-  * [Unit Testing](unit_testing.md)
-  * [Useful Functions](ref_functions.md)
-  * [Configurator Support](reference_configurator_support.md)
-
-* [Features](features.md)
-  * [Basic Keycodes](keycodes_basic.md)
-  * [US ANSI Shifted Keys](keycodes_us_ansi_shifted.md)
-  * [Quantum Keycodes](quantum_keycodes.md)
-  * [Advanced Keycodes](feature_advanced_keycodes.md)
-  * [Audio](feature_audio.md)
-  * [Auto Shift](feature_auto_shift.md)
-  * [Backlight](feature_backlight.md)
-  * [Bluetooth](feature_bluetooth.md)
-  * [Bootmagic](feature_bootmagic.md)
-  * [Combos](feature_combo)
-  * [Command](feature_command.md)
-  * [Dynamic Macros](feature_dynamic_macros.md)
-  * [Encoders](feature_encoders.md)
-  * [Grave Escape](feature_grave_esc.md)
-  * [Key Lock](feature_key_lock.md)
-  * [Layouts](feature_layouts.md)
-  * [Leader Key](feature_leader_key.md)
-  * [Macros](feature_macros.md)
-  * [Mouse Keys](feature_mouse_keys.md)
-  * [One Shot Keys](feature_advanced_keycodes.md#one-shot-keys)
-  * [Pointing Device](feature_pointing_device.md)
-  * [PS/2 Mouse](feature_ps2_mouse.md)
-  * [RGB Lighting](feature_rgblight.md)
-  * [RGB Matrix](feature_rgb_matrix.md)
-  * [Space Cadet Shift](feature_space_cadet_shift.md)
-  * [Space Cadet Shift Enter](feature_space_cadet_shift_enter.md)
-  * [Stenography](feature_stenography.md)
-  * [Swap Hands](feature_swap_hands.md)
-  * [Tap Dance](feature_tap_dance.md)
-  * [Terminal](feature_terminal.md)
-  * [Thermal Printer](feature_thermal_printer.md)
-  * [Unicode](feature_unicode.md)
-  * [Userspace](feature_userspace.md)
-
-* For Makers and Modders
-  * [Hand Wiring Guide](hand_wire.md)
-  * [ISP Flashing Guide](isp_flashing_guide.md)
-  * [ARM Debugging Guide](arm_debugging.md)
-  * [I2C Driver](i2c_driver.md)
-
-* For a Deeper Understanding
-  * [How Keyboards Work](how_keyboards_work.md)
-  * [Understanding QMK](understanding_qmk.md)
-
-* Other Topics
-  * [Using Eclipse with QMK](eclipse.md)
-  * [Support](support.md)
-
-* QMK Internals (In Progress)
-  * [Defines](internals_defines.md)
-  * [Input Callback Reg](internals_input_callback_reg.md)
-  * [Midi Device](internals_midi_device.md)
-  * [Midi Device Setup Process](internals_midi_device_setup_process.md)
-  * [Midi Util](internals_midi_util.md)
-  * [Send Functions](internals_send_functions.md)
-  * [Sysex Tools](internals_sysex_tools.md)

docs/_summary.md

@@ -81,6 +81,8 @@
   * [ISP Flashing Guide](isp_flashing_guide.md)
   * [ARM Debugging Guide](arm_debugging.md)
   * [I2C Driver](i2c_driver.md)
+  * [GPIO Controls](internals_gpio_control.md)
+  * [Proton C Conversion](proton_c_conversion.md)
 
 * For a Deeper Understanding
   * [How Keyboards Work](how_keyboards_work.md)

docs/index.html

@@ -17,7 +17,7 @@
       name: 'QMK Firmware',
       nameLink: 'https://qmk.fm/',
       repo: 'qmk/qmk_firmware',
-      loadSidebar: true,
+      loadSidebar: '_summary.md',
       auto2top: true,
       formatUpdated: '{YYYY}/{MM}/{DD} {HH}:{mm}',
       search: {

docs/proton_c_conversion.md

@@ -0,0 +1,21 @@
+# Converting a board to use the Proton C
+
+If a board currently supported in QMK uses a Pro Micro (or compatible board) and you want to use the Proton C, you can generate the firmware by appending `CONVERT_TO_PROTON_C=yes` (or `CTPC=yes`) to your make argument, like this:
+
+    make 40percentclub/mf68:default CTPC=yes
+
+You can add the same argument to your keymap's `rules.mk`, which will accomplish the same thing.
+
+This exposes the `CONVERT_TO_PROTON_C` flag that you can use in your code with `#ifdef`s, like this:
+
+    #ifdef CONVERT_TO_PROTON_C
+        // Proton C code
+    #else
+        // Pro Micro code
+    #endif
+
+Before being able to compile, you may get some errors about `PORTB/DDRB`, etc not being defined, so you'll need to convert the keyboard's code to use the [GPIO Controls](internals_gpio_control.md) that will work for both ARM and AVR. This shouldn't affect the AVR builds at all.
+
+The Proton C only has one on-board LED (C13), and by default, the TXLED (D5) is mapped to it. If you want the RXLED (B0) mapped to it instead, add this like to your `config.h`:
+
+    #define CONVERT_TO_PROTON_C_RXLED

drivers/boards/GENERIC_STM32_F303XC/board.h

@@ -18,14 +18,14 @@
 #define _BOARD_H_
 
 /*
- * Setup for Clueboard 60% Keyboard
+ * Setup for Generic STM32_F303 Board
  */
 
 /*
  * Board identifier.
  */
 #define BOARD_GENERIC_STM32_F303XC
-#define BOARD_NAME                  "Planck PCB"
+#define BOARD_NAME                  "STM32_F303"
 
 /*
  * Board oscillators-related settings.

drivers/issi/is31fl3737.c

@@ -0,0 +1,252 @@
+/* Copyright 2017 Jason Williams
+ * Copyright 2018 Jack Humbert
+ * Copyright 2018 Yiancar
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifdef __AVR__
+#include <avr/interrupt.h>
+#include <avr/io.h>
+#include <util/delay.h>
+#else
+#include "wait.h"
+#endif
+
+#include <string.h>
+#include "i2c_master.h"
+#include "progmem.h"
+#include "rgb_matrix.h"
+
+// This is a 7-bit address, that gets left-shifted and bit 0
+// set to 0 for write, 1 for read (as per I2C protocol)
+// The address will vary depending on your wiring:
+// 00 <-> GND
+// 01 <-> SCL
+// 10 <-> SDA
+// 11 <-> VCC
+// ADDR1 represents A1:A0 of the 7-bit address.
+// ADDR2 represents A3:A2 of the 7-bit address.
+// The result is: 0b101(ADDR2)(ADDR1)
+#define ISSI_ADDR_DEFAULT 0x50
+
+#define ISSI_COMMANDREGISTER 0xFD
+#define ISSI_COMMANDREGISTER_WRITELOCK 0xFE
+#define ISSI_INTERRUPTMASKREGISTER 0xF0
+#define ISSI_INTERRUPTSTATUSREGISTER 0xF1
+
+#define ISSI_PAGE_LEDCONTROL 0x00 //PG0
+#define ISSI_PAGE_PWM 0x01        //PG1
+#define ISSI_PAGE_AUTOBREATH 0x02 //PG2
+#define ISSI_PAGE_FUNCTION 0x03   //PG3
+
+#define ISSI_REG_CONFIGURATION 0x00 //PG3
+#define ISSI_REG_GLOBALCURRENT 0x01 //PG3
+#define ISSI_REG_RESET 0x11// PG3
+#define ISSI_REG_SWPULLUP 0x0F //PG3
+#define ISSI_REG_CSPULLUP 0x10 //PG3
+
+#ifndef ISSI_TIMEOUT
+  #define ISSI_TIMEOUT 100
+#endif
+
+#ifndef ISSI_PERSISTENCE
+  #define ISSI_PERSISTENCE 0
+#endif
+
+// Transfer buffer for TWITransmitData()
+uint8_t g_twi_transfer_buffer[20];
+
+// These buffers match the IS31FL3737 PWM registers.
+// The control buffers match the PG0 LED On/Off registers.
+// Storing them like this is optimal for I2C transfers to the registers.
+// We could optimize this and take out the unused registers from these
+// buffers and the transfers in IS31FL3737_write_pwm_buffer() but it's
+// probably not worth the extra complexity.
+uint8_t g_pwm_buffer[DRIVER_COUNT][192];
+bool g_pwm_buffer_update_required = false;
+
+uint8_t g_led_control_registers[DRIVER_COUNT][24] = { { 0 } };
+bool g_led_control_registers_update_required = false;
+
+void IS31FL3737_write_register( uint8_t addr, uint8_t reg, uint8_t data )
+{
+    g_twi_transfer_buffer[0] = reg;
+    g_twi_transfer_buffer[1] = data;
+
+  #if ISSI_PERSISTENCE > 0
+    for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
+      if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0)
+        break;
+    }
+  #else
+    i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT);
+  #endif
+}
+
+void IS31FL3737_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer )
+{
+    // assumes PG1 is already selected
+
+    // transmit PWM registers in 12 transfers of 16 bytes
+    // g_twi_transfer_buffer[] is 20 bytes
+
+    // iterate over the pwm_buffer contents at 16 byte intervals
+    for ( int i = 0; i < 192; i += 16 ) {
+        g_twi_transfer_buffer[0] = i;
+        // copy the data from i to i+15
+        // device will auto-increment register for data after the first byte
+        // thus this sets registers 0x00-0x0F, 0x10-0x1F, etc. in one transfer
+        for ( int j = 0; j < 16; j++ ) {
+            g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j];
+        }
+
+    #if ISSI_PERSISTENCE > 0
+      for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) {
+        if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0)
+          break;
+      }
+    #else
+      i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT);
+    #endif
+    }
+}
+
+void IS31FL3737_init( uint8_t addr )
+{
+    // In order to avoid the LEDs being driven with garbage data
+    // in the LED driver's PWM registers, shutdown is enabled last.
+    // Set up the mode and other settings, clear the PWM registers,
+    // then disable software shutdown.
+
+    // Unlock the command register.
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 );
+
+    // Select PG0
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL );
+    // Turn off all LEDs.
+    for ( int i = 0x00; i <= 0x17; i++ )
+    {
+        IS31FL3737_write_register( addr, i, 0x00 );
+    }
+
+    // Unlock the command register.
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 );
+
+    // Select PG1
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM );
+    // Set PWM on all LEDs to 0
+    // No need to setup Breath registers to PWM as that is the default.
+    for ( int i = 0x00; i <= 0xBF; i++ )
+    {
+        IS31FL3737_write_register( addr, i, 0x00 );
+    }
+
+    // Unlock the command register.
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 );
+
+    // Select PG3
+    IS31FL3737_write_register( addr, ISSI_COMMANDREGISTER, ISSI_PAGE_FUNCTION );
+    // Set global current to maximum.
+    IS31FL3737_write_register( addr, ISSI_REG_GLOBALCURRENT, 0xFF );
+    // Disable software shutdown.
+    IS31FL3737_write_register( addr, ISSI_REG_CONFIGURATION, 0x01 );
+
+    // Wait 10ms to ensure the device has woken up.
+    #ifdef __AVR__
+    _delay_ms( 10 );
+    #else
+    wait_ms(10);
+    #endif
+}
+
+void IS31FL3737_set_color( int index, uint8_t red, uint8_t green, uint8_t blue )
+{
+    if ( index >= 0 && index < DRIVER_LED_TOTAL ) {
+        is31_led led = g_is31_leds[index];
+
+        g_pwm_buffer[led.driver][led.r] = red;
+        g_pwm_buffer[led.driver][led.g] = green;
+        g_pwm_buffer[led.driver][led.b] = blue;
+        g_pwm_buffer_update_required = true;
+    }
+}
+
+void IS31FL3737_set_color_all( uint8_t red, uint8_t green, uint8_t blue )
+{
+    for ( int i = 0; i < DRIVER_LED_TOTAL; i++ )
+    {
+        IS31FL3737_set_color( i, red, green, blue );
+    }
+}
+
+void IS31FL3737_set_led_control_register( uint8_t index, bool red, bool green, bool blue )
+{
+    is31_led led = g_is31_leds[index];
+
+  uint8_t control_register_r = led.r / 8;
+  uint8_t control_register_g = led.g / 8;
+  uint8_t control_register_b = led.b / 8;
+  uint8_t bit_r = led.r % 8;
+  uint8_t bit_g = led.g % 8;
+  uint8_t bit_b = led.b % 8;
+
+    if ( red ) {
+        g_led_control_registers[led.driver][control_register_r] |= (1 << bit_r);
+    } else {
+        g_led_control_registers[led.driver][control_register_r] &= ~(1 << bit_r);
+    }
+    if ( green ) {
+        g_led_control_registers[led.driver][control_register_g] |= (1 << bit_g);
+    } else {
+        g_led_control_registers[led.driver][control_register_g] &= ~(1 << bit_g);
+    }
+    if ( blue ) {
+        g_led_control_registers[led.driver][control_register_b] |= (1 << bit_b);
+    } else {
+        g_led_control_registers[led.driver][control_register_b] &= ~(1 << bit_b);
+    }
+
+    g_led_control_registers_update_required = true;
+
+}
+
+void IS31FL3737_update_pwm_buffers( uint8_t addr1, uint8_t addr2 )
+{
+    if ( g_pwm_buffer_update_required )
+    {
+        // Firstly we need to unlock the command register and select PG1
+        IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 );
+        IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_PWM );
+
+        IS31FL3737_write_pwm_buffer( addr1, g_pwm_buffer[0] );
+        //IS31FL3737_write_pwm_buffer( addr2, g_pwm_buffer[1] );
+    }
+    g_pwm_buffer_update_required = false;
+}
+
+void IS31FL3737_update_led_control_registers( uint8_t addr1, uint8_t addr2 )
+{
+    if ( g_led_control_registers_update_required )
+    {
+        // Firstly we need to unlock the command register and select PG0
+        IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER_WRITELOCK, 0xC5 );
+        IS31FL3737_write_register( addr1, ISSI_COMMANDREGISTER, ISSI_PAGE_LEDCONTROL );
+        for ( int i=0; i<24; i++ )
+        {
+            IS31FL3737_write_register(addr1, i, g_led_control_registers[0][i] );
+            //IS31FL3737_write_register(addr2, i, g_led_control_registers[1][i] );
+        }
+    }
+}

drivers/issi/is31fl3737.h

@@ -0,0 +1,207 @@
+/* Copyright 2017 Jason Williams
+ * Copyright 2018 Jack Humbert
+ * Copyright 2018 Yiancar
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+#ifndef IS31FL3737_DRIVER_H
+#define IS31FL3737_DRIVER_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+typedef struct is31_led {
+  uint8_t driver:2;
+  uint8_t r;
+  uint8_t g;
+  uint8_t b;
+} __attribute__((packed)) is31_led;
+
+extern const is31_led g_is31_leds[DRIVER_LED_TOTAL];
+
+void IS31FL3737_init( uint8_t addr );
+void IS31FL3737_write_register( uint8_t addr, uint8_t reg, uint8_t data );
+void IS31FL3737_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer );
+
+void IS31FL3737_set_color( int index, uint8_t red, uint8_t green, uint8_t blue );
+void IS31FL3737_set_color_all( uint8_t red, uint8_t green, uint8_t blue );
+
+void IS31FL3737_set_led_control_register( uint8_t index, bool red, bool green, bool blue );
+
+// This should not be called from an interrupt
+// (eg. from a timer interrupt).
+// Call this while idle (in between matrix scans).
+// If the buffer is dirty, it will update the driver with the buffer.
+void IS31FL3737_update_pwm_buffers( uint8_t addr1, uint8_t addr2 );
+void IS31FL3737_update_led_control_registers( uint8_t addr1, uint8_t addr2 );
+
+#define A_1   0x00
+#define A_2   0x01
+#define A_3   0x02
+#define A_4   0x03
+#define A_5   0x04
+#define A_6   0x05
+#define A_7   0x08
+#define A_8   0x09
+#define A_9   0x0A
+#define A_10  0x0B
+#define A_11  0x0C
+#define A_12  0x0D
+
+#define B_1   0x10
+#define B_2   0x11
+#define B_3   0x12
+#define B_4   0x13
+#define B_5   0x14
+#define B_6   0x15
+#define B_7   0x18
+#define B_8   0x19
+#define B_9   0x1A
+#define B_10  0x1B
+#define B_11  0x1C
+#define B_12  0x1D
+
+#define C_1   0x20
+#define C_2   0x21
+#define C_3   0x22
+#define C_4   0x23
+#define C_5   0x24
+#define C_6   0x25
+#define C_7   0x28
+#define C_8   0x29
+#define C_9   0x2A
+#define C_10  0x2B
+#define C_11  0x2C
+#define C_12  0x2D
+
+#define D_1   0x30
+#define D_2   0x31
+#define D_3   0x32
+#define D_4   0x33
+#define D_5   0x34
+#define D_6   0x35
+#define D_7   0x38
+#define D_8   0x39
+#define D_9   0x3A
+#define D_10  0x3B
+#define D_11  0x3C
+#define D_12  0x3D
+
+#define E_1   0x40
+#define E_2   0x41
+#define E_3   0x42
+#define E_4   0x43
+#define E_5   0x44
+#define E_6   0x45
+#define E_7   0x48
+#define E_8   0x49
+#define E_9   0x4A
+#define E_10  0x4B
+#define E_11  0x4C
+#define E_12  0x4D
+
+#define F_1   0x50
+#define F_2   0x51
+#define F_3   0x52
+#define F_4   0x53
+#define F_5   0x54
+#define F_6   0x55
+#define F_7   0x58
+#define F_8   0x59
+#define F_9   0x5A
+#define F_10  0x5B
+#define F_11  0x5C
+#define F_12  0x5D
+
+#define G_1   0x60
+#define G_2   0x61
+#define G_3   0x62
+#define G_4   0x63
+#define G_5   0x64
+#define G_6   0x65
+#define G_7   0x68
+#define G_8   0x69
+#define G_9   0x6A
+#define G_10  0x6B
+#define G_11  0x6C
+#define G_12  0x6D
+
+#define H_1   0x70
+#define H_2   0x71
+#define H_3   0x72
+#define H_4   0x73
+#define H_5   0x74
+#define H_6   0x75
+#define H_7   0x78
+#define H_8   0x79
+#define H_9   0x7A
+#define H_10  0x7B
+#define H_11  0x7C
+#define H_12  0x7D
+
+#define I_1   0x80
+#define I_2   0x81
+#define I_3   0x82
+#define I_4   0x83
+#define I_5   0x84
+#define I_6   0x85
+#define I_7   0x88
+#define I_8   0x89
+#define I_9   0x8A
+#define I_10  0x8B
+#define I_11  0x8C
+#define I_12  0x8D
+
+#define J_1   0x90
+#define J_2   0x91
+#define J_3   0x92
+#define J_4   0x93
+#define J_5   0x94
+#define J_6   0x95
+#define J_7   0x98
+#define J_8   0x99
+#define J_9   0x9A
+#define J_10  0x9B
+#define J_11  0x9C
+#define J_12  0x9D
+
+#define K_1   0xA0
+#define K_2   0xA1
+#define K_3   0xA2
+#define K_4   0xA3
+#define K_5   0xA4
+#define K_6   0xA5
+#define K_7   0xA8
+#define K_8   0xA9
+#define K_9   0xAA
+#define K_10  0xAB
+#define K_11  0xAC
+#define K_12  0xAD
+
+#define L_1   0xB0
+#define L_2   0xB1
+#define L_3   0xB2
+#define L_4   0xB3
+#define L_5   0xB4
+#define L_6   0xB5
+#define L_7   0xB8
+#define L_8   0xB9
+#define L_9   0xBA
+#define L_10  0xBB
+#define L_11  0xBC
+#define L_12  0xBD
+
+#endif // IS31FL3737_DRIVER_H

keyboards/1upkeyboards/sweet16/keymaps/default/keymap.c

@@ -6,9 +6,9 @@ enum custom_keycodes {
 
 const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
     LAYOUT_ortho_4x4(
-        KC_7, KC_8,   KC_9,   KC_ASTR, 
-        KC_4, KC_5,   KC_6,   KC_SLSH, 
-        KC_1, KC_2,   KC_3,   KC_MINS, 
+        KC_7, KC_8,   KC_9,   KC_ASTR,
+        KC_4, KC_5,   KC_6,   KC_SLSH,
+        KC_1, KC_2,   KC_3,   KC_MINS,
         KC_0, KC_ENT, KC_DOT, KC_EQL
     )
 };
@@ -27,6 +27,7 @@ bool process_record_user(uint16_t keycode, keyrecord_t *record) {
 
 void led_set_user(uint8_t usb_led) {
 
+  #ifndef CONVERT_TO_PROTON_C
   /* Map RXLED to USB_LED_NUM_LOCK */
 	if (usb_led & (1 << USB_LED_NUM_LOCK)) {
 		DDRB |= (1 << 0); PORTB &= ~(1 << 0);
@@ -40,4 +41,5 @@ void led_set_user(uint8_t usb_led) {
 	} else {
 		DDRD &= ~(1 << 5); PORTD &= ~(1 << 5);
 	}
+  #endif
 }

keyboards/planck/ez/config.h

@@ -0,0 +1,144 @@
+/*
+ * Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#pragma once
+
+/* USB Device descriptor parameter */
+#define DEVICE_VER 0x0000
+
+#undef MATRIX_ROWS
+#undef MATRIX_COLS
+/* key matrix size */
+#define MATRIX_ROWS 8
+#define MATRIX_COLS 6
+
+/*
+ * Keyboard Matrix Assignments
+ *
+ * Change this to how you wired your keyboard
+ * COLS: AVR pins used for columns, left to right
+ * ROWS: AVR pins used for rows, top to bottom
+ * DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
+ *                  ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
+ *
+*/
+
+#undef MATRIX_ROW_PINS
+#undef MATRIX_COL_PINS
+
+#define MATRIX_ROW_PINS { A10, A9, A8, B15, C13, C14, C15, A2 }
+#define MATRIX_COL_PINS { B11, B10, B2, B1, A7, B0 }
+
+#define NUMBER_OF_ENCODERS 1
+#define ENCODERS_PAD_A { B12 }
+#define ENCODERS_PAD_B { B13 }
+
+#define MUSIC_MAP
+#undef AUDIO_VOICES
+#undef C6_AUDIO
+
+/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
+#define DEBOUNCE 6
+
+/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
+//#define LOCKING_SUPPORT_ENABLE
+/* Locking resynchronize hack */
+//#define LOCKING_RESYNC_ENABLE
+
+/*
+ * Force NKRO
+ *
+ * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
+ * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
+ * makefile for this to work.)
+ *
+ * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
+ * until the next keyboard reset.
+ *
+ * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
+ * fully operational during normal computer usage.
+ *
+ * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
+ * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
+ * bootmagic, NKRO mode will always be enabled until it is toggled again during a
+ * power-up.
+ *
+ */
+//#define FORCE_NKRO
+
+/* key combination for magic key command */
+#define IS_COMMAND() ( \
+  keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
+)
+
+/*
+ * Feature disable options
+ *  These options are also useful to firmware size reduction.
+ */
+
+/* disable debug print */
+//#define NO_DEBUG
+
+/* disable print */
+//#define NO_PRINT
+
+/* disable action features */
+//#define NO_ACTION_LAYER
+//#define NO_ACTION_TAPPING
+//#define NO_ACTION_ONESHOT
+//#define NO_ACTION_MACRO
+//#define NO_ACTION_FUNCTION
+
+/*
+ * MIDI options
+ */
+
+/* Prevent use of disabled MIDI features in the keymap */
+//#define MIDI_ENABLE_STRICT 1
+
+/* enable basic MIDI features:
+   - MIDI notes can be sent when in Music mode is on
+*/
+//#define MIDI_BASIC
+
+/* enable advanced MIDI features:
+   - MIDI notes can be added to the keymap
+   - Octave shift and transpose
+   - Virtual sustain, portamento, and modulation wheel
+   - etc.
+*/
+//#define MIDI_ADVANCED
+
+/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
+//#define MIDI_TONE_KEYCODE_OCTAVES 1
+
+// #define WS2812_LED_N 2
+// #define RGBLED_NUM WS2812_LED_N
+// #define WS2812_TIM_N 2
+// #define WS2812_TIM_CH 2
+// #define PORT_WS2812     GPIOA
+// #define PIN_WS2812      1
+// #define WS2812_DMA_STREAM STM32_DMA1_STREAM2  // DMA stream for TIMx_UP (look up in reference manual under DMA Channel selection)
+//#define WS2812_DMA_CHANNEL 7                  // DMA channel for TIMx_UP
+//#define WS2812_EXTERNAL_PULLUP
+
+#define DRIVER_ADDR_1 0b1010000
+#define DRIVER_ADDR_2 0b1010000 // this is here for compliancy reasons.
+
+#define DRIVER_COUNT 1
+#define DRIVER_1_LED_TOTAL 47
+#define DRIVER_LED_TOTAL DRIVER_1_LED_TOTAL

keyboards/planck/ez/ez.c

@@ -0,0 +1,175 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "ez.h"
+
+const is31_led g_is31_leds[DRIVER_LED_TOTAL] = {
+/* Refer to IS31 manual for these locations
+ *   driver
+ *   |  R location
+ *   |  |      G location
+ *   |  |      |      B location
+ *   |  |      |      | */
+    {0, A_12,  B_12,  C_12},
+    {0, A_11,  B_11,  C_11},
+    {0, A_10,  B_10,  C_10},
+    {0, A_9,   B_9,   C_9},
+    {0, A_8,   B_8,   C_8},
+    {0, A_7,   B_7,   C_7},
+
+    {0, G_12,  H_12,  I_12},
+    {0, G_11,  H_11,  I_11},
+    {0, G_10,  H_10,  I_10},
+    {0, G_9,   H_9,   I_9},
+    {0, G_8,   H_8,   I_8},
+    {0, G_7,   H_7,   I_7},
+
+    {0, A_6,   B_6,   C_6},
+    {0, A_5,   B_5,   C_5},
+    {0, A_4,   B_4,   C_4},
+    {0, A_3,   B_3,   C_3},
+    {0, A_2,   B_2,   C_2},
+    {0, A_1,   B_1,   C_1},
+
+    {0, G_6,   H_6,   I_6},
+    {0, G_5,   H_5,   I_5},
+    {0, G_4,   H_4,   I_4},
+    {0, G_3,   H_3,   I_3},
+    {0, G_2,   H_2,   I_2},
+    {0, G_1,   H_1,   I_1},
+
+    {0, D_12,  E_12,  F_12},
+    {0, D_11,  E_11,  F_11},
+    {0, D_10,  E_10,  F_10},
+    {0, D_9,   E_9,   F_9},
+    {0, D_8,   E_8,   F_8},
+    {0, D_7,   E_7,   F_7},
+
+    {0, J_12,  K_12,  L_12},
+    {0, J_11,  K_11,  L_11},
+    {0, J_10,  K_10,  L_10},
+    {0, J_9,   K_9,   L_9},
+    {0, J_8,   K_8,   L_8},
+    {0, J_7,   K_7,   L_7},
+
+    {0, D_6,   E_6,   F_6},
+    {0, D_5,   E_5,   F_5},
+    {0, D_4,   E_4,   F_4},
+    {0, D_3,   E_3,   F_3},
+    {0, D_2,   E_2,   F_2},
+    {0, D_1,   E_1,   F_1},
+
+    {0, J_6,   K_6,   L_6},
+    {0, J_5,   K_5,   L_5},
+    {0, J_4,   K_4,   L_4},
+    {0, J_3,   K_3,   L_3},
+    {0, J_2,   K_2,   L_2},
+
+};
+
+const rgb_led g_rgb_leds[DRIVER_LED_TOTAL] = {
+
+    /*{row | col << 4}
+      |             {x=0..224, y=0..64}
+      |              |                 modifier
+      |              |                 | */
+    {{0|(0<<4)},   {20.36*0, 21.33*0}, 1},
+    {{0|(1<<4)},   {20.36*1, 21.33*0}, 0},
+    {{0|(2<<4)},   {20.36*2, 21.33*0}, 0},
+    {{0|(3<<4)},   {20.36*3, 21.33*0}, 0},
+    {{0|(4<<4)},   {20.36*4, 21.33*0}, 0},
+    {{0|(5<<4)},   {20.36*5, 21.33*0}, 0},
+    {{0|(6<<4)},   {20.36*6, 21.33*0}, 0},
+    {{0|(7<<4)},   {20.36*7, 21.33*0}, 0},
+    {{0|(8<<4)},   {20.36*8, 21.33*0}, 0},
+    {{0|(9<<4)},   {20.36*9, 21.33*0}, 0},
+    {{0|(10<<4)},  {20.36*10,21.33*0}, 0},
+    {{0|(11<<4)},  {20.36*11,21.33*0}, 1},
+
+    {{1|(0<<4)},   {20.36*0, 21.33*1}, 1},
+    {{1|(1<<4)},   {20.36*1, 21.33*1}, 0},
+    {{1|(2<<4)},   {20.36*2, 21.33*1}, 0},
+    {{1|(3<<4)},   {20.36*3, 21.33*1}, 0},
+    {{1|(4<<4)},   {20.36*4, 21.33*1}, 0},
+    {{1|(5<<4)},   {20.36*5, 21.33*1}, 0},
+    {{1|(6<<4)},   {20.36*6, 21.33*1}, 0},
+    {{1|(7<<4)},   {20.36*7, 21.33*1}, 0},
+    {{1|(8<<4)},   {20.36*8, 21.33*1}, 0},
+    {{1|(9<<4)},   {20.36*9, 21.33*1}, 0},
+    {{1|(10<<4)},  {20.36*10,21.33*1}, 0},
+    {{1|(11<<4)},  {20.36*11,21.33*1}, 1},
+
+    {{2|(0<<4)},   {20.36*0, 21.33*2}, 1},
+    {{2|(1<<4)},   {20.36*1, 21.33*2}, 0},
+    {{2|(2<<4)},   {20.36*2, 21.33*2}, 0},
+    {{2|(3<<4)},   {20.36*3, 21.33*2}, 0},
+    {{2|(4<<4)},   {20.36*4, 21.33*2}, 0},
+    {{2|(5<<4)},   {20.36*5, 21.33*2}, 0},
+    {{2|(6<<4)},   {20.36*6, 21.33*2}, 0},
+    {{2|(7<<4)},   {20.36*7, 21.33*2}, 0},
+    {{2|(8<<4)},   {20.36*8, 21.33*2}, 0},
+    {{2|(9<<4)},   {20.36*9, 21.33*2}, 0},
+    {{2|(10<<4)},  {20.36*10,21.33*2}, 0},
+    {{2|(11<<4)},  {20.36*11,21.33*2}, 1},
+
+    {{3|(0<<4)},   {20.36*0, 21.33*3}, 1},
+    {{3|(1<<4)},   {20.36*1, 21.33*3}, 1},
+    {{3|(2<<4)},   {20.36*2, 21.33*3}, 1},
+    {{3|(3<<4)},   {20.36*3, 21.33*3}, 1},
+    {{3|(4<<4)},   {20.36*4, 21.33*3}, 1},
+    {{3|(5<<4)},   {20.36*5.5,21.33*3}, 0},
+    {{3|(7<<4)},   {20.36*7, 21.33*3}, 1},
+    {{3|(8<<4)},   {20.36*8, 21.33*3}, 1},
+    {{3|(9<<4)},   {20.36*9, 21.33*3}, 1},
+    {{3|(10<<4)},  {20.36*10,21.33*3}, 1},
+    {{3|(11<<4)},  {20.36*11,21.33*3}, 1}
+};
+
+void matrix_init_kb(void) {
+  matrix_init_user();
+
+  palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL);
+  palSetPadMode(GPIOB, 9, PAL_MODE_OUTPUT_PUSHPULL);
+
+  palClearPad(GPIOB, 8);
+  palClearPad(GPIOB, 9);
+}
+
+void matrix_scan_kb(void) {
+  matrix_scan_user();
+}
+
+uint32_t layer_state_set_kb(uint32_t state) {
+
+  palClearPad(GPIOB, 8);
+  palClearPad(GPIOB, 9);
+  state = layer_state_set_user(state);
+  uint8_t layer = biton32(state);
+  switch (layer) {
+      case 3:
+        palSetPad(GPIOB, 9);
+        break;
+      case 4:
+        palSetPad(GPIOB, 8);
+        break;
+      case 6:
+        palSetPad(GPIOB, 9);
+        palSetPad(GPIOB, 8);
+        break;
+      default:
+        break;
+    }
+    return state;
+}

keyboards/planck/ez/ez.h

@@ -0,0 +1,107 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include "planck.h"
+
+#define LAYOUT_planck_1x2uC( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34,    k35,   k36, k37, k38, k39, k3a \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k39, k3a, k3b }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k33, k34, k35 } \
+}
+
+#define LAYOUT_planck_1x2uR( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35,   k36,    k37, k38, k39, k3a \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k39, k3a, k3b }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k33, k34, k35 } \
+}
+
+#define LAYOUT_planck_1x2uL( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33,   k34,    k35, k36, k37, k38, k39, k3a \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k39, k3a, k3b }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k33, k34, k35 } \
+}
+
+#define LAYOUT_planck_2x2u( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33,   k34,      k36,    k37, k38, k39, k3a \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k39, k3a, k3b }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k33, k34, k35 } \
+}
+
+#define LAYOUT_planck_grid( \
+    k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
+    k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, \
+    k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, \
+    k30, k31, k32, k33, k34, k35, KC_NO, k36, k37, k38, k39, k3a \
+) \
+{ \
+    { k00, k01, k02, k03, k04, k05 }, \
+    { k10, k11, k12, k13, k14, k15 }, \
+    { k20, k21, k22, k23, k24, k25 }, \
+    { k30, k31, k32, k39, k3a, KC_NO }, \
+    { k06, k07, k08, k09, k0a, k0b }, \
+    { k16, k17, k18, k19, k1a, k1b }, \
+    { k26, k27, k28, k29, k2a, k2b }, \
+    { k36, k37, k38, k33, k34, k35 } \
+}
+
+#define KEYMAP LAYOUT_planck_grid
+#define LAYOUT_ortho_4x12 LAYOUT_planck_grid
+#define KC_LAYOUT_ortho_4x12 KC_KEYMAP

keyboards/planck/ez/rules.mk

@@ -0,0 +1,24 @@
+# project specific files
+LAYOUTS += ortho_4x12
+
+# Cortex version
+MCU  = STM32F303
+
+# Build Options
+#   comment out to disable the options.
+#
+BACKLIGHT_ENABLE = no
+BOOTMAGIC_ENABLE = yes  # Virtual DIP switch configuration
+## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.)
+MOUSEKEY_ENABLE = yes # Mouse keys
+EXTRAKEY_ENABLE = yes # Audio control and System control
+CONSOLE_ENABLE = yes  # Console for debug
+COMMAND_ENABLE = yes    # Commands for debug and configuration
+#SLEEP_LED_ENABLE = yes  # Breathing sleep LED during USB suspend
+NKRO_ENABLE = yes     # USB Nkey Rollover
+CUSTOM_MATRIX = no # Custom matrix file
+AUDIO_ENABLE = yes
+RGBLIGHT_ENABLE = no
+# SERIAL_LINK_ENABLE = yes
+ENCODER_ENABLE = yes
+RGB_MATRIX_ENABLE = IS31FL3737

keyboards/planck/planck.h

@@ -5,6 +5,10 @@
 
 #define encoder_update(clockwise) encoder_update_user(uint8_t index, clockwise)
 
+#ifdef KEYBOARD_planck_ez
+  #include "ez.h"
+#endif
+
 #ifdef __AVR__
 #define LAYOUT_planck_mit( \
 	k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \
@@ -50,7 +54,7 @@
 #define LAYOUT_ortho_4x12 LAYOUT_planck_grid
 #define KC_LAYOUT_ortho_4x12 KC_KEYMAP
 
-#else
+#elif KEYBOARD_planck_rev6
 
 	#define LAYOUT_planck_1x2uC( \
     k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, \

keyboards/planck/rev6/boards/GENERIC_STM32_F303XC/board.h

@@ -1,1187 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for Clueboard 60% Keyboard
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_GENERIC_STM32_F303XC
-#define BOARD_NAME                  "Planck PCB"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#define STM32_LSEDRV                (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                8000000U
-#endif
-
-// #define STM32_HSE_BYPASS
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F303xC
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_PIN0       0U
-#define GPIOA_PIN1       1U
-#define GPIOA_PIN2       2U
-#define GPIOA_PIN3       3U
-#define GPIOA_PIN4       4U
-#define GPIOA_PIN5       5U
-#define GPIOA_PIN6       6U
-#define GPIOA_PIN7       7U
-#define GPIOA_PIN8       8U
-#define GPIOA_PIN9       9U
-#define GPIOA_PIN10      10U
-#define GPIOA_USB_DM     11U
-#define GPIOA_USB_DP     12U
-#define GPIOA_SWDIO      13U
-#define GPIOA_SWCLK      14U
-#define GPIOA_PIN15      15U
-
-#define GPIOB_PIN0       0U
-#define GPIOB_PIN1       1U
-#define GPIOB_PIN2       2U
-#define GPIOB_PIN3       3U
-#define GPIOB_PIN4       4U
-#define GPIOB_PIN5       5U
-#define GPIOB_PIN6       6U
-#define GPIOB_PIN7       7U
-#define GPIOB_PIN8       8U
-#define GPIOB_PIN9       9U
-#define GPIOB_PIN10      10U
-#define GPIOB_PIN11      11U
-#define GPIOB_PIN12      12U
-#define GPIOB_PIN13      13U
-#define GPIOB_PIN14      14U
-#define GPIOB_PIN15      15U
-
-#define GPIOC_PIN0       0U
-#define GPIOC_PIN1       1U
-#define GPIOC_PIN2       2U
-#define GPIOC_PIN3       3U
-#define GPIOC_PIN4       4U
-#define GPIOC_PIN5       5U
-#define GPIOC_PIN6       6U
-#define GPIOC_PIN7       7U
-#define GPIOC_PIN8       8U
-#define GPIOC_PIN9       9U
-#define GPIOC_PIN10      10U
-#define GPIOC_PIN11      11U
-#define GPIOC_PIN12      12U
-#define GPIOC_PIN13      13U
-#define GPIOC_PIN14      14U
-#define GPIOC_PIN15      15U
-
-#define GPIOD_PIN0       0U
-#define GPIOD_PIN1       1U
-#define GPIOD_PIN2       2U
-#define GPIOD_PIN3       3U
-#define GPIOD_PIN4       4U
-#define GPIOD_PIN5       5U
-#define GPIOD_PIN6       6U
-#define GPIOD_PIN7       7U
-#define GPIOD_PIN8       8U
-#define GPIOD_PIN9       9U
-#define GPIOD_PIN10      10U
-#define GPIOD_PIN11      11U
-#define GPIOD_PIN12      12U
-#define GPIOD_PIN13      13U
-#define GPIOD_PIN14      14U
-#define GPIOD_PIN15      15U
-
-#define GPIOE_PIN0       0U
-#define GPIOE_PIN1       1U
-#define GPIOE_PIN2       2U
-#define GPIOE_PIN3       3U
-#define GPIOE_PIN4       4U
-#define GPIOE_PIN5       5U
-#define GPIOE_PIN6       6U
-#define GPIOE_PIN7       7U
-#define GPIOE_PIN8       8U
-#define GPIOE_PIN9       9U
-#define GPIOE_PIN10      10U
-#define GPIOE_PIN11      11U
-#define GPIOE_PIN12      12U
-#define GPIOE_PIN13      13U
-#define GPIOE_PIN14      14U
-#define GPIOE_PIN15      15U
-
-#define GPIOF_I2C2_SDA   0U
-#define GPIOF_I2C2_SCL   1U
-#define GPIOF_PIN2       2U
-#define GPIOF_PIN3       3U
-#define GPIOF_PIN4       4U
-#define GPIOF_PIN5       5U
-#define GPIOF_PIN6       6U
-#define GPIOF_PIN7       7U
-#define GPIOF_PIN8       8U
-#define GPIOF_PIN9       9U
-#define GPIOF_PIN10      10U
-#define GPIOF_PIN11      11U
-#define GPIOF_PIN12      12U
-#define GPIOF_PIN13      13U
-#define GPIOF_PIN14      14U
-#define GPIOF_PIN15      15U
-
-#define GPIOG_PIN0       0U
-#define GPIOG_PIN1       1U
-#define GPIOG_PIN2       2U
-#define GPIOG_PIN3       3U
-#define GPIOG_PIN4       4U
-#define GPIOG_PIN5       5U
-#define GPIOG_PIN6       6U
-#define GPIOG_PIN7       7U
-#define GPIOG_PIN8       8U
-#define GPIOG_PIN9       9U
-#define GPIOG_PIN10      10U
-#define GPIOG_PIN11      11U
-#define GPIOG_PIN12      12U
-#define GPIOG_PIN13      13U
-#define GPIOG_PIN14      14U
-#define GPIOG_PIN15      15U
-
-#define GPIOH_PIN0       0U
-#define GPIOH_PIN1       1U
-#define GPIOH_PIN2       2U
-#define GPIOH_PIN3       3U
-#define GPIOH_PIN4       4U
-#define GPIOH_PIN5       5U
-#define GPIOH_PIN6       6U
-#define GPIOH_PIN7       7U
-#define GPIOH_PIN8       8U
-#define GPIOH_PIN9       9U
-#define GPIOH_PIN10      10U
-#define GPIOH_PIN11      11U
-#define GPIOH_PIN12      12U
-#define GPIOH_PIN13      13U
-#define GPIOH_PIN14      14U
-#define GPIOH_PIN15      15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_L3GD20_SDI             PAL_LINE(GPIOA, 7U)
-#define LINE_USB_DM                 PAL_LINE(GPIOA, 11U)
-#define LINE_USB_DP                 PAL_LINE(GPIOA, 12U)
-#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)
-#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)
-
-#define LINE_PIN6               PAL_LINE(GPIOF, 0U)
-#define LINE_PIN7               PAL_LINE(GPIOF, 1U)
-
-#define LINE_CAPS_LOCK               PAL_LINE(GPIOB, 7U)
-
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))
-#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - NC
- * PA1  - NC
- * PA2  - COL1
- * PA3  - COL2
- * PA4  - SPEAKER1
- * PA5  - SPEAKER2
- * PA6  - COL3
- * PA7  - COL8
- * PA8  - COL6
- * PA9  - COL7
- * PA10 - ROW5
- * PA11 - USB_DM                    (alternate 14).
- * PA12 - USB_DP                    (alternate 14).
- * PA13 - SWDIO                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - ROW4
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_PIN0) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN5) |   \
-                                     PIN_MODE_INPUT(GPIOA_PIN6) |  \
-                                     PIN_MODE_INPUT(GPIOA_PIN7) |  \
-                                     PIN_MODE_INPUT(GPIOA_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOA_PIN10) |          \
-                                     PIN_MODE_ALTERNATE(GPIOA_USB_DM) |     \
-                                     PIN_MODE_ALTERNATE(GPIOA_USB_DP) |     \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN7) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOA_PIN0) |     \
-                                     PIN_OSPEED_HIGH(GPIOA_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN5) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN6) |     \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN7) |     \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN10) |      \
-                                     PIN_OSPEED_HIGH(GPIOA_USB_DM) |        \
-                                     PIN_OSPEED_VERYLOW(GPIOA_USB_DP) |     \
-                                     PIN_OSPEED_HIGH(GPIOA_SWDIO) |         \
-                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \
-                                     PIN_OSPEED_VERYLOW(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_PIN0) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |   \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |    \
-                                     PIN_PUPDR_FLOATING(GPIOA_PIN7) |  \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN10) |        \
-                                     PIN_PUPDR_FLOATING(GPIOA_USB_DM) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_USB_DP) |     \
-                                     PIN_PUPDR_PULLUP(GPIOA_SWDIO) |        \
-                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_PIN0) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN5) |         \
-                                     PIN_ODR_HIGH(GPIOA_PIN6) |        \
-                                     PIN_ODR_HIGH(GPIOA_PIN7) |        \
-                                     PIN_ODR_HIGH(GPIOA_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOA_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOA_USB_DM) |           \
-                                     PIN_ODR_HIGH(GPIOA_USB_DP) |           \
-                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_PIN0, 0) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN1, 1) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN5, 5) |       \
-                                     PIN_AFIO_AF(GPIOA_PIN6, 5) |      \
-                                     PIN_AFIO_AF(GPIOA_PIN7, 5))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOA_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_USB_DM, 14) |        \
-                                     PIN_AFIO_AF(GPIOA_USB_DP, 14) |        \
-                                     PIN_AFIO_AF(GPIOA_SWDIO, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0) |          \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input pullup).
- * PB1  - PIN1                      (input pullup).
- * PB2  - PIN2                      (input pullup).
- * PB3  - PIN3                       (alternate 0).
- * PB4  - PIN4                      (input pullup).
- * PB5  - PIN5                      (input pullup).
- * PB6  - PIN6 LSM303DLHC_SCL   (alternate 4).
- * PB7  - PIN7 LSM303DLHC_SDA   (alternate 4).
- * PB8  - PIN8                      (input pullup).
- * PB9  - PIN9                      (input pullup).
- * PB10 - PIN10                     (input pullup).
- * PB11 - PIN11                     (input pullup).
- * PB12 - PIN12                     (input pullup).
- * PB13 - PIN13                     (input pullup).
- * PB14 - PIN14                     (input pullup).
- * PB15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_INPUT(GPIOB_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \
-                                     PIN_MODE_ALTERNATE(GPIOB_PIN3) |        \
-                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \
-                                     PIN_MODE_ALTERNATE(GPIOB_PIN6) |   \
-                                     PIN_MODE_OUTPUT(GPIOB_PIN7) |   \
-                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN3) |        \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \
-                                     PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOB_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN2) |       \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN3) |           \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN5) |       \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN6) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN7) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_PULLUP(GPIOB_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN3) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN6) |   \
-                                     PIN_PUPDR_PULLDOWN(GPIOB_PIN7) |   \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN3) |              \
-                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN6) |         \
-                                     PIN_ODR_LOW(GPIOB_PIN7) |         \
-                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN3, 0) |            \
-                                     PIN_AFIO_AF(GPIOB_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN6, 4) |       \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOB_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0  - PIN0                      (input pullup).
- * PC1  - PIN1                      (input pullup).
- * PC2  - PIN2                      (input pullup).
- * PC3  - PIN3                      (input pullup).
- * PC4  - PIN4                      (input pullup).
- * PC5  - PIN5                      (input pullup).
- * PC6  - PIN6                      (input pullup).
- * PC7  - PIN7                      (input pullup).
- * PC8  - PIN8                      (input pullup).
- * PC9  - PIN9                      (input pullup).
- * PC10 - PIN10                     (input pullup).
- * PC11 - PIN11                     (input pullup).
- * PC12 - PIN12                     (input pullup).
- * PC13 - PIN13                     (input pullup).
- * PC14 - PIN14                  (input floating).
- * PC15 - PIN15                 (input floating).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOC_PIN14) |       \
-                                     PIN_MODE_INPUT(GPIOC_PIN15))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN14) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOC_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOC_PIN13) |      \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN14) |      \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN15))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOC_PIN13) |        \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN14) |   \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN15))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN14) |         \
-                                     PIN_ODR_HIGH(GPIOC_PIN15))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN7, 0))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOC_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN14, 0) |       \
-                                     PIN_AFIO_AF(GPIOC_PIN15, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (input pullup).
- * PD1  - PIN1                      (input pullup).
- * PD2  - PIN2                      (input pullup).
- * PD3  - PIN3                      (input pullup).
- * PD4  - PIN4                      (input pullup).
- * PD5  - PIN5                      (input pullup).
- * PD6  - PIN6                      (input pullup).
- * PD7  - PIN7                      (input pullup).
- * PD8  - PIN8                      (input pullup).
- * PD9  - PIN9                      (input pullup).
- * PD11 - PIN10                     (input pullup).
- * PD11 - PIN11                     (input pullup).
- * PD12 - PIN12                     (input pullup).
- * PD13 - PIN13                     (input pullup).
- * PD14 - PIN14                     (input pullup).
- * PD15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOD_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN15, 0))
-
-/*
- * GPIOE setup:
- *
- * PE0  - PIN0               (input pullup).
- * PE1  - PIN1               (input pullup).
- * PE2  - PIN2           (input pullup).
- * PE3  - PIN3 L3GD20_CS         (output pushpull maximum).
- * PE4  - PIN4           (input pullup).
- * PE5  - PIN5           (input pullup).
- * PE6  - PIN6                      (input pullup).
- * PE7  - PIN7                      (input pullup).
- * PE8  - PIN8                 (output pushpull maximum).
- * PE9  - PIN9                  (output pushpull maximum).
- * PE10 - PIN10               (output pushpull maximum).
- * PE11 - PIN11                (output pushpull maximum).
- * PE12 - PIN12                 (output pushpull maximum).
- * PE13 - PIN13                 (output pushpull maximum).
- * PE14 - PIN14               (output pushpull maximum).
- * PE15 - PIN15                (output pushpull maximum).
- */
-#define VAL_GPIOE_MODER             (PIN_MODE_INPUT(GPIOE_PIN0) |    \
-                                     PIN_MODE_INPUT(GPIOE_PIN1) |    \
-                                     PIN_MODE_INPUT(GPIOE_PIN2) |\
-                                     PIN_MODE_OUTPUT(GPIOE_PIN3) |       \
-                                     PIN_MODE_INPUT(GPIOE_PIN4) |\
-                                     PIN_MODE_INPUT(GPIOE_PIN5) |\
-                                     PIN_MODE_INPUT(GPIOE_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOE_PIN7) |           \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN8) |     \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN9) |      \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN10) |   \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN11) |    \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN12) |     \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN13) |     \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN14) |   \
-                                     PIN_MODE_OUTPUT(GPIOE_PIN15))
-#define VAL_GPIOE_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |  \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
-#define VAL_GPIOE_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
-                                     PIN_OSPEED_HIGH(GPIOE_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOE_PIN7) |       \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN8) |     \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN9) |      \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN10) |   \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN11) |    \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN12) |     \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN13) |     \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN14) |   \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN15))
-#define VAL_GPIOE_PUPDR             (PIN_PUPDR_PULLUP(GPIOE_PIN0) |  \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN1) |  \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN3) |    \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN8) |    \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN9) |     \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN10) |  \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
-                                     PIN_PUPDR_PULLUP(GPIOE_PIN12) |    \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN13) |  \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN15))
-#define VAL_GPIOE_ODR               (PIN_ODR_HIGH(GPIOE_PIN0) |      \
-                                     PIN_ODR_HIGH(GPIOE_PIN1) |      \
-                                     PIN_ODR_HIGH(GPIOE_PIN2) |  \
-                                     PIN_ODR_HIGH(GPIOE_PIN3) |          \
-                                     PIN_ODR_HIGH(GPIOE_PIN4) |  \
-                                     PIN_ODR_HIGH(GPIOE_PIN5) |  \
-                                     PIN_ODR_HIGH(GPIOE_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN7) |             \
-                                     PIN_ODR_LOW(GPIOE_PIN8) |         \
-                                     PIN_ODR_LOW(GPIOE_PIN9) |          \
-                                     PIN_ODR_LOW(GPIOE_PIN10) |       \
-                                     PIN_ODR_LOW(GPIOE_PIN11) |        \
-                                     PIN_ODR_LOW(GPIOE_PIN12) |         \
-                                     PIN_ODR_LOW(GPIOE_PIN13) |         \
-                                     PIN_ODR_LOW(GPIOE_PIN14) |       \
-                                     PIN_ODR_LOW(GPIOE_PIN15))
-#define VAL_GPIOE_AFRL              (PIN_AFIO_AF(GPIOE_PIN0, 0) |    \
-                                     PIN_AFIO_AF(GPIOE_PIN1, 0) |    \
-                                     PIN_AFIO_AF(GPIOE_PIN2, 0) |\
-                                     PIN_AFIO_AF(GPIOE_PIN3, 0) |        \
-                                     PIN_AFIO_AF(GPIOE_PIN4, 0) |\
-                                     PIN_AFIO_AF(GPIOE_PIN5, 0) |\
-                                     PIN_AFIO_AF(GPIOE_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOE_PIN7, 0))
-#define VAL_GPIOE_AFRH              (PIN_AFIO_AF(GPIOE_PIN8, 0) |      \
-                                     PIN_AFIO_AF(GPIOE_PIN9, 0) |       \
-                                     PIN_AFIO_AF(GPIOE_PIN10, 0) |    \
-                                     PIN_AFIO_AF(GPIOE_PIN11, 0) |     \
-                                     PIN_AFIO_AF(GPIOE_PIN12, 0) |      \
-                                     PIN_AFIO_AF(GPIOE_PIN13, 0) |      \
-                                     PIN_AFIO_AF(GPIOE_PIN14, 0) |    \
-                                     PIN_AFIO_AF(GPIOE_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0  - I2C2_SDA                    (input floating).
- * PF1  - I2C2_SCL                   (input floating).
- * PF2  - PIN2                      (input pullup).
- * PF3  - PIN3                      (input pullup).
- * PF4  - PIN4                      (input pullup).
- * PF5  - PIN5                      (input pullup).
- * PF6  - PIN6                      (input pullup).
- * PF7  - PIN7                      (input pullup).
- * PF8  - PIN8                      (input pullup).
- * PF9  - PIN9                      (input pullup).
- * PF10 - PIN10                     (input pullup).
- * PF11 - PIN11                     (input pullup).
- * PF12 - PIN12                     (input pullup).
- * PF13 - PIN13                     (input pullup).
- * PF14 - PIN14                     (input pullup).
- * PF15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_I2C2_SDA) |         \
-                                     PIN_MODE_INPUT(GPIOF_I2C2_SCL) |        \
-                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) |        \
-                                     PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) |     \
-                                     PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) |    \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_I2C2_SDA) |           \
-                                     PIN_ODR_HIGH(GPIOF_I2C2_SCL) |          \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) |         \
-                                     PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) |        \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                      (input pullup).
- * PG1  - PIN1                      (input pullup).
- * PG2  - PIN2                      (input pullup).
- * PG3  - PIN3                      (input pullup).
- * PG4  - PIN4                      (input pullup).
- * PG5  - PIN5                      (input pullup).
- * PG6  - PIN6                      (input pullup).
- * PG7  - PIN7                      (input pullup).
- * PG8  - PIN8                      (input pullup).
- * PG9  - PIN9                      (input pullup).
- * PG10 - PIN10                     (input pullup).
- * PG11 - PIN11                     (input pullup).
- * PG12 - PIN12                     (input pullup).
- * PG13 - PIN13                     (input pullup).
- * PG14 - PIN14                     (input pullup).
- * PG15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOG_MODER             (PIN_MODE_INPUT(GPIOG_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOG_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOG_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR             (PIN_PUPDR_PULLUP(GPIOG_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOG_PIN15))
-#define VAL_GPIOG_ODR               (PIN_ODR_HIGH(GPIOG_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL              (PIN_AFIO_AF(GPIOG_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN7, 0))
-#define VAL_GPIOG_AFRH              (PIN_AFIO_AF(GPIOG_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOG_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN15, 0))
-
-/*
- * GPIOH setup:
- *
- * PH0  - PIN0                      (input pullup).
- * PH1  - PIN1                      (input pullup).
- * PH2  - PIN2                      (input pullup).
- * PH3  - PIN3                      (input pullup).
- * PH4  - PIN4                      (input pullup).
- * PH5  - PIN5                      (input pullup).
- * PH6  - PIN6                      (input pullup).
- * PH7  - PIN7                      (input pullup).
- * PH8  - PIN8                      (input pullup).
- * PH9  - PIN9                      (input pullup).
- * PH10 - PIN10                     (input pullup).
- * PH11 - PIN11                     (input pullup).
- * PH12 - PIN12                     (input pullup).
- * PH13 - PIN13                     (input pullup).
- * PH14 - PIN14                     (input pullup).
- * PH15 - PIN15                     (input pullup).
- */
-#define VAL_GPIOH_MODER             (PIN_MODE_INPUT(GPIOH_PIN0) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN1) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN2) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN3) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN4) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN5) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN6) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN7) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN8) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN9) |           \
-                                     PIN_MODE_INPUT(GPIOH_PIN10) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN11) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN12) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN13) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN14) |          \
-                                     PIN_MODE_INPUT(GPIOH_PIN15))
-#define VAL_GPIOH_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
-#define VAL_GPIOH_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOH_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOH_PIN15))
-#define VAL_GPIOH_PUPDR             (PIN_PUPDR_PULLUP(GPIOH_PIN0) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN1) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN2) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN3) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN4) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN5) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN6) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN7) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN8) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN9) |         \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN10) |        \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN11) |        \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN12) |        \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN13) |        \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN14) |        \
-                                     PIN_PUPDR_PULLUP(GPIOH_PIN15))
-#define VAL_GPIOH_ODR               (PIN_ODR_HIGH(GPIOH_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOH_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOH_PIN15))
-#define VAL_GPIOH_AFRL              (PIN_AFIO_AF(GPIOH_PIN0, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN1, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN2, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN3, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN4, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN5, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN6, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN7, 0))
-#define VAL_GPIOH_AFRH              (PIN_AFIO_AF(GPIOH_PIN8, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN9, 0) |           \
-                                     PIN_AFIO_AF(GPIOH_PIN10, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN11, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN12, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN13, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN14, 0) |          \
-                                     PIN_AFIO_AF(GPIOH_PIN15, 0))
-
-
-/*
- * USB bus activation macro, required by the USB driver.
- */
-// #define usb_lld_connect_bus(usbp)
-#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
-// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
-/*
- * USB bus de-activation macro, required by the USB driver.
- */
-// #define usb_lld_disconnect_bus(usbp)
-#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
-// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */

keyboards/planck/rev6/halconf.h

@@ -1,388 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/halconf.h
- * @brief   HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef HALCONF_H
-#define HALCONF_H
-
-#include "mcuconf.h"
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 FALSE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 TRUE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 FALSE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 TRUE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the QSPI subsystem.
- */
-#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
-#define HAL_USE_QSPI                FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          TRUE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 FALSE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 TRUE
-#endif
-
-/**
- * @brief   Enables the WDG subsystem.
- */
-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
-#define HAL_USE_WDG                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      38400
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 16 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 256 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     1
-#endif
-
-/**
- * @brief   Serial over USB number of buffers.
- * @note    The default is 2 buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_NUMBER   2
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* UART driver related settings.                                             */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
-#define UART_USE_WAIT               FALSE
-#endif
-
-/**
- * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define UART_USE_MUTUAL_EXCLUSION   FALSE
-#endif
-
-/*===========================================================================*/
-/* USB driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
-#define USB_USE_WAIT                TRUE
-#endif
-
-#endif /* HALCONF_H */
-
-/** @} */

keyboards/planck/rev6/mcuconf.h

@@ -1,257 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
-/*
- * STM32F3xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-#define STM32F3xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PREDIV_VALUE                  1
-#define STM32_PLLMUL_VALUE                  9
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV2
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_ADC12PRES                     STM32_ADC12PRES_DIV1
-#define STM32_ADC34PRES                     STM32_ADC34PRES_DIV1
-#define STM32_USART1SW                      STM32_USART1SW_PCLK
-#define STM32_USART2SW                      STM32_USART2SW_PCLK
-#define STM32_USART3SW                      STM32_USART3SW_PCLK
-#define STM32_UART4SW                       STM32_UART4SW_PCLK
-#define STM32_UART5SW                       STM32_UART5SW_PCLK
-#define STM32_I2C1SW                        STM32_I2C1SW_SYSCLK
-#define STM32_I2C2SW                        STM32_I2C2SW_SYSCLK
-#define STM32_TIM1SW                        STM32_TIM1SW_PCLK2
-#define STM32_TIM8SW                        STM32_TIM8SW_PCLK2
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-#define STM32_USB_CLOCK_REQUIRED            TRUE
-#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-
-#undef STM32_HSE_BYPASS
-// #error "oh no"
-// #endif
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_DUAL_MODE                 FALSE
-#define STM32_ADC_COMPACT_SAMPLES           FALSE
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
-#define STM32_ADC_USE_ADC4                  FALSE
-#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)
-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 5)
-#define STM32_ADC_ADC4_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC2_DMA_PRIORITY         2
-#define STM32_ADC_ADC3_DMA_PRIORITY         2
-#define STM32_ADC_ADC4_DMA_PRIORITY         2
-#define STM32_ADC_ADC12_IRQ_PRIORITY        5
-#define STM32_ADC_ADC3_IRQ_PRIORITY         5
-#define STM32_ADC_ADC4_IRQ_PRIORITY         5
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5
-#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY     5
-#define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1
-#define STM32_ADC_ADC34_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-
-/*
- * DAC driver system settings.
- */
-#define STM32_DAC_DUAL_MODE                 FALSE
-#define STM32_DAC_USE_DAC1_CH1              TRUE
-#define STM32_DAC_USE_DAC1_CH2              TRUE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
-#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI30_32_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI33_IRQ_PRIORITY       6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM6                  TRUE
-#define STM32_GPT_USE_TIM7                  TRUE
-#define STM32_GPT_USE_TIM8                  TRUE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM6_IRQ_PRIORITY         7
-#define STM32_GPT_TIM7_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         10
-#define STM32_I2C_I2C2_IRQ_PRIORITY         10
-#define STM32_I2C_USE_DMA                   TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY         1
-#define STM32_I2C_I2C2_DMA_PRIORITY         1
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  TRUE
-#define STM32_PWM_USE_TIM3                  TRUE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             FALSE
-#define STM32_SERIAL_USE_USART2             TRUE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  FALSE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_USB1                  TRUE
-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
-#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
-#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
-
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG                  FALSE
-
-#endif /* MCUCONF_H */

keyboards/planck/rev6/rules.mk

@@ -2,41 +2,8 @@
 SRC =	matrix.c
 LAYOUTS += ortho_4x12
 
-## chip/board settings
-# - the next two should match the directories in
-#   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
-MCU_FAMILY = STM32
-MCU_SERIES = STM32F3xx
-
-# Linker script to use
-# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
-#   or <this_dir>/ld/
-MCU_LDSCRIPT = STM32F303xC
-
-# Startup code to use
-#  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
-MCU_STARTUP = stm32f3xx
-
-# Board: it should exist either in <chibios>/os/hal/boards/
-#  or <this_dir>/boards
-BOARD = GENERIC_STM32_F303XC
-
 # Cortex version
-MCU  = cortex-m4
-
-# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
-ARMV = 7
-
-USE_FPU = yes
-
-# Vector table for application
-# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
-# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
-# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
-OPT_DEFS =
-
-# Options to pass to dfu-util when flashing
-DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
+MCU  = STM32F303
 
 # Build Options
 #   comment out to disable the options.

keyboards/planck/rules.mk

@@ -1,39 +1,6 @@
 # MCU name
-#MCU = at90usb1287
 MCU = atmega32u4
 
-# Processor frequency.
-#     This will define a symbol, F_CPU, in all source code files equal to the
-#     processor frequency in Hz. You can then use this symbol in your source code to
-#     calculate timings. Do NOT tack on a 'UL' at the end, this will be done
-#     automatically to create a 32-bit value in your source code.
-#
-#     This will be an integer division of F_USB below, as it is sourced by
-#     F_USB after it has run through any CPU prescalers. Note that this value
-#     does not *change* the processor frequency - it should merely be updated to
-#     reflect the processor speed set externally so that the code can use accurate
-#     software delays.
-F_CPU = 16000000
-
-#
-# LUFA specific
-#
-# Target architecture (see library "Board Types" documentation).
-ARCH = AVR8
-
-# Input clock frequency.
-#     This will define a symbol, F_USB, in all source code files equal to the
-#     input clock frequency (before any prescaling is performed) in Hz. This value may
-#     differ from F_CPU if prescaling is used on the latter, and is required as the
-#     raw input clock is fed directly to the PLL sections of the AVR for high speed
-#     clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL'
-#     at the end, this will be done automatically to create a 32-bit value in your
-#     source code.
-#
-#     If no clock division is performed on the input clock inside the AVR (via the
-#     CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU.
-F_USB = $(F_CPU)
-
 # Bootloader
 #     This definition is optional, and if your keyboard supports multiple bootloaders of
 #     different sizes, comment this out, and the correct address will be loaded

keyboards/proton_c/boards/GENERIC_STM32_F303XC/board.c

@@ -1,126 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-void enter_bootloader_mode_if_requested(void);
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-  enter_bootloader_mode_if_requested();
-  stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief   SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}

keyboards/proton_c/boards/GENERIC_STM32_F303XC/board.mk

@@ -1,5 +0,0 @@
-# List of all the board related files.
-BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
-
-# Required include directories
-BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC

keyboards/proton_c/bootloader_defs.h

@@ -1,7 +0,0 @@
-/* Address for jumping to bootloader on STM32 chips. */
-/* It is chip dependent, the correct number can be looked up here:
- * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
- * This also requires a patch to chibios:
- *  <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
- */
-#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800

keyboards/proton_c/chconf.h

@@ -1,520 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef CHCONF_H
-#define CHCONF_H
-
-#define _CHIBIOS_RT_CONF_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 100000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        TRUE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   FALSE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                FALSE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               FALSE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the trace buffer is activated.
- *
- * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
-
-/**
- * @brief   Trace buffer entries.
- * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
- *          different from @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_BUFFER_SIZE            128
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           TRUE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 FALSE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* Context switch code here.*/                                            \
-}
-
-/**
- * @brief   ISR enter hook.
- */
-#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
-  /* IRQ prologue code here.*/                                              \
-}
-
-/**
- * @brief   ISR exit hook.
- */
-#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
-  /* IRQ epilogue code here.*/                                              \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
-  /* Idle-enter code here.*/                                                \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
-  /* Idle-leave code here.*/                                                \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/**
- * @brief   Trace hook.
- * @details This hook is invoked each time a new record is written in the
- *          trace buffer.
- */
-#define CH_CFG_TRACE_HOOK(tep) {                                            \
-  /* Trace code here.*/                                                     \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* CHCONF_H */
-
-/** @} */

keyboards/proton_c/config.h

@@ -33,7 +33,6 @@
 #define MATRIX_ROW_PINS { B9 }
 #define MATRIX_COL_PINS { B0 }
 
-
 /* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
 #define DEBOUNCE 6
 

keyboards/proton_c/rules.mk

@@ -1,38 +1,4 @@
-## chip/board settings
-# - the next two should match the directories in
-#   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
-MCU_FAMILY = STM32
-MCU_SERIES = STM32F3xx
-
-# Linker script to use
-# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
-#   or <this_dir>/ld/
-MCU_LDSCRIPT = STM32F303xC
-
-# Startup code to use
-#  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
-MCU_STARTUP = stm32f3xx
-
-# Board: it should exist either in <chibios>/os/hal/boards/
-#  or <this_dir>/boards
-BOARD = GENERIC_STM32_F303XC
-
-# Cortex version
-MCU  = cortex-m4
-
-# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
-ARMV = 7
-
-USE_FPU = yes
-
-# Vector table for application
-# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
-# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
-# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
-OPT_DEFS =
-
-# Options to pass to dfu-util when flashing
-DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
+MCU = STM32F303
 
 # Build Options
 #   comment out to disable the options.

quantum/audio/audio_arm.c

@@ -79,7 +79,7 @@ float startup_song[][2] = STARTUP_SONG;
 
 static void gpt_cb8(GPTDriver *gptp);
 
-#define DAC_BUFFER_SIZE 720
+#define DAC_BUFFER_SIZE 100
 #ifndef DAC_SAMPLE_MAX
 #define DAC_SAMPLE_MAX  65535U
 #endif
@@ -98,8 +98,8 @@ static void gpt_cb8(GPTDriver *gptp);
     RESTART_CHANNEL_1()
 #define UPDATE_CHANNEL_2_FREQ(freq) gpt7cfg1.frequency = freq * DAC_BUFFER_SIZE; \
     RESTART_CHANNEL_2()
-#define GET_CHANNEL_1_FREQ gpt6cfg1.frequency
-#define GET_CHANNEL_2_FREQ gpt7cfg1.frequency
+#define GET_CHANNEL_1_FREQ (uint16_t)(gpt6cfg1.frequency * DAC_BUFFER_SIZE)
+#define GET_CHANNEL_2_FREQ (uint16_t)(gpt7cfg1.frequency * DAC_BUFFER_SIZE)
 
 
 /*

quantum/config_common.h

@@ -125,6 +125,45 @@
     #endif
 
 #elif defined(PROTOCOL_CHIBIOS)
+  // Defines mapping for Proton C replacement
+  #ifdef CONVERT_TO_PROTON_C
+    // Left side (front)
+    #define D3 PAL_LINE(GPIOA, 9)
+    #define D2 PAL_LINE(GPIOA, 10)
+    //      GND
+    //      GND
+    #define D1 PAL_LINE(GPIOB, 7)
+    #define D0 PAL_LINE(GPIOB, 6)
+    #define D4 PAL_LINE(GPIOB, 5)
+    #define C6 PAL_LINE(GPIOB, 4)
+    #define D7 PAL_LINE(GPIOB, 3)
+    #define E6 PAL_LINE(GPIOB, 2)
+    #define B4 PAL_LINE(GPIOB, 1)
+    #define B5 PAL_LINE(GPIOB, 0)
+
+    // Right side (front)
+    //      RAW
+    //      GND
+    //      RESET
+    //      VCC
+    #define F4 PAL_LINE(GPIOA, 2)
+    #define F5 PAL_LINE(GPIOA, 1)
+    #define F6 PAL_LINE(GPIOA, 0)
+    #define F7 PAL_LINE(GPIOB, 8)
+    #define B1 PAL_LINE(GPIOB, 13)
+    #define B3 PAL_LINE(GPIOB, 14)
+    #define B2 PAL_LINE(GPIOB, 15)
+    #define B6 PAL_LINE(GPIOB, 9)
+
+    // LEDs (only D5/C13 uses an actual LED)
+    #ifdef CONVERT_TO_PROTON_C_RXLED
+      #define D5 PAL_LINE(GPIOC, 13)
+      #define B0 PAL_LINE(GPIOC, 13)
+    #else
+      #define D5 PAL_LINE(GPIOC, 13)
+      #define B0 PAL_LINE(GPIOC, 14)
+    #endif
+  #else
     #define A0  PAL_LINE(GPIOA, 0)
     #define A1  PAL_LINE(GPIOA, 1)
     #define A2  PAL_LINE(GPIOA, 2)
@@ -221,6 +260,7 @@
     #define F13 PAL_LINE(GPIOF, 13)
     #define F14 PAL_LINE(GPIOF, 14)
     #define F15 PAL_LINE(GPIOF, 15)
+  #endif
 #endif
 
 /* USART configuration */

quantum/mcu_selection.mk

@@ -0,0 +1,70 @@
+
+ifneq ($(findstring STM32F303, $(MCU)),)
+  ## chip/board settings
+  # - the next two should match the directories in
+  #   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+  MCU_FAMILY ?= STM32
+  MCU_SERIES ?= STM32F3xx
+
+  # Linker script to use
+  # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+  #   or <this_dir>/ld/
+  MCU_LDSCRIPT ?= STM32F303xC
+
+  # Startup code to use
+  #  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
+  MCU_STARTUP ?= stm32f3xx
+
+  # Board: it should exist either in <chibios>/os/hal/boards/
+  #  or <this_dir>/boards
+  BOARD ?= GENERIC_STM32_F303XC
+
+  # Cortex version
+  MCU = cortex-m4
+
+  # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+  ARMV ?= 7
+
+  USE_FPU = yes
+
+  # Vector table for application
+  # 0x00000000-0x00001000 area is occupied by bootlaoder.*/
+  # The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
+  # OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
+
+  # Options to pass to dfu-util when flashing
+  DFU_ARGS ?= -d 0483:df11 -a 0 -s 0x08000000:leave
+endif
+
+ifneq (,$(filter $(MCU),atmega32u4 at90usb1286))
+  # Processor frequency.
+  #     This will define a symbol, F_CPU, in all source code files equal to the
+  #     processor frequency in Hz. You can then use this symbol in your source code to
+  #     calculate timings. Do NOT tack on a 'UL' at the end, this will be done
+  #     automatically to create a 32-bit value in your source code.
+  #
+  #     This will be an integer division of F_USB below, as it is sourced by
+  #     F_USB after it has run through any CPU prescalers. Note that this value
+  #     does not *change* the processor frequency - it should merely be updated to
+  #     reflect the processor speed set externally so that the code can use accurate
+  #     software delays.
+  F_CPU ?= 16000000
+
+  # LUFA specific
+  #
+  # Target architecture (see library "Board Types" documentation).
+  ARCH ?= AVR8
+
+  # Input clock frequency.
+  #     This will define a symbol, F_USB, in all source code files equal to the
+  #     input clock frequency (before any prescaling is performed) in Hz. This value may
+  #     differ from F_CPU if prescaling is used on the latter, and is required as the
+  #     raw input clock is fed directly to the PLL sections of the AVR for high speed
+  #     clock generation for the USB and other AVR subsections. Do NOT tack on a 'UL'
+  #     at the end, this will be done automatically to create a 32-bit value in your
+  #     source code.
+  #
+  #     If no clock division is performed on the input clock inside the AVR (via the
+  #     CPU clock adjust registers or the clock division fuses), this will be equal to F_CPU.
+  F_USB ?= $(F_CPU)
+endif

quantum/rgb_matrix.h

@@ -28,6 +28,8 @@
     #include "is31fl3731.h"
 #elif defined (IS31FL3733)
     #include "is31fl3733.h"
+#elif defined (IS31FL3737)
+    #include "is31fl3737.h"
 #endif
 
 typedef struct Point {

quantum/rgb_matrix_drivers.c

@@ -23,7 +23,7 @@
  * be here if shared between boards.
  */
 
-#if defined(IS31FL3731) || defined(IS31FL3733)
+#if defined(IS31FL3731) || defined(IS31FL3733) || defined(IS31FL3737)
 
 #include "i2c_master.h"
 
@@ -33,23 +33,29 @@ static void init( void )
 #ifdef IS31FL3731
     IS31FL3731_init( DRIVER_ADDR_1 );
     IS31FL3731_init( DRIVER_ADDR_2 );
-#else
+#elif defined(IS31FL37313)
     IS31FL3733_init( DRIVER_ADDR_1 );
+#else
+    IS31FL3737_init( DRIVER_ADDR_1 );
 #endif
     for ( int index = 0; index < DRIVER_LED_TOTAL; index++ ) {
         bool enabled = true;
         // This only caches it for later
 #ifdef IS31FL3731
         IS31FL3731_set_led_control_register( index, enabled, enabled, enabled );
-#else
+#elif defined(IS31FL3733)
         IS31FL3733_set_led_control_register( index, enabled, enabled, enabled );
+#else
+        IS31FL3737_set_led_control_register( index, enabled, enabled, enabled );
 #endif
     }
     // This actually updates the LED drivers
 #ifdef IS31FL3731
     IS31FL3731_update_led_control_registers( DRIVER_ADDR_1, DRIVER_ADDR_2 );
-#else
+#elif defined(IS31FL3733)
     IS31FL3733_update_led_control_registers( DRIVER_ADDR_1, DRIVER_ADDR_2 );
+#else
+    IS31FL3737_update_led_control_registers( DRIVER_ADDR_1, DRIVER_ADDR_2 );
 #endif
 }
 
@@ -65,7 +71,7 @@ const rgb_matrix_driver_t rgb_matrix_driver = {
     .set_color = IS31FL3731_set_color,
     .set_color_all = IS31FL3731_set_color_all,
 };
-#else
+#elif defined(IS31FL3733)
 static void flush( void )
 {
     IS31FL3733_update_pwm_buffers( DRIVER_ADDR_1, DRIVER_ADDR_2 );
@@ -77,6 +83,18 @@ const rgb_matrix_driver_t rgb_matrix_driver = {
     .set_color = IS31FL3733_set_color,
     .set_color_all = IS31FL3733_set_color_all,
 };
+#else
+static void flush( void )
+{
+    IS31FL3737_update_pwm_buffers( DRIVER_ADDR_1, DRIVER_ADDR_2 );
+}
+
+const rgb_matrix_driver_t rgb_matrix_driver = {
+    .init = init,
+    .flush = flush,
+    .set_color = IS31FL3737_set_color,
+    .set_color_all = IS31FL3737_set_color_all,
+};
 #endif
 
 #endif

quantum/stm32/halconf.h

@@ -76,7 +76,7 @@
  * @brief   Enables the I2C subsystem.
  */
 #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 FALSE
+#define HAL_USE_I2C                 TRUE
 #endif
 
 /**

quantum/stm32/mcuconf.h

@@ -154,7 +154,11 @@
 /*
  * I2C driver system settings.
  */
-#define STM32_I2C_USE_I2C1                  FALSE
+// #ifdef STM32_I2C
+  #define STM32_I2C_USE_I2C1                  TRUE
+// #else
+  // #define STM32_I2C_USE_I2C1                  FALSE
+// #endif
 #define STM32_I2C_USE_I2C2                  FALSE
 #define STM32_I2C_BUSY_TIMEOUT              50
 #define STM32_I2C_I2C1_IRQ_PRIORITY         10

quantum/stm32/proton_c.mk

@@ -0,0 +1,44 @@
+# Proton C MCU settings for converting AVR projects
+
+# These are defaults based on what has been implemented for ARM boards
+AUDIO_ENABLE = yes
+RGBLIGHT_ENABLE = no
+BACKLIGHT_ENABLE = no
+
+# The rest of these settings shouldn't change
+
+## chip/board settings
+# - the next two should match the directories in
+#   <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+MCU_FAMILY = STM32
+MCU_SERIES = STM32F3xx
+
+# Linker script to use
+# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+#   or <this_dir>/ld/
+MCU_LDSCRIPT = STM32F303xC
+
+# Startup code to use
+#  - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
+MCU_STARTUP = stm32f3xx
+
+# Board: it should exist either in <chibios>/os/hal/boards/
+#  or <this_dir>/boards
+BOARD = GENERIC_STM32_F303XC
+
+# Cortex version
+MCU  = cortex-m4
+
+# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+ARMV = 7
+
+USE_FPU = yes
+
+# Vector table for application
+# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
+# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
+# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
+OPT_DEFS =
+
+# Options to pass to dfu-util when flashing
+DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave