/** \file * * This file contains special DoxyGen information for the generation of the main page and other special * documentation pages. It is not a project source file. */ /** \mainpage AVRISP MKII Programmer Project * * \section SSec_Compat Project Compatibility: * * The following list indicates what microcontrollers are compatible with this project. * * - Series 7 USB AVRs * - Series 6 USB AVRs * - Series 4 USB AVRs * - Series 2 USB AVRs (8KB versions with reduced features only) * * \section SSec_Info USB Information: * * The following table gives a rundown of the USB utilization of this project. * * * * * * * * * * * * * * * * * * * * * * *
USB Mode:Device
USB Class:Vendor Specific Class
USB Subclass:N/A
Relevant Standards:Atmel AVRISP MKII Protocol Specification
Usable Speeds:Full Speed Mode
* * \section SSec_Description Project Description: * * Firmware for an AVRStudio compatible AVRISP-MKII clone programmer. This project will enable the USB AVR series of * microcontrollers to act as a clone of the official Atmel AVRISP-MKII programmer, usable within AVRStudio. In its * most basic form, it allows for the programming of 5V AVRs from within AVRStudio with no special hardware other than * the USB AVR and the parts needed for the USB interface. If the user desires, more advanced circuits incorporating * level conversion can be made to allow for the programming of 3.3V AVR designs. * * This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII * drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio. * * Note that this design currently has several limitations: * - Minimum ISP target clock speed of 500KHz due to hardware SPI used * - No reversed/shorted target connector detection and notification * * On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be * set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models * without an ADC converter, VTARGET will report at a fixed 5V level. * * When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the * XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP mode is not needed). * * While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more * of FLASH is required. On 8KB devices, either ISP or PDI programming support can be disabled to reduce program size. * * \section Sec_ISP ISP Connections * Connections to the device for SPI programming (when enabled): * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Programmer Pin:Target Device Pin:ISP 6 Pin Layout:
MISOPDO1
ADCx 1VTARGET2
SCLKSCLK3
MOSIPDI4
PORTx.y 2/RESET5
GNDGND6
* * 1 Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only \n * 2 See \ref SSec_Options section * * \section Sec_PDI PDI Connections * Connections to the device for PDI programming1 (when enabled): * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Programmer Pin:Target Device Pin:PDI 6 Pin Layout:
MISODATA1
ADCx 1VTARGET2
N/AN/A3
N/AN/A4
PORTx.y 2CLOCK5
GNDGND6
* * 1 When PDI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together * via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK. * * \section SSec_Options Project Options * * The following defines can be found in this project, which can control the project behaviour when defined, or changed in value. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Define Name:Location:Description:
RESET_LINE_PORTMakefile CDEFSPORT register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_PINMakefile CDEFSPIN register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_DDRMakefile CDEFSDDR register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_MASKMakefile CDEFSMask for the programmer's target RESET line on the chosen port. Must not be the AVR's /SS pin, as the * target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the * pin is configured as an input. When in PDI programming mode, this is the target clock pin. * Ignored when compiled for the XPLAIN board.
VTARGET_ADC_CHANNELMakefile CDEFSADC channel number (on supported AVRs) to use for VTARGET level detection.
ENABLE_ISP_PROTOCOLMakefile CDEFSDefine to enable SPI programming protocol support. Ignored when compiled for the XPLAIN board.
ENABLE_PDI_PROTOCOLMakefile CDEFSDefine to enable XMEGA PDI programming protocol support. Ignored when compiled for the XPLAIN board.
PDI_VIA_HARDWARE_USARTMakefile CDEFSDefine to force the PDI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to * match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires * seperate ISP and PDI programming headers) but increases programming speed dramatically. * Ignored when compiled for the XPLAIN board.
*/