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239 lines
8.2 KiB
239 lines
8.2 KiB
/*
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LUFA Library
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Copyright (C) Dean Camera, 2010.
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dean [at] fourwalledcubicle [dot] com
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www.fourwalledcubicle.com
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*/
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/*
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Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, distribute, and sell this
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software and its documentation for any purpose is hereby granted
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without fee, provided that the above copyright notice appear in
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all copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Target-related functions for the TINY target's NVM module.
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*/
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#define INCLUDE_FROM_TINYNVM_C
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#include "TINYNVM.h"
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#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
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/** Sends the given pointer address to the target's TPI pointer register */
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static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
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{
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/* Send the given 16-bit address to the target, LSB first */
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XPROGTarget_SendByte(TPI_CMD_SSTPR | 0);
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
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XPROGTarget_SendByte(TPI_CMD_SSTPR | 1);
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XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
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}
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/** Sends a SIN command to the target with the specified I/O address, ready for the data byte to be written.
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*
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* \param[in] Address 6-bit I/O address to write to in the target's I/O memory space
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*/
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static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
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{
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/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read.
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*
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* \param[in] Address 6-bit I/O address to read from in the target's I/O memory space
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*/
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static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)
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{
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/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
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* two bits of the 6-bit address are shifted left once */
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XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));
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}
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/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
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*
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* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
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*/
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bool TINYNVM_WaitWhileNVMBusBusy(void)
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{
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/* Poll the STATUS register to check to see if NVM access has been enabled */
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while (TimeoutMSRemaining)
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{
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/* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */
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XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);
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if (XPROGTarget_ReceiveByte() & TPI_STATUS_NVM)
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{
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TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
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return true;
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}
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/* Manage software timeout */
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if (TIFR0 & (1 << OCF0A))
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{
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TIFR0 |= (1 << OCF0A);
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TimeoutMSRemaining--;
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}
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}
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return false;
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}
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/** Waits while the target's NVM controller is busy performing an operation, exiting if the
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* timeout period expires.
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*
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* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
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*/
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bool TINYNVM_WaitWhileNVMControllerBusy(void)
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{
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/* Poll the STATUS register to check to see if NVM access has been enabled */
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while (TimeoutMSRemaining)
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{
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/* Send the SIN command to read the TPI STATUS register to see the NVM bus is busy */
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TINYNVM_SendReadNVMRegister(XPROG_Param_NVMCSRRegAddr);
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/* Check to see if the BUSY flag is still set */
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if (!(XPROGTarget_ReceiveByte() & (1 << 7)))
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{
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TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
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return true;
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}
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/* Manage software timeout */
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if (TIFR0 & (1 << OCF0A))
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{
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TIFR0 |= (1 << OCF0A);
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TimeoutMSRemaining--;
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}
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}
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return false;
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}
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/** Reads memory from the target's memory spaces.
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*
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* \param[in] ReadAddress Start address to read from within the target's address space
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* \param[out] ReadBuffer Buffer to store read data into
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* \param[in] ReadSize Length of the data to read from the device
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*
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* \return Boolean true if the command sequence complete successfully
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*/
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bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(TINYNVM_WaitWhileNVMControllerBusy()))
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return false;
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/* Set the NVM control register to the NO OP command for memory reading */
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_NOOP);
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/* Send the address of the location to read from */
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TINYNVM_SendPointerAddress(ReadAddress);
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while (ReadSize--)
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{
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/* Read the byte of data from the target */
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XPROGTarget_SendByte(TPI_CMD_SLD | TPI_POINTER_INDIRECT_PI);
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*(ReadBuffer++) = XPROGTarget_ReceiveByte();
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}
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return true;
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}
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/** Writes word addressed memory to the target's memory spaces.
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*
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* \param[in] WriteAddress Start address to write to within the target's address space
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* \param[in] WriteBuffer Buffer to source data from
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* \param[in] WriteLength Total number of bytes to write to the device (must be an integer multiple of 2)
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*
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* \return Boolean true if the command sequence complete successfully
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*/
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bool TINYNVM_WriteMemory(const uint16_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteLength)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(TINYNVM_WaitWhileNVMControllerBusy()))
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return false;
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/* Must have an integer number of words to write - if extra byte, word-align via a dummy high byte */
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if (WriteLength & 0x01)
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WriteBuffer[WriteLength++] = 0xFF;
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/* Set the NVM control register to the WORD WRITE command for memory reading */
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(TINY_NVM_CMD_WORDWRITE);
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/* Send the address of the location to write to */
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TINYNVM_SendPointerAddress(WriteAddress);
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while (WriteLength)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(TINYNVM_WaitWhileNVMControllerBusy()))
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return false;
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/* Write the low byte of data to the target */
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XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI);
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XPROGTarget_SendByte(*(WriteBuffer++));
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/* Write the high byte of data to the target */
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XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI);
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XPROGTarget_SendByte(*(WriteBuffer++));
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/* Need to decrement the write length twice, since we read out a whole word */
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WriteLength -= 2;
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}
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return true;
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}
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/** Erases the target's memory space.
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*
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* \param[in] EraseCommand NVM erase command to send to the device
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* \param[in] Address Address inside the memory space to erase
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*
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* \return Boolean true if the command sequence complete successfully
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*/
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bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint16_t Address)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(TINYNVM_WaitWhileNVMControllerBusy()))
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return false;
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/* Set the NVM control register to the target memory erase command */
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TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);
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XPROGTarget_SendByte(EraseCommand);
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/* Write to a high byte location within the target address space to start the erase process */
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TINYNVM_SendPointerAddress(Address | 0x0001);
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XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT);
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XPROGTarget_SendByte(0x00);
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/* Wait until the NVM controller is no longer busy */
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if (!(TINYNVM_WaitWhileNVMControllerBusy()))
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return false;
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return true;
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}
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#endif
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